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AM625: Optimize reserved memory configuration in dts

Tony Tang
Mastermind 28992 points
Part Number: AM625

#1. PSDK 8.03, 

#2. General purpose AM62x device (not secure device)

#3. Only use A53.

If did not use atf, optee, M4, R5F, can release or reduce occupied memory in k3-am625-sk.dts reserved-memory? leave more memory for A53 Linux. if yes, please tell us which can be removed or reduced, and how to modify the .dts file.

reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;

secure_tfa_ddr: tfa@9e780000 {
reg = <0x00 0x9e780000 0x00 0x80000>;
alignment = <0x1000>;
no-map;
};

secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
alignment = <0x1000>;
no-map;
};

wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9db00000 0x00 0xc00000>;
no-map;
};

mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9cb00000 0x00 0x100000>;
no-map;
};

mcu_m4fss_memory_region: m4f-memory@9cc00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9cc00000 0x00 0xf00000>;
no-map;
};

lpm_ctx_ddr: lpm-memory@a1000000 {
reg = <0x00 0xa1000000 0x00 0x40000>;
alignment = <0x1000>;
};
};

  • 0
    TI__Guru** 100980 points

    Hello Tony,

    If M4F is not used, please set status = "disabled" for the M4F cores. Then these memory regions can be removed:
    mcu_m4fss_dma_memory_region
    mcu_m4fss_memory_region

    Note that R5F is still used for device management of the system during Linux runtime. More information here: https://software-dl.ti.com/processor-sdk-linux/esd/AM62X/08_05_00_21/exports/docs/linux/Foundational_Components/U-Boot/UG-General-Info.html I am not sure if any of the non-M4F memory addresses can be removed / moved / reduced in size, will need Hong to comment.

    I am also not sure whether SDK 8.3 will be supported long term, since it was released before the HSM rearchitecture. Hong, can you comment?

    Regards,

    Nick

  • 0 in reply to Nick Saulnier
    TI__Mastermind 28992 points

    Thanks Nick,

    Nick Saulnier said:
    Note that R5F is still used for device management of the system during Linux runtime

    from the name wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000, seems the reserved memory is used for DMA, Does device management use DMA?

    Hong,

    Please help confirm if non M3F memory addresses can be removed as customer uses GP device and SDK 8.03.

    I sorted reserved memory address in sequence as below.

    0x80000000 0x80000000 //Total 2GByte DDR

    0x80000000 0x9CB00000 length：0x1CB00000，459MByte
    reserved memory:
    mcu_m4fss_dma_memory_region: m4f-dma-memory 0x9cb00000 Lenght： 0x100000 end: 0x9CC00000 //1MB
    mcu_m4fss_memory_region: m4f-memory 0x9cc00000 Lenght： 0xf00000 end: 0x9DB00000 //15MB
    wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory 0x9db00000 Lenght： 0xc00000 end: 0x9E700000 //12MB

    0x9E700000 - 0x9E780000 //512KB HOLE

    secure_tfa_ddr: tfa 0x9e780000 Lenght： 0x00080000 end: 0x9e800000 //512KB
    secure_ddr: optee 0x9e800000 Lenght： 0x01800000 end：0xA0000000 //24MB

    0xA0000000 to 0xA1000000 // 16MByte HOLE

    lpm_ctx_ddr: lpm-memory 0xa1000000 Lenght： 0x40000 end: 0xA1040000 //128KB

    0xa1040000 to 0x100000000, lenght：12158MB

    Can items of reserved-memory address allocate to other address? such as end of memory space, to leave continued memory space for Linux?

    There are some hole memory among reserved-memory. can changed each items memory address to remove memory hole?

     

  • 0 in reply to Tony Tang
    TI__Guru 68430 points

    Hello Tony,
    As commented by Nick, MCU-M4 is user configurable, or removable including reserved DDR if not used...
    On rest of reserved DDR memory:
    a/. ATF: not removable.
    b/. OPTEE: not recommended for removal
    c/. dm-r5: it is the run-time device managment firmware. not removable.

    If moving around the reserved DDR address, it is necceary to keep in synch on DT, ATF/OPTEE code, dm-r5 memory map...
    For your reference, this e2e on how to start ATF/OPTEE, ATF/OPTEE entry address...

    e2e.ti.com/.../4487903

    I'm attaching a sample dm-r5.elf parsing for reference on dm-r5 memory map...

    Best,
    -Hong

    Fullscreen dm-r5_sdk8.5_elfread.txt Download 
    ELF Header:
  Magic:   7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 
  Class:                             ELF32
  Data:                              2's complement, little endian
  Version:                           1 (current)
  OS/ABI:                            UNIX - System V
  ABI Version:                       0
  Type:                              EXEC (Executable file)
  Machine:                           ARM
  Version:                           0x1
  Entry point address:               0x9dc4e428
  Start of program headers:          200464 (bytes into file)
  Start of section headers:          201008 (bytes into file)
  Flags:                             0x5000000, Version5 EABI
  Size of this header:               52 (bytes)
  Size of program headers:           32 (bytes)
  Number of program headers:         17
  Size of section headers:           40 (bytes)
  Number of section headers:         47
  Section header string table index: 46

Section Headers:
  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
  [ 1] .freertosrstvecto PROGBITS        000022b0 001cf8 000040 00  AX  0   0  8
  [ 2] .bootCode         PROGBITS        00002198 001be0 000114 00  AX  0   0  8
  [ 3] .startupCode      PROGBITS        00001d80 0017c8 000418 00  AX  0   0  8
  [ 4] .startupData      PROGBITS        9dc63fe8 030568 000318 00   A  0   0  8
  [ 5] .text.hwi         PROGBITS        9dc63b88 030108 000460 00  AX  0   0  8
  [ 6] .text.cache       NOBITS          9dc63fe8 030bf8 000000 00  AX  0   0  8
  [ 7] .text.mpu         NOBITS          9dc63fe8 030bf8 000000 00  AX  0   0  8
  [ 8] .text.boot        NOBITS          9dc63fe8 030bf8 000000 00  AX  0   0  8
  [ 9] .dm_stub_text     PROGBITS        00000040 000038 0015f0 00  AX  0   0  8
  [10] .dm_stub_const    NOBITS          00001630 030bf8 000000 00   A  0   0  8
  [11] .dm_stub_data     NOBITS          00001630 001628 000190 00  WA  0   0  8
  [12] .dm_stub_bss      NOBITS          000017c0 001628 000020 00  WA  0   0  8
  [13] .dm_stub_rodata   PROGBITS        000017e0 001628 0001a0 00   A  0   0  8
  [14] .dm_stub_stack    NOBITS          00001980 0017c8 000400 00   A  0   0  8
  [15] .text             PROGBITS        9dc2e910 008000 021200 00  AX  0   0 16
  [16] .const            PROGBITS        9dc61720 02dca0 001728 00   A  0   0  8
  [17] .rodata           PROGBITS        9dc5cc80 029200 004aa0 00   A  0   0 16
  [18] .cinit            PROGBITS        9dd0a000 030880 000378 00   A  0   0  8
  [19] .bss              NOBITS          9dc00000 008000 02e90c 00  WA  0   0 32768
  [20] .far              NOBITS          00000000 000000 000000 00      0   0  4
  [21] .data             NOBITS          9dc57b80 029200 005100 00  WA  0   0 128
  [22] .sysmem           NOBITS          9dc4fb10 029200 008000 00  WA  0   0  8
  [23] .data_buffer      NOBITS          00000000 030c00 000000 00  WA  0   0 128
  [24] .bss.devgroup*    NOBITS          00000000 030c00 000000 00  WA  0   0  4
  [25] .const.devgroup*  NOBITS          00000000 000000 000000 00      0   0  4
  [26] .boardcfg_data    PROGBITS        9dc62e80 02f400 000d04 00   A  0   0 128
  [27] .bss:taskStackSec NOBITS          00000000 030c00 000000 00  WA  0   0  1
  [28] .resource_table   PROGBITS        9db00000 002000 00008c 00   A  0   0 4096
  [29] .tracebuf         NOBITS          9db00400 002400 080004 00  WA  0   0 1024
  [30] .stack            NOBITS          9e6fc000 030bf8 004000 00  WA  0   0  8
  [31] .irqStack         NOBITS          9e6fae00 030df8 001000 00   A  0   0  4
  [32] .fiqStack         NOBITS          9e6fbe00 031df8 000100 00   A  0   0  4
  [33] .abortStack       NOBITS          9e6fbf00 031ef8 000100 00   A  0   0  4
  [34] .undStack         NOBITS          9e6fac00 030bf8 000100 00   A  0   0  4
  [35] .svcStack         NOBITS          9e6fad00 030cf8 000100 00   A  0   0  4
  [36] .TI.noinit        NOBITS          00000000 000000 000000 00      0   0  4
  [37] .TI.persistent    NOBITS          00000000 000000 000000 00      0   0 128
  [38] __llvm_prf_cnts   NOBITS          9dc00000 030c00 000000 00   A  0   0  4
  [39] ipc_data_buffer   NOBITS          9dc64300 030880 0a5d00 00  WA  0   0  8
  [40] Veneer$$CMSE      NOBITS          00000000 000000 000000 00      0   0  1
  [41] .ARM.attributes   ARM_ATTRIBUTES  00000000 030c00 000076 00      0   0  0
  [42] .symtab           SYMTAB          00000000 030c78 000030 10     44   1  0
  [43] .TI.section.flags PROGBITS        00000000 030ca8 00002a 00      0   0  0
  [44] .strtab           STRTAB          00000000 030cd2 000014 01   S  0   0  0
  [45] .symtab_meta      LOOS+fff4c09    00000000 030ce6 000001 10     42   0  0
  [46] .shstrtab         STRTAB          00000000 030ce7 000226 01   S  0   0  0
Key to Flags:
  W (write), A (alloc), X (execute), M (merge), S (strings)
  I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown)
  O (extra OS processing required) o (OS specific), p (processor specific)

There are no section groups in this file.

Program Headers:
  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
  LOAD           0x000038 0x00000040 0x41010040 0x015f0 0x015f0 R E 0x8
  LOAD           0x001628 0x00001630 0x41011630 0x00000 0x00190 RW  0x8
  LOAD           0x001628 0x000017c0 0x410117c0 0x00000 0x00020 RW  0x8
  LOAD           0x001628 0x000017e0 0x410117e0 0x001a0 0x005a0 R   0x8
  LOAD           0x0017c8 0x00001d80 0x41011d80 0x00570 0x00570 R E 0x8
  LOAD           0x002000 0x9db00000 0x9db00000 0x0008c 0x0008c R   0x1000
  LOAD           0x002400 0x9db00400 0x9db00400 0x00000 0x80004 RW  0x400
  LOAD           0x008000 0x9dc00000 0x9dc00000 0x00000 0x2e90c RW  0x8000
  LOAD           0x008000 0x9dc2e910 0x9dc2e910 0x21200 0x21200 R E 0x10
  LOAD           0x029200 0x9dc4fb10 0x9dc4fb10 0x00000 0x08000 RW  0x8
  LOAD           0x029200 0x9dc57b80 0x9dc57b80 0x00000 0x05100 RW  0x80
  LOAD           0x029200 0x9dc5cc80 0x9dc5cc80 0x061c8 0x061c8 R   0x10
  LOAD           0x02f400 0x9dc62e80 0x9dc62e80 0x01480 0x01480 R E 0x80
  LOAD           0x030880 0x9dc64300 0x9dc64300 0x00000 0xa5d00 RW  0x8
  LOAD           0x030880 0x9dd0a000 0x9dd0a000 0x00378 0x00378 R   0x8
  LOAD           0x030bf8 0x9e6fac00 0x9e6fac00 0x00000 0x01400 R   0x4
  LOAD           0x030bf8 0x9e6fc000 0x9e6fc000 0x00000 0x04000 RW  0x8

 Section to Segment mapping:
  Segment Sections...
   00     .dm_stub_text 
   01     .dm_stub_const .dm_stub_data 
   02     .dm_stub_bss 
   03     .dm_stub_rodata .dm_stub_stack 
   04     .freertosrstvectors .bootCode .startupCode 
   05     .resource_table 
   06     .tracebuf 
   07     .bss __llvm_prf_cnts 
   08     .text 
   09     .sysmem 
   10     .data 
   11     .const .rodata 
   12     .startupData .text.hwi .text.cache .text.mpu .text.boot .boardcfg_data 
   13     ipc_data_buffer 
   14     .cinit 
   15     .irqStack .fiqStack .abortStack .undStack .svcStack 
   16     .stack 

There is no dynamic section in this file.

There are no relocations in this file.

There are no unwind sections in this file.

Symbol table '.symtab' contains 3 entries:
   Num:    Value  Size Type    Bind   Vis      Ndx Name
     0: 00000000     0 NOTYPE  LOCAL  DEFAULT  UND 
     1: 9dc4fa4c     0 NOTYPE  GLOBAL DEFAULT   15 C$$EXIT
     2: 00000000     0 NOTYPE  WEAK   DEFAULT  UND __c_args__

No version information found in this file.
Attribute Section: TI
File Attributes
  Unknown attribute:
  0x00000000 054c696e 6b657200 08020a04 0c010e01 .Linker.........
  0x00000010 80020382 020a8802 048a0252 8e0202c0 ...........R....
  0x00000020 020ac402 01                         .....

Attribute Section: aeabi
File Attributes
  Tag_CPU_name: "cortex-r5"
  Tag_CPU_arch: v7
  Tag_CPU_arch_profile: Realtime
  Tag_ARM_ISA_use: Yes
  Tag_THUMB_ISA_use: Thumb-2
  Tag_FP_arch: VFPv3-D16
  Tag_ABI_PCS_GOT_use: direct
  Tag_ABI_PCS_wchar_t: 4
  Tag_ABI_FP_denormal: Sign only
  Tag_ABI_FP_number_model: IEEE 754
  Tag_ABI_align_needed: 8-byte
  Tag_ABI_align_preserved: 8-byte, except leaf SP
  Tag_ABI_enum_size: small
  Tag_ABI_HardFP_use: Deprecated
  Tag_ABI_VFP_args: VFP registers
  Tag_ABI_optimization_goals: Aggressive Size
  Tag_CPU_unaligned_access: v6
  Tag_ABI_FP_16bit_format: IEEE 754
  Tag_DIV_use: Allowed in v7-A with integer division extension
  Tag_conformance: "2.09"

  • 0 in reply to Hong Guan64
    TI__Mastermind 28992 points

    Hong,

    Thanks. From SDK user guide description of ATF and OP-TEE as below:

    3.9. ARM Trusted Firmware-A

    Overview

    Trusted Firmware-A (TF-A) provides a reference implementation of secure world software for Armv7-A and Armv8-A, including a Secure Monitor executing at Exception Level 3 (EL3).

    ATF is used as the initial start code on ARMv8-A cores for all K3 platforms. After setting up the initial core state and applying any needed errata fixes it sets up itself as the EL3 monitor handler. After this is installs the secure world software (OP-TEE) and passes execution on to either the Linux kernel or U-Boot in the non-secure world.

    #1. Is OPTEE and ATE used by Linux in default, or need user app to call it?  Customer think they did no use OPTEE and ATE, how to know whether it is used?

    #2. Does DM and LPM run on r5f-dma-memory? or it is reserved for DMA buffer? Does DM and LPM use DMA?

  • 0 in reply to Tony Tang
    TI__Guru 68430 points

    Hello Tony,
    On your follow-up questions:
    A1:
    In fact, ATF is the de-facto firmware running on most (or all) of SoCs based on ARM-v8, independent of OS, i.e. Linux, QNX...
    OPTEE is kind of optional depending on security, but recommendation is keep it. That is also the default in TI Linux SDK for GP/HS.
    The ATF/OPTEE loading/launching sequence is described in the referenced e2e in my last reply.
    A2:
    - reserved DDR for dm-r5 rproc buffer
    git.ti.com/gitweb
    - reserved DDR for dm-r5, where the memory map matching to dm-r5 firmware elf parsing in my last reply
    git.ti.com/gitweb
    - reserved DDR to support Linux LPM
    git.ti.com/gitweb

    Best,
    -Hong

  • 0 in reply to Hong Guan64
    TI__Mastermind 28992 points

    Hong,

    Thanks for your patients, I learned some basic concept about ARM Trust Zone from this blog:

    .https://juejin.cn/post/7024079301314248712

    the feature should be selective, and if user did not use trust zone secure world, the ATE and OP-TEE should be removable. 

    Maybe during boot stage will involve ATE, but after enter Linux, the ATE and OP-TEE occupied space can be override/removed if no application use trust zone and secure feature.

    Does it make sense?

  • 0 in reply to Nick Saulnier
    TI__Mastermind 28992 points
    Nick Saulnier said:
    set status = "disabled" for the M4F cores.

    Do you mean here to add it?

  • 0 in reply to Tony Tang
    TI__Guru 68430 points

    Hello Tony,
    - OPTEE
    It is not recommended to skip OPTEE, but it is optional to bypass OPTEE by user if required.
    e2e.ti.com/.../4462989
    - ATF
    The current ATF binary (bl31.bin) in SDK is ~45Kbytes.I'd think one option is rearranging the reserved DDR for ATF under "really" tight DDR budget to save ~45Kbyes.

    On M4SS:
    software-dl.ti.com/.../Foundational_Components_IPC62x.html

    Best,
    -Hong

  • 0 in reply to Hong Guan64
    TI__Guru** 100980 points

    Hello Tony,

    I have created an FAQ to answer your question about how to disable a remote core in the Linux device tree:
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1195052/faq-am62x-am64x-how-to-disable-unused-cores 

    This information was also copied to a section of the Linux Academy which will hopefully go live in the next couple of months. I will update the FAQ when the official Linux Academy documentation has been pushed publicly.

    Regards,

    Nick