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[FAQ] AM62x, AM64x: How to disable unused cores?

I am not using one of the cores on my TI processor. How do I disable that core, so that I can free up more memory, peripherals, etc for my other cores?

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This FAQ will use AM64x as an example, but the same concepts apply for AM62x.

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NOTE: This FAQ discusses how to disable non-Linux cores on the processor, like R5F (AM64x) and M4F(both AM64x & AM62x). For information on how to disable A53 cores and GPU cores that do not exist on a specific part number, please reference the FAQ rti_wdt_probe error on Linux boot.

For information on other multicore subjects, reference the FAQ Sitara multicore development and documentation.

UPDATE January 2024: The information in this FAQ has been added to the processor academy modules. This FAQ will not be maintained going forward.
Please find the latest information in the processor's academy > Multicore module > Multicore Development > Booting and disabling processor cores > Disabling remote cores:
AM62x
AM62Ax
AM64x

  • How to disable remote cores

    You use the Linux devicetree to disable remote cores like R5, M4, and PRU. If the device node for a remote core is disabled, then the Linux kernel never uses RemoteProc to initialize the core. Note that device tree nodes are enabled by default. That means if you want a particular core disabled, you need to set status = disabled in the device tree node. Cores should be disabled in your board dts file instead of one of the dtsi files.

    AM64x example

    For example, to disable all the remote cores on the AM64x Starter Kit EVM, we change k3-am642-sk.dts like in the below patch.

     arch/arm64/boot/dts/ti/k3-am642-evm.dts | 20 +++++---------------
     1 file changed, 5 insertions(+), 15 deletions(-)
    
    diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
    index 2bd50d4bb226..610f375dedee 100644
    --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
    +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
    @@ -282,33 +282,23 @@
     };
    
     &main_r5fss0_core0 {
    -       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
    -       memory-region = <&main_r5fss0_core0_dma_memory_region>,
    -                       <&main_r5fss0_core0_memory_region>;
    +       status = "disabled";
     };
    
     &main_r5fss0_core1 {
    -       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
    -       memory-region = <&main_r5fss0_core1_dma_memory_region>,
    -                       <&main_r5fss0_core1_memory_region>;
    +       status = "disabled";
     };
    
     &main_r5fss1_core0 {
    -       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
    -       memory-region = <&main_r5fss1_core0_dma_memory_region>,
    -                       <&main_r5fss1_core0_memory_region>;
    +       status = "disabled";
     };
     &main_r5fss1_core1 {
    -       mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
    -       memory-region = <&main_r5fss1_core1_dma_memory_region>,
    -                       <&main_r5fss1_core1_memory_region>;
    +       status = "disabled";
     };
    
     &mcu_m4fss {
    -       mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
    -       memory-region = <&mcu_m4fss_dma_memory_region>,
    -                       <&mcu_m4fss_memory_region>;
    +       status = "disabled";
     };
    
     &main_pmx0 {
    --
    2.17.1
    

    The DDR "memory-region"s will still get allocated if they are left in the Linux devicetree, but they will be unused after Linux allocates them. Since the DDR "memory-regions" are now unused, they can be removed from the reserved-memory node.

     arch/arm64/boot/dts/ti/k3-am642-evm.dts | 66 -------------------------
     1 file changed, 66 deletions(-)
    
    diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
    index 610f375dedee..c6222dad7d19 100644
    --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
    +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
    @@ -43,72 +43,6 @@
                            alignment = <0x1000>;
                            no-map;
                    };
    -
    -               main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
    -                       compatible = "shared-dma-pool";
    -                       reg = <0x00 0xa0000000 0x00 0x100000>;
    -                       no-map;
    -               };
    -
    -               main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
    -                       compatible = "shared-dma-pool";
    -                       reg = <0x00 0xa0100000 0x00 0xf00000>;
    -                       no-map;
    -               };
    -
    -               main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
    -                       compatible = "shared-dma-pool";
    -                       reg = <0x00 0xa1000000 0x00 0x100000>;
    -                       no-map;
    -               };
    -
    -               main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
    -                       compatible = "shared-dma-pool";
    -                       reg = <0x00 0xa1100000 0x00 0xf00000>;
    -                       no-map;
    -               };
    -
    -               main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
    -                       compatible = "shared-dma-pool";
    -                       reg = <0x00 0xa2000000 0x00 0x100000>;
    -                       no-map;
    -               };
    -
    -               main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
    -                       compatible = "shared-dma-pool";
    -                       reg = <0x00 0xa2100000 0x00 0xf00000>;
    -                       no-map;
    -               };
    -
    -               main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
    -                       compatible = "shared-dma-pool";
    -                       reg = <0x00 0xa3000000 0x00 0x100000>;
    -                       no-map;
    -               };
    -
    -               main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
    -                       compatible = "shared-dma-pool";
    -                       reg = <0x00 0xa3100000 0x00 0xf00000>;
    -                       no-map;
    -               };
    -
    -               mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
    -                       compatible = "shared-dma-pool";
    -                       reg = <0x00 0xa4000000 0x00 0x100000>;
    -                       no-map;
    -               };
    -
    -               mcu_m4fss_memory_region: m4f-memory@a4100000 {
    -                       compatible = "shared-dma-pool";
    -                       reg = <0x00 0xa4100000 0x00 0xf00000>;
    -                       no-map;
    -               };
    -
    -               rtos_ipc_memory_region: ipc-memories@a5000000 {
    -                       reg = <0x00 0xa5000000 0x00 0x00800000>;
    -                       alignment = <0x1000>;
    -                       no-map;
    -               };
            };
    
            evm_12v0: fixedregulator-evm12v0 {
    --
    2.17.1
    

  • Other information

    Important note for AM62x: Do NOT disable wkup_r5fss0 

    On the AM62x, the R5F core runs the resource manager for all the other cores. The processor will not work if the R5F is disabled.

    AM62x silicon variants 

    The different AM62x parts are listed here: https://dev.ti.com/tirex/explore/node?node=A__AFSX4RJYQ2lqtHXtiKUeww__linux_academy_am62x__XaWts8R__LATEST 

    "normal" Linux boot (SPL boot) vs SBL boot 

    This FAQ assumes that the board is booting through the normal Linux boot flow documented in the Linux SDK documentation, "Foundational Components > U-Boot > User's Guide > General Information > Boot Flow". This boot flow is also known as SPL boot.

    Both AM62x and AM64x can also boot through SBL boot flow. The core running the SBL can initialize remote cores at the same time that it is initializing U-boot on the A53 cores. If SBL boot is used, then all the changes to the Linux device tree still need to be made. In addition, the SBL should be told to not initialize the disabled cores.

    For more information about SBL, reference the MCU+ SDK documentation, "Examples and Demos > Secondary Bootloader (SBL) > SBL [type] Linux". Note that SBL that does not include Linux in the title will NOT load Linux onto the A53 cores.