TDA4VM: Questions about R5F MCU3 0 and MCU2 0 GPIO interrupt,What is the difference between MCU2_1 and MCU3_0 in using interrupts?

We are using SDK7.3.

I can use GPIO interrupt in R5F MCU3_0 and the interrupt trigger is normal, but the same code ported to MCU2_1 cannot be used and the interrupt cannot trigger.

I see that the GPIOMUX_INTRTR0_MUXCNTL_n register configuration is available on MCU3_0, but not on MCU2_1 or MCU2_0.

I have tried porting code to MCU3_1 and interrupts can be triggered

What is the difference between MCU2_1 and MCU3_0 in using interrupts?

Why does the same test code interrupt work on MCU3_0 and MCU3_1, but not on MCU2_0 and MCU2_1?

      //use bank4                                     
    *(volatile uint32_t *)0x11c12C = 0x50007 | (2 << 4);
    *(volatile uint32_t *)0x11c130 = 0x50007 | (2 << 4);
    *(volatile uint32_t *)0x11c134 = 0x50007 | (2 << 4);
    *(volatile uint32_t *)0x11c138 = 0x50007 | (2 << 4);
    *(volatile uint32_t *)0x11c13C = 0x50007 | (2 << 4);
    *(volatile uint32_t *)0x11c140 = 0x50007 | (2 << 4);


    GPIO_socGetInitCfg(USE_DEF_PORTNUM, &gpio_cfg);

    gpio_cfg.baseAddr = CSL_GPIO4_BASE;

    intCfg = gpio_cfg.intCfg;
    intCfg[74].intNum= 176; //GPIO0_74 in272
    intCfg[74].eventId= 0;
    intCfg[74].intcMuxNum=INVALID_INTC_MUX_NUM;
    intCfg[74].intcMuxInEvent=0;
    intCfg[74].intcMuxOutEvent=0;

    intCfg[75].intNum= 176;//GPIO0_75
    intCfg[75].eventId= 0;
    intCfg[75].intcMuxNum=INVALID_INTC_MUX_NUM;
    intCfg[75].intcMuxInEvent=0;
    intCfg[75].intcMuxOutEvent=0;    

    intCfg[76].intNum= 176;//GPIO0_76
    intCfg[76].eventId= 0;
    intCfg[76].intcMuxNum=INVALID_INTC_MUX_NUM;
    intCfg[76].intcMuxInEvent=0;
    intCfg[76].intcMuxOutEvent=0;    

    intCfg[77].intNum= 176;//GPIO0_77
    intCfg[77].eventId= 0;
    intCfg[77].intcMuxNum=INVALID_INTC_MUX_NUM;
    intCfg[77].intcMuxInEvent=0;
    intCfg[77].intcMuxOutEvent=0;

    intCfg[78].intNum= 176;//GPIO0_78
    intCfg[78].eventId= 0;
    intCfg[78].intcMuxNum=INVALID_INTC_MUX_NUM;
    intCfg[78].intcMuxInEvent=0;
    intCfg[78].intcMuxOutEvent=0;

    intCfg[79].intNum= 176;//GPIO0_79
    intCfg[79].eventId= 0;
    intCfg[79].intcMuxNum=INVALID_INTC_MUX_NUM;
    intCfg[79].intcMuxInEvent=0;
    intCfg[79].intcMuxOutEvent=0;

    GPIO_socSetInitCfg(USE_DEF_PORTNUM, &gpio_cfg);
    
#if 0
    GPIO_socGetInitCfg(6, &gpio_cfg6);
    gpio_cfg6.baseAddr = CSL_GPIO6_BASE;
    intCfg = gpio_cfg6.intCfg;

    intCfg[64].intNum= 190;//GPIO0_64
    intCfg[64].eventId= 0;
    intCfg[64].intcMuxNum=INVALID_INTC_MUX_NUM;
    intCfg[64].intcMuxInEvent=0;
    intCfg[64].intcMuxOutEvent=0;    

    intCfg[65].intNum= 190;//GPIO0_65
    intCfg[65].eventId= 0;
    intCfg[65].intcMuxNum=INVALID_INTC_MUX_NUM;
    intCfg[65].intcMuxInEvent=0;
    intCfg[65].intcMuxOutEvent=0;
    GPIO_socSetInitCfg(6, &gpio_cfg6);
#endif
    //*(volatile uint32_t *)0x0xA00004 = 0x1010c
    GPIO_init();
#if 0
    int irqindex = 0;
    irqindex = 176;
    for(irqindex = 176; irqindex < 192;irqindex++ ) {
          ret =  GPIO_configIntRouter(irqindex,77,0,&gpio_cfg, true);
        appLogPrintf("\n\n******irqindex = %d  ***ret = %d **********************\n",irqindex,ret);
    }
#endif
   /*use gpio irq*/

     //register gpioPinConfigs num0~num5 to irq
    GPIO_setCallback(0, AppElmosCallbackFxn1);//RX1_irq
    GPIO_setCallback(1, AppElmosCallbackFxn2);//RX2_irq
    GPIO_setCallback(2, AppElmosCallbackFxn3);//RX3_irq
    GPIO_setCallback(3, AppElmosCallbackFxn4);//RX4_irq
    GPIO_setCallback(4, AppElmosCallbackFxn5);//RX5_irq
    GPIO_setCallback(5, AppElmosCallbackFxn6);//RX6_irq
     //enable irq
    GPIO_enableInt(0);
    GPIO_enableInt(1);
    GPIO_enableInt(2);
    GPIO_enableInt(3);
    GPIO_enableInt(4);
    GPIO_enableInt(5);