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TMS320C6678: SPI DATA RATE -NEW

Thilak Ram
Intellectual 480 points
Part Number: TMS320C6678

Hi,

Fullscreen 8473.spi nor flash data.txt Download 
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Booting from NOR
IBL: Boplatform_device_open(deviceid=0x50,flags=0x0) called
p_info->version = 2.00.00.15
p_info->cpu.core_count  = 8
p_info->cpu.name        = TMS320C6678
p_info->cpu.id  = 21
p_info->cpu.revision_id = 0
p_info->cpu.silicon_revision_major      = 0
p_info->cpu.silicon_revision_minor      = 0
p_info->cpu.megamodule_revision_major   = 8
p_info->cpu.megamodule_revision_minor   = 1
p_info->cpu.endian      = 1
p_info->board_name      = TMDXEVM6678L
p_info->frequency       = 1000
p_info->board_rev       = 14
p_info->led[PLATFORM_USER_LED_CLASS].count      = 4
p_info->led[PLATFORM_SYSTEM_LED_CLASS].count    = 0
p_info->emac.port_count = 2
EMAC port 1 connected to the PHY.
MAC Address = 10:ce:a9:c0:a0:e7
platform_device_open(deviceid=0xbb18,flags=0x0) called

NOR Device:
p_device->device_id     = 47896
p_device->manufacturer_id       = 32
p_device->width = 8
p_device->block_count   = 256
p_device->page_count    = 256
p_device->page_size     = 256
p_device->spare_size    = 0
p_device->handle        = 47896
p_device->flags = 0
p_device->bboffset      = 0
NOR test start:1
platform_device_open(deviceid=0xbb18,flags=0x0) called
BUF_ORIG:255,no-0
BUF_ORIG:255,no-1
BUF_ORIG:255,no-2
BUF_ORIG:255,no-3
BUF_ORIG:255,no-4
BUF_ORIG:255,no-5
BUF_ORIG:255,no-6
BUF_ORIG:255,no-7
BUF_ORIG:255,no-8
BUF_ORIG:255,no-9
BUF_ORIG:255,no-10
BUF_ORIG:255,no-11
BUF_ORIG:255,no-12
BUF_ORIG:255,no-13
BUF_ORIG:255,no-14
BUF_ORIG:255,no-15
BUF_ORIG:255,no-16
BUF_ORIG:255,no-17
BUF_ORIG:255,no-18
BUF_ORIG:255,no-19
BUF_ORIG:255,no-20
BUF_ORIG:255,no-21
BUF_ORIG:255,no-22
BUF_ORIG:255,no-23
BUF_ORIG:255,no-24
BUF_ORIG:255,no-25
BUF_ORIG:255,no-26
BUF_ORIG:255,no-27
BUF_ORIG:255,no-28
BUF_ORIG:255,no-29
BUF_ORIG:255,no-30
BUF_ORIG:255,no-31
BUF_ORIG:255,no-32
BUF_ORIG:255,no-33
BUF_ORIG:255,no-34
BUF_ORIG:255,no-35
BUF_ORIG:255,no-36
BUF_ORIG:255,no-37
BUF_ORIG:255,no-38
BUF_ORIG:255,no-39
BUF_ORIG:255,no-40
BUF_ORIG:255,no-41
BUF_ORIG:255,no-42
BUF_ORIG:255,no-43
BUF_ORIG:255,no-44
BUF_ORIG:255,no-45
BUF_ORIG:255,no-46
BUF_ORIG:255,no-47
BUF_ORIG:255,no-48
BUF_ORIG:255,no-49
BUF_ORIG:255,no-50
BUF_ORIG:255,no-51
BUF_ORIG:255,no-52
BUF_ORIG:255,no-53
BUF_ORIG:255,no-54
BUF_ORIG:255,no-55
BUF_ORIG:255,no-56
BUF_ORIG:255,no-57
BUF_ORIG:255,no-58
BUF_ORIG:255,no-59
BUF_ORIG:255,no-60
BUF_ORIG:255,no-61
BUF_ORIG:255,no-62
BUF_ORIG:255,no-63
BUF_1:255,no-0
BUF_1:255,no-1
BUF_1:255,no-2
BUF_1:255,no-3
BUF_1:255,no-4
BUF_1:255,no-5
BUF_1:255,no-6
BUF_1:255,no-7
BUF_1:255,no-8
BUF_1:255,no-9
BUF_1:255,no-10
BUF_1:255,no-11
BUF_1:255,no-12
BUF_1:255,no-13
BUF_1:255,no-14
BUF_1:255,no-15
BUF_1:255,no-16
BUF_1:255,no-17
BUF_1:255,no-18
BUF_1:255,no-19
BUF_1:255,no-20
BUF_1:255,no-21
BUF_1:255,no-22
BUF_1:255,no-23
BUF_1:255,no-24
BUF_1:255,no-25
BUF_1:255,no-26
BUF_1:255,no-27
BUF_1:255,no-28
BUF_1:255,no-29
BUF_1:255,no-30
BUF_1:255,no-31
BUF_1:255,no-32
BUF_1:255,no-33
BUF_1:255,no-34
BUF_1:255,no-35
BUF_1:255,no-36
BUF_1:255,no-37
BUF_1:255,no-38
BUF_1:255,no-39
BUF_1:255,no-40
BUF_1:255,no-41
BUF_1:255,no-42
BUF_1:255,no-43
BUF_1:255,no-44
BUF_1:255,no-45
BUF_1:255,no-46
BUF_1:255,no-47
BUF_1:255,no-48
BUF_1:255,no-49
BUF_1:255,no-50
BUF_1:255,no-51
BUF_1:255,no-52
BUF_1:255,no-53
BUF_1:255,no-54
BUF_1:255,no-55
BUF_1:255,no-56
BUF_1:255,no-57
BUF_1:255,no-58
BUF_1:255,no-59
BUF_1:255,no-60
BUF_1:255,no-61
BUF_1:255,no-62
BUF_1:255,no-63
test_nor: Write test data failed errno = 0x30
BUF_0:171,no-0
BUF_0:171,no-1
BUF_0:171,no-2
BUF_0:171,no-3
BUF_0:171,no-4
BUF_0:171,no-5
BUF_0:171,no-6
BUF_0:171,no-7
BUF_0:171,no-8
BUF_0:171,no-9
BUF_0:171,no-10
BUF_0:171,no-11
BUF_0:171,no-12
BUF_0:171,no-13
BUF_0:171,no-14
BUF_0:171,no-15
BUF_0:171,no-16
BUF_0:171,no-17
BUF_0:171,no-18
BUF_0:171,no-19
BUF_0:171,no-20
BUF_0:171,no-21
BUF_0:171,no-22
BUF_0:171,no-23
BUF_0:171,no-24
BUF_0:171,no-25
BUF_0:171,no-26
BUF_0:171,no-27
BUF_0:171,no-28
BUF_0:171,no-29
BUF_0:171,no-30
BUF_0:171,no-31
BUF_0:171,no-32
BUF_0:171,no-33
BUF_0:171,no-34
BUF_0:171,no-35
BUF_0:171,no-36
BUF_0:171,no-37
BUF_0:171,no-38
BUF_0:171,no-39
BUF_0:171,no-40
BUF_0:171,no-41
BUF_0:171,no-42
BUF_0:171,no-43
BUF_0:171,no-44
BUF_0:171,no-45
BUF_0:171,no-46
BUF_0:171,no-47
BUF_0:171,no-48
BUF_0:171,no-49
BUF_0:171,no-50
BUF_0:171,no-51
BUF_0:171,no-52
BUF_0:171,no-53
BUF_0:171,no-54
BUF_0:171,no-55
BUF_0:171,no-56
BUF_0:171,no-57
BUF_0:171,no-58
BUF_0:171,no-59
BUF_0:171,no-60
BUF_0:171,no-61
BUF_0:171,no-62
BUF_0:171,no-63
BUF_1:255,no-0
BUF_1:255,no-1
BUF_1:255,no-2
BUF_1:255,no-3
BUF_1:255,no-4
BUF_1:255,no-5
BUF_1:255,no-6
BUF_1:255,no-7
BUF_1:255,no-8
BUF_1:255,no-9
BUF_1:255,no-10
BUF_1:255,no-11
BUF_1:255,no-12
BUF_1:255,no-13
BUF_1:255,no-14
BUF_1:255,no-15
BUF_1:255,no-16
BUF_1:255,no-17
BUF_1:255,no-18
BUF_1:255,no-19
BUF_1:255,no-20
BUF_1:255,no-21
BUF_1:255,no-22
BUF_1:255,no-23
BUF_1:255,no-24
BUF_1:255,no-25
BUF_1:255,no-26
BUF_1:255,no-27
BUF_1:255,no-28
BUF_1:255,no-29
BUF_1:255,no-30
BUF_1:255,no-31
BUF_1:255,no-32
BUF_1:255,no-33
BUF_1:255,no-34
BUF_1:255,no-35
BUF_1:255,no-36
BUF_1:255,no-37
BUF_1:255,no-38
BUF_1:255,no-39
BUF_1:255,no-40
BUF_1:255,no-41
BUF_1:255,no-42
BUF_1:255,no-43
BUF_1:255,no-44
BUF_1:255,no-45
BUF_1:255,no-46
BUF_1:255,no-47
BUF_1:255,no-48
BUF_1:255,no-49
BUF_1:255,no-50
BUF_1:255,no-51
BUF_1:255,no-52
BUF_1:255,no-53
BUF_1:255,no-54
BUF_1:255,no-55
BUF_1:255,no-56
BUF_1:255,no-57
BUF_1:255,no-58
BUF_1:255,no-59
BUF_1:255,no-60
BUF_1:255,no-61
BUF_1:255,no-62
BUF_1:255,no-63
test_nor: Data verification failed
test_nor: Write back original data failed errno = 0x30
NOR test complete:1

I am working in the 6678 eval Card. I am testing the SPI NOR Flash using platform util test code and adding debug prints in it .I am getting the verification error .

I have attached the error image and the place where the error gets identified.Error Function: Platform device write .In that pBlock and pPage function gets error indication

#define PLATFORM_ERRNO_OOM 0x00000030 /**<  Out of memory.. tried to allocate RAM but could not.

I have attached the log and gel output .I have only enabled test nor function. Also added debug prints for checking the buffer.

Fullscreen 7725.jtag test connection.txt Download 
This path-length test uses blocks of 64 32-bit words.

The test for the JTAG IR instruction path-length succeeded.
The JTAG IR instruction path-length is 6 bits.

The test for the JTAG DR bypass path-length succeeded.
The JTAG DR bypass path-length is 1 bits.

-----[Perform the Integrity scan-test on the JTAG IR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG IR Integrity scan-test has succeeded.

-----[Perform the Integrity scan-test on the JTAG DR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG DR Integrity scan-test has succeeded.

[End]
Fullscreen 0726.gel output.txt Download 
C66xx_0: GEL Output: Setup_Memory_Map...
C66xx_0: GEL Output: Setup_Memory_Map... Done.
C66xx_0: GEL Output: 
Connecting Target...
C66xx_0: GEL Output: DSP core #0
C66xx_0: GEL Output: C6678L GEL file Ver is 2.00500011 
C66xx_0: GEL Output: Global Default Setup...
C66xx_0: GEL Output: Setup Cache... 
C66xx_0: GEL Output: L1P = 32K   
C66xx_0: GEL Output: L1D = 32K   
C66xx_0: GEL Output: L2 = ALL SRAM   
C66xx_0: GEL Output: Setup Cache... Done.
C66xx_0: GEL Output: Main PLL (PLL1) Setup ... 
C66xx_0: GEL Output: PLL not in Bypass, Enable BYPASS in the PLL Controller... 
C66xx_0: GEL Output: PLL1 Setup for DSP @ 1000.0 MHz.
C66xx_0: GEL Output:            SYSCLK2 = 333.333344 MHz, SYSCLK5 = 200.0 MHz.
C66xx_0: GEL Output:            SYSCLK8 = 15.625 MHz.
C66xx_0: GEL Output:            SYSCLK7 = 166.666672 MHz.
C66xx_0: GEL Output: PLL1 Setup... Done.
C66xx_0: GEL Output: Power on all PSC modules and DSP domains... 
C66xx_0: GEL Output: Security Accelerator disabled!
C66xx_0: GEL Output: Power on all PSC modules and DSP domains... Done.
C66xx_0: GEL Output: PA PLL (PLL3) Setup ... 
C66xx_0: GEL Output: PA PLL Setup... Done.
C66xx_0: GEL Output: DDR3 PLL (PLL2) Setup ... 
C66xx_0: GEL Output: DDR3 PLL Setup... Done.
C66xx_0: GEL Output: DDR begin (1333 auto)
C66xx_0: GEL Output: XMC Setup ... Done 
C66xx_0: GEL Output: 
DDR3 initialization is complete.
C66xx_0: GEL Output: DDR done
C66xx_0: GEL Output: DDR3 memory test... Started
C66xx_0: GEL Output: DDR3 memory test... Passed
C66xx_0: GEL Output: PLL and DDR Initialization completed(0) ...
C66xx_0: GEL Output: configSGMIISerdes Setup... Begin
C66xx_0: GEL Output: 
SGMII SERDES has been configured.
C66xx_0: GEL Output: Enabling EDC ...
C66xx_0: GEL Output: L1P error detection logic is enabled.
C66xx_0: GEL Output: L2 error detection/correction logic is enabled.
C66xx_0: GEL Output: MSMC error detection/correction logic is enabled.
C66xx_0: GEL Output: Enabling EDC ...Done 
C66xx_0: GEL Output: Configuring CPSW ...
C66xx_0: GEL Output: Configuring CPSW ...Done 
C66xx_0: GEL Output: Global Default Setup... Done.
C66xx_0: GEL Output: Invalidate All Cache...
C66xx_0: GEL Output: Invalidate All Cache... Done.
C66xx_0: GEL Output: GEL Reset...
C66xx_0: GEL Output: GEL Reset... Done.
Getting the error.writer buffer and read buffer is not the same.SPI NOR FLASH ISSUE.

  NOTE:

         I am able to successfully test the nand flash using emif in the card and i am able toget the debug prints.Please check and suggest .Pls check the console messages and suggest.

Fullscreen 2627.nor flash data.txt Download 
NOR test start
platform_device_open(deviceid=0xbb18,flags=0x0) called 
test_nor: Write test data failed errno = 0x30
test_nor: Data verification failed
test_nor: Write back original data failed errno = 0x30
NOR test complete
NOR test start
platform_device_open(deviceid=0xbb18,flags=0x0) called 
test_nor: Write test data failed errno = 0x30
test_nor: Data verification failed
test_nor: Write back original data failed errno = 0x30
NOR test complete
NOR test start
platform_device_open(deviceid=0xbb18,flags=0x0) called 
test_nor: Write test data failed errno = 0x30
test_nor: Data verification failed
test_nor: Write back original data failed errno = 0x30
NOR test complete
NOR test start
platform_device_open(deviceid=0xbb18,flags=0x0) called 
test_nor: Write test data failed errno = 0x30
test_nor: Data verification failed
test_nor: Write back original data failed errno = 0x30
NOR test complete
NOR test start
platform_device_open(deviceid=0xbb18,flags=0x0) called 
test_nor: Write test data failed errno = 0x30
test_nor: Data verification failed
test_nor: Write back original data failed errno = 0x30
NOR test complete
NOR test start
platform_device_open(deviceid=0xbb18,flags=0x0) called 
test_nor: Write test data failed errno = 0x30
test_nor: Data verification failed
test_nor: Write back original data failed errno = 0x30
NOR test complete
NOR test start
platform_device_open(deviceid=0xbb18,flags=0x0) called 
test_nor: Write test data failed errno = 0x30
test_nor: Data verification failed
test_nor: Write back original data failed errno = 0x30
NOR test complete
NOR test start
platform_device_open(deviceid=0xbb18,flags=0x0) called 
test_nor: Write test data failed errno = 0x30
test_nor: Data verification failed
platform_device_open(deviceid=0x50,flags=0x0) called 
p_info->version	= 2.00.00.15
p_info->cpu.core_count	= 8
p_info->cpu.name	= TMS320C6678
p_info->cpu.id	= 21
p_info->cpu.revision_id	= 0
p_info->cpu.silicon_revision_major	= 0
p_info->cpu.silicon_revision_minor	= 0
p_info->cpu.megamodule_revision_major	= 8
p_info->cpu.megamodule_revision_minor	= 1
p_info->cpu.endian	= 1
p_info->board_name	= TMDXEVM6678L
p_info->frequency	= 1000
p_info->board_rev	= 14
p_info->led[PLATFORM_USER_LED_CLASS].count	= 4
p_info->led[PLATFORM_SYSTEM_LED_CLASS].count	= 0
p_info->emac.port_count	= 2
EMAC port 1 connected to the PHY.
MAC Address = 10:ce:a9:c0:a0:e7
platform_device_open(deviceid=0xbb18,flags=0x0) called 

NOR Device: 
p_device->device_id	= 47896
p_device->manufacturer_id	= 32
p_device->width	= 8
p_device->block_count	= 256
p_device->page_count	= 256
p_device->page_size	= 256
p_device->spare_size	= 0
p_device->handle	= 47896
p_device->flags	= 0
p_device->bboffset	= 0
NOR test start
platform_device_open(deviceid=0xbb18,flags=0x0) called 
test_nor: Write test data failed errno = 0x30
test_nor: Data verification failed
test_nor: Write back original data failed errno = 0x30
NOR test complete
NOR test start
platform_device_open(deviceid=0xbb18,flags=0x0) called 
test_nor: Write test data failed errno = 0x30
test_nor: Data verification failed
test_nor: Write back original data failed errno = 0x30
NOR test complete
NOR test start
platform_device_open(deviceid=0xbb18,flags=0x0) called 
test_nor: Write test data failed errno = 0x30
test_nor: Data verification failed
test_nor: Write back original data failed errno = 0x30
NOR test complete

  • 0 in reply to Shankari G
    TI__Mastermind 25535 points

    Thilak,

    Follow this Video material for Nor-writer program.

    This will read back and verify the data after writing into the NOR-flash memory.

    Follow the videos, sequentially.

    Regards

    Shankari G