Dear TI Team,
we are currently working on activation and testing of DDR memory SECDED protection on our Jacinto 7 custom board and faced some difficulties, which hopefully you could help us with.
With help of other threads at E2E we could activate ECC for some sub-region of memory, make some fault injection tests and for the first look it works, but we still cannot understand and explain some behavior.
Here is a list of things, which we do not understand:
- What is the memory layout in case of the activated ECC? I suppose there are two models, one with deactivated ECC and one with the activated one. It explains why we need to reserve 1/9 of memory independently on the protected range sizes, just cause two layouts are fixed.
In the SDL library I found the function DDRGetTranslatedAddress, which I suppose translates a 'user-view' address to a address of data or Hamming code for it in case of the activated SECDED. With which function I was able to inject single/multiple bits error in different parts of the protected region, but what I cannot understand, how it works if I try to calculate and corrupt data for the address close to the end of memory.
If we assume that DDR memory range is 0x80000000-0x9FFFFFFF (512Mb) and it is completely protected, available range is something like 0x80000000-0x9C71C71C. If we apply DDRGetTranslatedAddress to the last address, we get 0xB000001C, what is far outside of the memory range. So how it works, does the function works correctly for the whole range? - Protected regions are defined by upper 19-bits (out of 35) of its start and end addresses (DDRSS_ECC_Rx_STR_ADDR_REG). So either protected range is rounded up or down. By injection tests I observe that range is rounded up, but currently we have a board with wrong DDR chip connection (only part of DRAM is accessible), so I'm not sure that everything is configured correctly in our case.
Therefore the question is - are protected regions are rounded up or down to be 64Kb aligned? As a simple example, if DDRSS_ECC_R0_STR_ADDR_REG = 0x1000 and DDRSS_ECC_R0_END_ADDR_REG = 0x1FFF, is the protected region 0x90000000-0x9FFFFFFF or 0x90000000-0x9FFF0000? Acc. to my check it is rounded up but I couldn't confirm it by the TRM.
Best regards,
Dmitry
