The sdk version is ti-processor-sdk-linux-am62xx-evm-08.04.01.03

This is the last part of the information printed by the serial port:

clk_get_parent(clk=7000be40)
--->>> LPDDR4 Initialization is in progress ... <<<---
LPDDR4_Start: PASS
fdtdec_setup_mem_size_base: Initial DRAM size x
TLB table from ffffc000 to 00000000
SPL malloc() before relocation used 0x6d50 bytes (27 KB)
>>SPL: board_init_r()
using memory lx-lx for malloc()
spl_init
fdtdec_setup_memory_banksize: DRAM Bank #0: start = 0xx, size = 0xx
am625_init: spl_boot_device: devstat = 0xe43 bootmedia = 0x8 bootindex = 0
Trying to boot from MMC2
0 1
- 0 -1 'mmc@fa10000'
- 1 -1 'mmc@fa00000'
- not found
1 1
- 0 -1 'mmc@fa10000'
- 1 -1 'mmc@fa00000'
- found
size=x, ptr=80, limit=80: 81f00000
size=x, ptr=4, limit=84: 81f00080
OF: ** translation for device mmc@fa00000 **
OF: bus is default (na=2, ns=2) on bus@f0000
OF: translating address: 00000000 0000a00f
OF: parent bus is default (na=2, ns=2) on
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 0000000e
OF: with offset: u
OF: one level translation: 00000000 0000a00f
OF: reached root node
ofnode_read_bool: non-removable: false
ofnode_read_u32_index: ti,strobe-sel: (not found)
ofnode_read_u32_index: ti,clkbuf-sel: x (7)
ofnode_read_u32_index: bus-width: x (4)
ofnode_read_u32_index: max-frequency: (not found)
ofnode_read_bool: cap-sd-highspeed: false
ofnode_read_bool: cap-mmc-highspeed: false
ofnode_read_bool: sd-uhs-sdr12: false
ofnode_read_bool: sd-uhs-sdr25: false
ofnode_read_bool: sd-uhs-sdr50: false
ofnode_read_bool: sd-uhs-sdr104: false
ofnode_read_bool: sd-uhs-ddr50: false
ofnode_read_bool: mmc-ddr-1_8v: false
ofnode_read_bool: mmc-ddr-1_2v: false
ofnode_read_bool: mmc-hs200-1_8v: false
ofnode_read_bool: mmc-hs200-1_2v: false
ofnode_read_bool: mmc-hs400-1_8v: false
ofnode_read_bool: mmc-hs400-1_2v: false
ofnode_read_bool: mmc-hs400-enhanced-strobe: false
ofnode_read_bool: non-removable: false
ofnode_read_bool: cd-inverted: false
ofnode_read_bool: broken-cd: false
ofnode_read_bool: no-1-8-v: false
0 1
- 0 -1 'mmc@fa10000'
- 1 -1 'mmc@fa00000'
- not found
0 -1
0 0
- -1 0 'wkup-uart0-pins-default'
- found
0 1
- -1 0 'wkup-uart0-pins-default'
- -1 2 'main-uart0-pins-default'
- -1 -1 'main-i2c0-pins-default'
- -1 -1 'main-mmc1-pins-default'
- -1 -1 'main-mdio1-pins-default'
- -1 -1 'main-rgmii1-pins-default'
- -1 -1 'main-rgmii2-pins-default'
- -1 -1 'main-usb1-pins-default'
- -1 -1 'ospi0-pins-default'
- -1 1 'main-uart1-pins-default'
- found
0 2
- -1 0 'wkup-uart0-pins-default'
- -1 2 'main-uart0-pins-default'
- found
0 3
- -1 0 'wkup-uart0-pins-default'
- -1 2 'main-uart0-pins-default'
- -1 -1 'main-i2c0-pins-default'
- -1 -1 'main-mmc1-pins-default'
- -1 -1 'main-mdio1-pins-default'
- -1 -1 'main-rgmii1-pins-default'
- -1 -1 'main-rgmii2-pins-default'
- -1 -1 'main-usb1-pins-default'
- -1 -1 'ospi0-pins-default'
- -1 1 'main-uart1-pins-default'
- not found
0 0
- -1 0 'pinctrl@4084000'
- found
pinconfig main-mmc1-pins-default: set_state_simple op missing
clk_set_defaults(main-mmc1-pins-default)
clk_set_default_parents: could not read assigned-clock-parents for 700078a4
ofnode_read_prop: assigned-clock-rates: <not found>
single-pinctrl pinctrl@f4000: configuring pins for main-mmc1-pins-default
single-pinctrl pinctrl@f4000: reg/val 0xf423c/0x00050000
single-pinctrl pinctrl@f4000: reg/val 0xf4234/0x00050000
single-pinctrl pinctrl@f4000: reg/val 0xf4230/0x00050000
single-pinctrl pinctrl@f4000: reg/val 0xf422c/0x00050000
single-pinctrl pinctrl@f4000: reg/val 0xf4228/0x00050000
single-pinctrl pinctrl@f4000: reg/val 0xf4224/0x00050000
single-pinctrl pinctrl@f4000: reg/val 0xf4240/0x00050000

It ends here.

Hello,
Will you upload the full boot log (starting from POR) as attachment?
Best,
-Hong

Hi Hong,

U-Boot SPL 2021.01-00001-g441d4eb-dirty (Dec 06 2022 - 11:17:36 +0800)
0 0
   - 0 -1 'sysctrler'
   - 1 -1 'a53@0'
   - not found
1 0
   - 0 -1 'sysctrler'
   - found
size=x, ptr=30, limit=6724: 7000d6f4
0 0
   - 0 -1 'sysctrler'
   - 1 -1 'a53@0'
   - not found
0 0
   - -1 0 'pinctrl@4084000'
   - found
k3_system_controller sysctrler: set_state_simple op missing
rproc_pre_probe: 'sysctrler': using fdt
fdtdec_get_bool: remoteproc-internal-memory-mapped
clk_set_defaults(sysctrler)
clk_set_default_parents: could not read assigned-clock-parents for 700084c8
ofnode_read_prop: assigned-clock-rates: <not found>
k3_sysctrler_probe(dev=700084c8)
mbox_get_by_name(dev=700084c8, name=tx, chan=7000d6f4)
mbox_get_by_index(dev=700084c8, index=0, chan=7000d6f4)
fdtdec_get_int: #mbox-cells: x (1)
k3_sec_proxy_of_xlate(chan=7000d6f4)
k3_sec_proxy_request(chan=7000d6f4)
mbox_get_by_name(dev=700084c8, name=rx, chan=7000d700)
mbox_get_by_index(dev=700084c8, index=1, chan=7000d700)
fdtdec_get_int: #mbox-cells: x (1)
fdtdec_get_int: #mbox-cells: x (1)
k3_sec_proxy_of_xlate(chan=7000d700)
k3_sec_proxy_request(chan=7000d700)
mbox_get_by_name(dev=700084c8, name=boot_notify, chan=7000d70c)
mbox_get_by_index(dev=700084c8, index=2, chan=7000d70c)
fdtdec_get_int: #mbox-cells: x (1)
fdtdec_get_int: #mbox-cells: x (1)
fdtdec_get_int: #mbox-cells: x (1)
size=x, ptr=20, limit=6744: 7000d724
0 -1
0 0
   - -1 0 'mailbox@4d000000'
   - found
0 1
   - -1 0 'mailbox@4d000000'
   - -1 -1 'secproxy@44880000'
   - not found
0 0
   - -1 0 'pinctrl@4084000'
   - found
k3-secure-proxy secproxy@44880000: set_state_simple op missing
clk_set_defaults(secproxy@44880000)
clk_set_default_parents: could not read assigned-clock-parents for 7000845c
ofnode_read_prop: assigned-clock-rates: <not found>
k3_sec_proxy_probe(dev=7000845c)
OF: ** translation for device secproxy@44880000 **
OF: bus is default (na=2, ns=2) on bus@f0000
OF: translating address: 00000000 00006043
OF: parent bus is default (na=2, ns=2) on 
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 00006043
OF: with offset: u
OF: one level translation: 00000000 00006043
OF: reached root node
OF: ** translation for device secproxy@44880000 **
OF: bus is default (na=2, ns=2) on bus@f0000
OF: translating address: 00000000 00008644
OF: parent bus is default (na=2, ns=2) on 
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 00008644
OF: with offset: u
OF: one level translation: 00000000 00008644
OF: reached root node
OF: ** translation for device secproxy@44880000 **
OF: bus is default (na=2, ns=2) on bus@f0000
OF: translating address: 00000000 00008844
OF: parent bus is default (na=2, ns=2) on 
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 00008644
OF: with offset: u
OF: one level translation: 00000000 00008844
OF: reached root node
size=x, ptr=12c, limit=6870: 7000d744
size=x, ptr=3c, limit=68ac: 7000d870
size=x, ptr=3c, limit=68e8: 7000d8ac
size=x, ptr=3c, limit=6924: 7000d8e8
size=x, ptr=3c, limit=6960: 7000d924
size=x, ptr=3c, limit=699c: 7000d960
size=x, ptr=3c, limit=69d8: 7000d99c
size=x, ptr=3c, limit=6a14: 7000d9d8
size=x, ptr=3c, limit=6a50: 7000da14
size=x, ptr=3c, limit=6a8c: 7000da50
size=x, ptr=3c, limit=6ac8: 7000da8c
size=x, ptr=3c, limit=6b04: 7000dac8
size=x, ptr=3c, limit=6b40: 7000db04
size=x, ptr=3c, limit=6b7c: 7000db40
size=x, ptr=3c, limit=6bb8: 7000db7c
size=x, ptr=3c, limit=6bf4: 7000dbb8
k3_sec_proxy_of_xlate(chan=7000d70c)
k3_sec_proxy_request(chan=7000d70c)
0 0
   - 0 0 'sysctrler'
   - found
_rproc_ops_wrapper: Starting sysctrler...
k3_sysctrler_start(dev=700084c8)
mbox_recv(chan=7000d70c, data=70006e68, timeout_us=800000)
k3_sec_proxy_recv(chan=7000d70c, data=70006e68)
k3_sec_proxy_recv: Message successfully received from thread 0
k3_sysctrler_boot_notification_response: Boot notification received
k3_sysctrler_start: Boot notification received successfully on dev sysctrler
SYSFW ABI: 3.1 (firmware rev 0x0008 '8.4.7--v08.04.07 (Jolly Jellyfi')
0 -1
0 0
   - -1 -1 'esm@4100000'
   - -1 -1 'esm@420000'
   - not found
0 0
   - -1 0 'pinctrl@4084000'
   - found
k3_esm esm@420000: set_state_simple op missing
clk_set_defaults(esm@420000)
clk_set_default_parents: could not read assigned-clock-parents for 70008528
ofnode_read_prop: assigned-clock-rates: <not found>
OF: ** translation for device esm@420000 **
OF: bus is default (na=2, ns=2) on bus@f0000
OF: translating address: 00000000 00004200
OF: parent bus is default (na=2, ns=2) on 
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 00004200
OF: with offset: u
OF: one level translation: 00000000 00004200
OF: reached root node
ofnode_read_prop: ti,esm-pins: size=x, ptr=40, limit=6c40: aligned to 7000dc00
ofnode_read_u32_array: ti,esm-pins: fdtdec_get_int_array: ti,esm-pins
get_prop_check_min_len: ti,esm-pins
0 -1
0 0
   - -1 -1 'esm@4100000'
   - -1 0 'esm@420000'
   - found
0 1
   - -1 -1 'esm@4100000'
   - -1 0 'esm@420000'
   - not found
0 0
   - -1 0 'pinctrl@4084000'
   - found
k3_esm esm@4100000: set_state_simple op missing
clk_set_defaults(esm@4100000)
clk_set_default_parents: could not read assigned-clock-parents for 70007248
ofnode_read_prop: assigned-clock-rates: <not found>
OF: ** translation for device esm@4100000 **
OF: bus is default (na=2, ns=2) on bus@4000000
OF: translating address: 00000000 00001004
OF: parent bus is default (na=2, ns=2) on bus@f0000
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 00000004
OF: with offset: u
OF: one level translation: 00000000 00001004
OF: parent bus is default (na=2, ns=2) on 
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 00000004
OF: with offset: u
OF: one level translation: 00000000 00001004
OF: reached root node
ofnode_read_prop: ti,esm-pins: size=x, ptr=40, limit=6c80: aligned to 7000dc40
ofnode_read_u32_array: ti,esm-pins: fdtdec_get_int_array: ti,esm-pins
get_prop_check_min_len: ti,esm-pins
size=x, ptr=d0, limit=6d50: 7000dc80
0 -1
0 0
   - -1 -1 'memorycontroller@f300000'
   - not found
0 0
   - -1 0 'pinctrl@4084000'
   - found
k3_ddrss memorycontroller@f300000: set_state_simple op missing
fdtdec_get_int: #power-domain-cells: x (2)
fdtdec_get_int: #power-domain-cells: x (2)
power_domain_get_by_index(dev=70008594, power_domain=70006ebc)
fdtdec_get_int: #power-domain-cells: x (2)
ti_power_domain_of_xlate(power_domain=70006ebc, id=170)
power_domain_on(power_domain=70006ebc)
ti_power_domain_on(pd=70006ebc, id=9)
ti_lpsc_transition: transitioning psc:1, lpsc:9 to 3
psc_read: 0x100 from 400a24
psc_read: 0x1 from 400300
psc_write: 0x103 to 400a24
psc_write: 0x1 to 400120
psc_read: 0x1 from 400128
psc_read: 0x0 from 400128
psc_read: 0x1f03 from 400824
power_domain_get_by_index(dev=70008594, power_domain=70006ebc)
fdtdec_get_int: #power-domain-cells: x (2)
fdtdec_get_int: #power-domain-cells: x (2)
ti_power_domain_of_xlate(power_domain=70006ebc, id=55)
power_domain_on(power_domain=70006ebc)
ti_power_domain_on(pd=70006ebc, id=11)
ti_lpsc_transition: transitioning psc:1, lpsc:11 to 3
ti_lpsc_transition: transitioning psc:1, lpsc:10 to 3
psc_read: 0x100 from 400a28
psc_write: 0x103 to 400a28
psc_write: 0x1 to 400120
psc_read: 0x0 from 400128
psc_read: 0x1f03 from 400828
psc_read: 0x100 from 400a2c
psc_write: 0x103 to 400a2c
psc_write: 0x1 to 400120
psc_read: 0x0 from 400128
psc_read: 0x1f03 from 40082c
clk_set_defaults(memorycontroller@f300000)
clk_set_default_parents: could not read assigned-clock-parents for 70008594
ofnode_read_prop: assigned-clock-rates: <not found>
k3_ddrss_probe(dev=70008594)
k3_ddrss_ofdata_to_priv(dev=70008594)
OF: ** translation for device memorycontroller@f300000 **
OF: bus is default (na=2, ns=2) on 
OF: translating address: 00000000 0080300f
OF: reached root node
OF: ** translation for device memorycontroller@f300000 **
OF: bus is default (na=2, ns=2) on 
OF: translating address: 00000000 00400143
OF: reached root node
OF: ** translation for device memorycontroller@f300000 **
OF: bus is default (na=2, ns=2) on 
OF: translating address: 00000000 0000300f
OF: reached root node
power_domain_get_by_index(dev=70008594, power_domain=7000dc90)
fdtdec_get_int: #power-domain-cells: x (2)
ti_power_domain_of_xlate(power_domain=7000dc90, id=170)
power_domain_get_by_index(dev=70008594, power_domain=7000dc9c)
fdtdec_get_int: #power-domain-cells: x (2)
fdtdec_get_int: #power-domain-cells: x (2)
ti_power_domain_of_xlate(power_domain=7000dc9c, id=55)
fdtdec_get_int: #clock-cells: x (2)
ti_clk_of_xlate(clk=7000dca8, args_count=2 [0]=170 [1]=0)
clk_request(dev=700076d4, clk=7000dca8)
fdtdec_get_int: #clock-cells: x (2)
fdtdec_get_int: #clock-cells: x (2)
ti_clk_of_xlate(clk=7000dcc8, args_count=2 [0]=16 [1]=4)
clk_request(dev=700076d4, clk=7000dcc8)
ofnode_read_u32_index: ti,ddr-freq0: (not found)
clk_get_rate(clk=7000dcc8)
clk_get_rate(clk=700095c0)
clk_get_parent_rate(clk=700095c0)
clk_get_parent(clk=700095c0)
k3_ddrss memorycontroller@f300000: ddr freq0 not populated, using bypass frequency 25000000
ofnode_read_u32_index: ti,ddr-freq1: x (400000000)
ofnode_read_u32_index: ti,ddr-freq2: x (400000000)
ofnode_read_u32_index: ti,ddr-fhs-cnt: x (6)
ofnode_read_bool: ti,ecc-enable: false
k3_ddrss_power_on(ddrss=7000dc80)
power_domain_on(power_domain=7000dc90)
ti_power_domain_on(pd=7000dc90, id=9)
power_domain_on(power_domain=7000dc9c)
ti_power_domain_on(pd=7000dc9c, id=11)
k3_ddrss memorycontroller@f300000: vtt-supply not found.
LPDDR4_Probe: PASS
LPDDR4_Init: PASS
ofnode_read_u32_array: ti,ctl-data: fdtdec_get_int_array: ti,ctl-data
get_prop_check_min_len: ti,ctl-data
ofnode_read_u32_array: ti,pi-data: fdtdec_get_int_array: ti,pi-data
get_prop_check_min_len: ti,pi-data
ofnode_read_u32_array: ti,phy-data: fdtdec_get_int_array: ti,phy-data
get_prop_check_min_len: ti,phy-data
clk_set_rate(clk=7000dca8, rate=400000000)
clk_get_rate(clk=7000be40)
clk_get_parent_rate(clk=7000be40)
clk_get_parent(clk=7000be40)
clk_get_rate(clk=7000b000)
clk_get_parent_rate(clk=7000b000)
clk_get_parent(clk=7000b000)
clk_set_rate(clk=7000be40, rate=400000000)
clk_get_parent_rate(clk=7000be40)
clk_get_parent(clk=7000be40)
clk_get_rate(clk=7000be40)
clk_get_parent_rate(clk=7000be40)
clk_get_parent(clk=7000be40)
ti_clk_set_rate: clk=hsdiv0_16fft_main_12_hsdivout0_clk, div=1, rate=400000000, new_rate=25000000, diff=375000000
ti_clk_set_rate: propagating rate change to parent, rate=400000000.
clk_get_parent(clk=7000be40)
ti_clk_set_rate: pll_tgt=800000000, rate=400000000, div=2
clk_set_rate(clk=7000b000, rate=800000000)
clk_get_parent_rate(clk=7000b000)
clk_get_parent(clk=7000b000)
ti_pll_clk_set_rate(clk=7000b000, rate=800000000)
clk_get_parent_rate(clk=7000b000)
clk_get_parent(clk=7000b000)
ti_pll_clk_set_rate: pre-frac-calc: rate=800000000, parent_freq=25000000, plld=1, pllm=32
ti_pll_clk_set_rate: pllm=32, plld=1, pllfm=0, parent_freq=25000000
clk_set_rate(clk=7000be40, rate=400000000)
clk_get_parent_rate(clk=7000be40)
clk_get_parent(clk=7000be40)
clk_get_rate(clk=7000b000)
clk_get_parent_rate(clk=7000b000)
clk_get_parent(clk=7000b000)
clk_get_rate(clk=7000be40)
clk_get_parent_rate(clk=7000be40)
clk_get_parent(clk=7000be40)
--->>> LPDDR4 Initialization is in progress ... <<<---
LPDDR4_Start: PASS
fdtdec_setup_mem_size_base: Initial DRAM size x
TLB table from ffffc000 to 00000000
SPL malloc() before relocation used 0x6d50 bytes (27 KB)
>>SPL: board_init_r()
using memory lx-lx for malloc()
spl_init
fdtdec_setup_memory_banksize: DRAM Bank #0: start = 0xx, size = 0xx
am625_init: spl_boot_device: devstat = 0xe43 bootmedia = 0x8 bootindex = 0
Trying to boot from MMC2
0 1
   - 0 -1 'mmc@fa10000'
   - 1 -1 'mmc@fa00000'
   - not found
1 1
   - 0 -1 'mmc@fa10000'
   - 1 -1 'mmc@fa00000'
   - found
size=x, ptr=80, limit=80: 81f00000
size=x, ptr=4, limit=84: 81f00080
OF: ** translation for device mmc@fa00000 **
OF: bus is default (na=2, ns=2) on bus@f0000
OF: translating address: 00000000 0000a00f
OF: parent bus is default (na=2, ns=2) on 
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 0000000e
OF: with offset: u
OF: one level translation: 00000000 0000a00f
OF: reached root node
ofnode_read_bool: non-removable: false
ofnode_read_u32_index: ti,strobe-sel: (not found)
ofnode_read_u32_index: ti,clkbuf-sel: x (7)
ofnode_read_u32_index: bus-width: x (4)
ofnode_read_u32_index: max-frequency: (not found)
ofnode_read_bool: cap-sd-highspeed: false
ofnode_read_bool: cap-mmc-highspeed: false
ofnode_read_bool: sd-uhs-sdr12: false
ofnode_read_bool: sd-uhs-sdr25: false
ofnode_read_bool: sd-uhs-sdr50: false
ofnode_read_bool: sd-uhs-sdr104: false
ofnode_read_bool: sd-uhs-ddr50: false
ofnode_read_bool: mmc-ddr-1_8v: false
ofnode_read_bool: mmc-ddr-1_2v: false
ofnode_read_bool: mmc-hs200-1_8v: false
ofnode_read_bool: mmc-hs200-1_2v: false
ofnode_read_bool: mmc-hs400-1_8v: false
ofnode_read_bool: mmc-hs400-1_2v: false
ofnode_read_bool: mmc-hs400-enhanced-strobe: false
ofnode_read_bool: non-removable: false
ofnode_read_bool: cd-inverted: false
ofnode_read_bool: broken-cd: false
ofnode_read_bool: no-1-8-v: false
0 1
   - 0 -1 'mmc@fa10000'
   - 1 -1 'mmc@fa00000'
   - not found
0 -1
0 0
   - -1 0 'wkup-uart0-pins-default'
   - found
0 1
   - -1 0 'wkup-uart0-pins-default'
   - -1 2 'main-uart0-pins-default'
   - -1 -1 'main-i2c0-pins-default'
   - -1 -1 'main-mmc1-pins-default'
   - -1 -1 'main-mdio1-pins-default'
   - -1 -1 'main-rgmii1-pins-default'
   - -1 -1 'main-rgmii2-pins-default'
   - -1 -1 'main-usb1-pins-default'
   - -1 -1 'ospi0-pins-default'
   - -1 1 'main-uart1-pins-default'
   - found
0 2
   - -1 0 'wkup-uart0-pins-default'
   - -1 2 'main-uart0-pins-default'
   - found
0 3
   - -1 0 'wkup-uart0-pins-default'
   - -1 2 'main-uart0-pins-default'
   - -1 -1 'main-i2c0-pins-default'
   - -1 -1 'main-mmc1-pins-default'
   - -1 -1 'main-mdio1-pins-default'
   - -1 -1 'main-rgmii1-pins-default'
   - -1 -1 'main-rgmii2-pins-default'
   - -1 -1 'main-usb1-pins-default'
   - -1 -1 'ospi0-pins-default'
   - -1 1 'main-uart1-pins-default'
   - not found
0 0
   - -1 0 'pinctrl@4084000'
   - found
pinconfig main-mmc1-pins-default: set_state_simple op missing
clk_set_defaults(main-mmc1-pins-default)
clk_set_default_parents: could not read assigned-clock-parents for 700078a4
ofnode_read_prop: assigned-clock-rates: <not found>
single-pinctrl pinctrl@f4000: configuring pins for main-mmc1-pins-default
single-pinctrl pinctrl@f4000:   reg/val 0xf423c/0x00050000
single-pinctrl pinctrl@f4000:   reg/val 0xf4234/0x00050000
single-pinctrl pinctrl@f4000:   reg/val 0xf4230/0x00050000
single-pinctrl pinctrl@f4000:   reg/val 0xf422c/0x00050000
single-pinctrl pinctrl@f4000:   reg/val 0xf4228/0x00050000
single-pinctrl pinctrl@f4000:   reg/val 0xf4224/0x00050000
single-pinctrl pinctrl@f4000:   reg/val 0xf4240/0x00050000

Best,

Katherine

U-Boot SPL 2021.01-00001-g441d4eb-dirty (Dec 06 2022 - 11:17:36 +0800)
0 0
   - 0 -1 'sysctrler'
   - 1 -1 'a53@0'
   - not found
1 0
   - 0 -1 'sysctrler'
   - found
size=x, ptr=30, limit=6724: 7000d6f4
0 0
   - 0 -1 'sysctrler'
   - 1 -1 'a53@0'
   - not found
0 0
   - -1 0 'pinctrl@4084000'
   - found
k3_system_controller sysctrler: set_state_simple op missing
rproc_pre_probe: 'sysctrler': using fdt
fdtdec_get_bool: remoteproc-internal-memory-mapped
clk_set_defaults(sysctrler)
clk_set_default_parents: could not read assigned-clock-parents for 700084c8
ofnode_read_prop: assigned-clock-rates: <not found>
k3_sysctrler_probe(dev=700084c8)
mbox_get_by_name(dev=700084c8, name=tx, chan=7000d6f4)
mbox_get_by_index(dev=700084c8, index=0, chan=7000d6f4)
fdtdec_get_int: #mbox-cells: x (1)
k3_sec_proxy_of_xlate(chan=7000d6f4)
k3_sec_proxy_request(chan=7000d6f4)
mbox_get_by_name(dev=700084c8, name=rx, chan=7000d700)
mbox_get_by_index(dev=700084c8, index=1, chan=7000d700)
fdtdec_get_int: #mbox-cells: x (1)
fdtdec_get_int: #mbox-cells: x (1)
k3_sec_proxy_of_xlate(chan=7000d700)
k3_sec_proxy_request(chan=7000d700)
mbox_get_by_name(dev=700084c8, name=boot_notify, chan=7000d70c)
mbox_get_by_index(dev=700084c8, index=2, chan=7000d70c)
fdtdec_get_int: #mbox-cells: x (1)
fdtdec_get_int: #mbox-cells: x (1)
fdtdec_get_int: #mbox-cells: x (1)
size=x, ptr=20, limit=6744: 7000d724
0 -1
0 0
   - -1 0 'mailbox@4d000000'
   - found
0 1
   - -1 0 'mailbox@4d000000'
   - -1 -1 'secproxy@44880000'
   - not found
0 0
   - -1 0 'pinctrl@4084000'
   - found
k3-secure-proxy secproxy@44880000: set_state_simple op missing
clk_set_defaults(secproxy@44880000)
clk_set_default_parents: could not read assigned-clock-parents for 7000845c
ofnode_read_prop: assigned-clock-rates: <not found>
k3_sec_proxy_probe(dev=7000845c)
OF: ** translation for device secproxy@44880000 **
OF: bus is default (na=2, ns=2) on bus@f0000
OF: translating address: 00000000 00006043
OF: parent bus is default (na=2, ns=2) on 
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 00006043
OF: with offset: u
OF: one level translation: 00000000 00006043
OF: reached root node
OF: ** translation for device secproxy@44880000 **
OF: bus is default (na=2, ns=2) on bus@f0000
OF: translating address: 00000000 00008644
OF: parent bus is default (na=2, ns=2) on 
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 00008644
OF: with offset: u
OF: one level translation: 00000000 00008644
OF: reached root node
OF: ** translation for device secproxy@44880000 **
OF: bus is default (na=2, ns=2) on bus@f0000
OF: translating address: 00000000 00008844
OF: parent bus is default (na=2, ns=2) on 
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 00008644
OF: with offset: u
OF: one level translation: 00000000 00008844
OF: reached root node
size=x, ptr=12c, limit=6870: 7000d744
size=x, ptr=3c, limit=68ac: 7000d870
size=x, ptr=3c, limit=68e8: 7000d8ac
size=x, ptr=3c, limit=6924: 7000d8e8
size=x, ptr=3c, limit=6960: 7000d924
size=x, ptr=3c, limit=699c: 7000d960
size=x, ptr=3c, limit=69d8: 7000d99c
size=x, ptr=3c, limit=6a14: 7000d9d8
size=x, ptr=3c, limit=6a50: 7000da14
size=x, ptr=3c, limit=6a8c: 7000da50
size=x, ptr=3c, limit=6ac8: 7000da8c
size=x, ptr=3c, limit=6b04: 7000dac8
size=x, ptr=3c, limit=6b40: 7000db04
size=x, ptr=3c, limit=6b7c: 7000db40
size=x, ptr=3c, limit=6bb8: 7000db7c
size=x, ptr=3c, limit=6bf4: 7000dbb8
k3_sec_proxy_of_xlate(chan=7000d70c)
k3_sec_proxy_request(chan=7000d70c)
0 0
   - 0 0 'sysctrler'
   - found
_rproc_ops_wrapper: Starting sysctrler...
k3_sysctrler_start(dev=700084c8)
mbox_recv(chan=7000d70c, data=70006e68, timeout_us=800000)
k3_sec_proxy_recv(chan=7000d70c, data=70006e68)
k3_sec_proxy_recv: Message successfully received from thread 0
k3_sysctrler_boot_notification_response: Boot notification received
k3_sysctrler_start: Boot notification received successfully on dev sysctrler
SYSFW ABI: 3.1 (firmware rev 0x0008 '8.4.7--v08.04.07 (Jolly Jellyfi')
0 -1
0 0
   - -1 -1 'esm@4100000'
   - -1 -1 'esm@420000'
   - not found
0 0
   - -1 0 'pinctrl@4084000'
   - found
k3_esm esm@420000: set_state_simple op missing
clk_set_defaults(esm@420000)
clk_set_default_parents: could not read assigned-clock-parents for 70008528
ofnode_read_prop: assigned-clock-rates: <not found>
OF: ** translation for device esm@420000 **
OF: bus is default (na=2, ns=2) on bus@f0000
OF: translating address: 00000000 00004200
OF: parent bus is default (na=2, ns=2) on 
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 00004200
OF: with offset: u
OF: one level translation: 00000000 00004200
OF: reached root node
ofnode_read_prop: ti,esm-pins: size=x, ptr=40, limit=6c40: aligned to 7000dc00
ofnode_read_u32_array: ti,esm-pins: fdtdec_get_int_array: ti,esm-pins
get_prop_check_min_len: ti,esm-pins
0 -1
0 0
   - -1 -1 'esm@4100000'
   - -1 0 'esm@420000'
   - found
0 1
   - -1 -1 'esm@4100000'
   - -1 0 'esm@420000'
   - not found
0 0
   - -1 0 'pinctrl@4084000'
   - found
k3_esm esm@4100000: set_state_simple op missing
clk_set_defaults(esm@4100000)
clk_set_default_parents: could not read assigned-clock-parents for 70007248
ofnode_read_prop: assigned-clock-rates: <not found>
OF: ** translation for device esm@4100000 **
OF: bus is default (na=2, ns=2) on bus@4000000
OF: translating address: 00000000 00001004
OF: parent bus is default (na=2, ns=2) on bus@f0000
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 00000004
OF: with offset: u
OF: one level translation: 00000000 00001004
OF: parent bus is default (na=2, ns=2) on 
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 00000004
OF: with offset: u
OF: one level translation: 00000000 00001004
OF: reached root node
ofnode_read_prop: ti,esm-pins: size=x, ptr=40, limit=6c80: aligned to 7000dc40
ofnode_read_u32_array: ti,esm-pins: fdtdec_get_int_array: ti,esm-pins
get_prop_check_min_len: ti,esm-pins
size=x, ptr=d0, limit=6d50: 7000dc80
0 -1
0 0
   - -1 -1 'memorycontroller@f300000'
   - not found
0 0
   - -1 0 'pinctrl@4084000'
   - found
k3_ddrss memorycontroller@f300000: set_state_simple op missing
fdtdec_get_int: #power-domain-cells: x (2)
fdtdec_get_int: #power-domain-cells: x (2)
power_domain_get_by_index(dev=70008594, power_domain=70006ebc)
fdtdec_get_int: #power-domain-cells: x (2)
ti_power_domain_of_xlate(power_domain=70006ebc, id=170)
power_domain_on(power_domain=70006ebc)
ti_power_domain_on(pd=70006ebc, id=9)
ti_lpsc_transition: transitioning psc:1, lpsc:9 to 3
psc_read: 0x100 from 400a24
psc_read: 0x1 from 400300
psc_write: 0x103 to 400a24
psc_write: 0x1 to 400120
psc_read: 0x1 from 400128
psc_read: 0x0 from 400128
psc_read: 0x1f03 from 400824
power_domain_get_by_index(dev=70008594, power_domain=70006ebc)
fdtdec_get_int: #power-domain-cells: x (2)
fdtdec_get_int: #power-domain-cells: x (2)
ti_power_domain_of_xlate(power_domain=70006ebc, id=55)
power_domain_on(power_domain=70006ebc)
ti_power_domain_on(pd=70006ebc, id=11)
ti_lpsc_transition: transitioning psc:1, lpsc:11 to 3
ti_lpsc_transition: transitioning psc:1, lpsc:10 to 3
psc_read: 0x100 from 400a28
psc_write: 0x103 to 400a28
psc_write: 0x1 to 400120
psc_read: 0x0 from 400128
psc_read: 0x1f03 from 400828
psc_read: 0x100 from 400a2c
psc_write: 0x103 to 400a2c
psc_write: 0x1 to 400120
psc_read: 0x0 from 400128
psc_read: 0x1f03 from 40082c
clk_set_defaults(memorycontroller@f300000)
clk_set_default_parents: could not read assigned-clock-parents for 70008594
ofnode_read_prop: assigned-clock-rates: <not found>
k3_ddrss_probe(dev=70008594)
k3_ddrss_ofdata_to_priv(dev=70008594)
OF: ** translation for device memorycontroller@f300000 **
OF: bus is default (na=2, ns=2) on 
OF: translating address: 00000000 0080300f
OF: reached root node
OF: ** translation for device memorycontroller@f300000 **
OF: bus is default (na=2, ns=2) on 
OF: translating address: 00000000 00400143
OF: reached root node
OF: ** translation for device memorycontroller@f300000 **
OF: bus is default (na=2, ns=2) on 
OF: translating address: 00000000 0000300f
OF: reached root node
power_domain_get_by_index(dev=70008594, power_domain=7000dc90)
fdtdec_get_int: #power-domain-cells: x (2)
ti_power_domain_of_xlate(power_domain=7000dc90, id=170)
power_domain_get_by_index(dev=70008594, power_domain=7000dc9c)
fdtdec_get_int: #power-domain-cells: x (2)
fdtdec_get_int: #power-domain-cells: x (2)
ti_power_domain_of_xlate(power_domain=7000dc9c, id=55)
fdtdec_get_int: #clock-cells: x (2)
ti_clk_of_xlate(clk=7000dca8, args_count=2 [0]=170 [1]=0)
clk_request(dev=700076d4, clk=7000dca8)
fdtdec_get_int: #clock-cells: x (2)
fdtdec_get_int: #clock-cells: x (2)
ti_clk_of_xlate(clk=7000dcc8, args_count=2 [0]=16 [1]=4)
clk_request(dev=700076d4, clk=7000dcc8)
ofnode_read_u32_index: ti,ddr-freq0: (not found)
clk_get_rate(clk=7000dcc8)
clk_get_rate(clk=700095c0)
clk_get_parent_rate(clk=700095c0)
clk_get_parent(clk=700095c0)
k3_ddrss memorycontroller@f300000: ddr freq0 not populated, using bypass frequency 25000000
ofnode_read_u32_index: ti,ddr-freq1: x (400000000)
ofnode_read_u32_index: ti,ddr-freq2: x (400000000)
ofnode_read_u32_index: ti,ddr-fhs-cnt: x (6)
ofnode_read_bool: ti,ecc-enable: false
k3_ddrss_power_on(ddrss=7000dc80)
power_domain_on(power_domain=7000dc90)
ti_power_domain_on(pd=7000dc90, id=9)
power_domain_on(power_domain=7000dc9c)
ti_power_domain_on(pd=7000dc9c, id=11)
k3_ddrss memorycontroller@f300000: vtt-supply not found.
LPDDR4_Probe: PASS
LPDDR4_Init: PASS
ofnode_read_u32_array: ti,ctl-data: fdtdec_get_int_array: ti,ctl-data
get_prop_check_min_len: ti,ctl-data
ofnode_read_u32_array: ti,pi-data: fdtdec_get_int_array: ti,pi-data
get_prop_check_min_len: ti,pi-data
ofnode_read_u32_array: ti,phy-data: fdtdec_get_int_array: ti,phy-data
get_prop_check_min_len: ti,phy-data
clk_set_rate(clk=7000dca8, rate=400000000)
clk_get_rate(clk=7000be40)
clk_get_parent_rate(clk=7000be40)
clk_get_parent(clk=7000be40)
clk_get_rate(clk=7000b000)
clk_get_parent_rate(clk=7000b000)
clk_get_parent(clk=7000b000)
clk_set_rate(clk=7000be40, rate=400000000)
clk_get_parent_rate(clk=7000be40)
clk_get_parent(clk=7000be40)
clk_get_rate(clk=7000be40)
clk_get_parent_rate(clk=7000be40)
clk_get_parent(clk=7000be40)
ti_clk_set_rate: clk=hsdiv0_16fft_main_12_hsdivout0_clk, div=1, rate=400000000, new_rate=25000000, diff=375000000
ti_clk_set_rate: propagating rate change to parent, rate=400000000.
clk_get_parent(clk=7000be40)
ti_clk_set_rate: pll_tgt=800000000, rate=400000000, div=2
clk_set_rate(clk=7000b000, rate=800000000)
clk_get_parent_rate(clk=7000b000)
clk_get_parent(clk=7000b000)
ti_pll_clk_set_rate(clk=7000b000, rate=800000000)
clk_get_parent_rate(clk=7000b000)
clk_get_parent(clk=7000b000)
ti_pll_clk_set_rate: pre-frac-calc: rate=800000000, parent_freq=25000000, plld=1, pllm=32
ti_pll_clk_set_rate: pllm=32, plld=1, pllfm=0, parent_freq=25000000
clk_set_rate(clk=7000be40, rate=400000000)
clk_get_parent_rate(clk=7000be40)
clk_get_parent(clk=7000be40)
clk_get_rate(clk=7000b000)
clk_get_parent_rate(clk=7000b000)
clk_get_parent(clk=7000b000)
clk_get_rate(clk=7000be40)
clk_get_parent_rate(clk=7000be40)
clk_get_parent(clk=7000be40)
--->>> LPDDR4 Initialization is in progress ... <<<---
LPDDR4_Start: PASS
fdtdec_setup_mem_size_base: Initial DRAM size x
TLB table from ffffc000 to 00000000
SPL malloc() before relocation used 0x6d50 bytes (27 KB)
>>SPL: board_init_r()
using memory lx-lx for malloc()
spl_init
fdtdec_setup_memory_banksize: DRAM Bank #0: start = 0xx, size = 0xx
am625_init: spl_boot_device: devstat = 0xe43 bootmedia = 0x8 bootindex = 0
Trying to boot from MMC2
0 1
   - 0 -1 'mmc@fa10000'
   - 1 -1 'mmc@fa00000'
   - not found
1 1
   - 0 -1 'mmc@fa10000'
   - 1 -1 'mmc@fa00000'
   - found
size=x, ptr=80, limit=80: 81f00000
size=x, ptr=4, limit=84: 81f00080
OF: ** translation for device mmc@fa00000 **
OF: bus is default (na=2, ns=2) on bus@f0000
OF: translating address: 00000000 0000a00f
OF: parent bus is default (na=2, ns=2) on 
OF: walking ranges...
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: default map, cp=x, s=x, da=x
OF: parent translation for: 00000000 0000000e
OF: with offset: u
OF: one level translation: 00000000 0000a00f
OF: reached root node
ofnode_read_bool: non-removable: false
ofnode_read_u32_index: ti,strobe-sel: (not found)
ofnode_read_u32_index: ti,clkbuf-sel: x (7)
ofnode_read_u32_index: bus-width: x (4)
ofnode_read_u32_index: max-frequency: (not found)
ofnode_read_bool: cap-sd-highspeed: false
ofnode_read_bool: cap-mmc-highspeed: false
ofnode_read_bool: sd-uhs-sdr12: false
ofnode_read_bool: sd-uhs-sdr25: false
ofnode_read_bool: sd-uhs-sdr50: false
ofnode_read_bool: sd-uhs-sdr104: false
ofnode_read_bool: sd-uhs-ddr50: false
ofnode_read_bool: mmc-ddr-1_8v: false
ofnode_read_bool: mmc-ddr-1_2v: false
ofnode_read_bool: mmc-hs200-1_8v: false
ofnode_read_bool: mmc-hs200-1_2v: false
ofnode_read_bool: mmc-hs400-1_8v: false
ofnode_read_bool: mmc-hs400-1_2v: false
ofnode_read_bool: mmc-hs400-enhanced-strobe: false
ofnode_read_bool: non-removable: false
ofnode_read_bool: cd-inverted: false
ofnode_read_bool: broken-cd: false
ofnode_read_bool: no-1-8-v: false
0 1
   - 0 -1 'mmc@fa10000'
   - 1 -1 'mmc@fa00000'
   - not found
0 -1
0 0
   - -1 0 'wkup-uart0-pins-default'
   - found
0 1
   - -1 0 'wkup-uart0-pins-default'
   - -1 2 'main-uart0-pins-default'
   - -1 -1 'main-i2c0-pins-default'
   - -1 -1 'main-mmc1-pins-default'
   - -1 -1 'main-mdio1-pins-default'
   - -1 -1 'main-rgmii1-pins-default'
   - -1 -1 'main-rgmii2-pins-default'
   - -1 -1 'main-usb1-pins-default'
   - -1 -1 'ospi0-pins-default'
   - -1 1 'main-uart1-pins-default'
   - found
0 2
   - -1 0 'wkup-uart0-pins-default'
   - -1 2 'main-uart0-pins-default'
   - found
0 3
   - -1 0 'wkup-uart0-pins-default'
   - -1 2 'main-uart0-pins-default'
   - -1 -1 'main-i2c0-pins-default'
   - -1 -1 'main-mmc1-pins-default'
   - -1 -1 'main-mdio1-pins-default'
   - -1 -1 'main-rgmii1-pins-default'
   - -1 -1 'main-rgmii2-pins-default'
   - -1 -1 'main-usb1-pins-default'
   - -1 -1 'ospi0-pins-default'
   - -1 1 'main-uart1-pins-default'
   - not found
0 0
   - -1 0 'pinctrl@4084000'
   - found
pinconfig main-mmc1-pins-default: set_state_simple op missing
clk_set_defaults(main-mmc1-pins-default)
clk_set_default_parents: could not read assigned-clock-parents for 700078a4
ofnode_read_prop: assigned-clock-rates: <not found>
single-pinctrl pinctrl@f4000: configuring pins for main-mmc1-pins-default
single-pinctrl pinctrl@f4000:   reg/val 0xf423c/0x00050000
single-pinctrl pinctrl@f4000:   reg/val 0xf4234/0x00050000
single-pinctrl pinctrl@f4000:   reg/val 0xf4230/0x00050000
single-pinctrl pinctrl@f4000:   reg/val 0xf422c/0x00050000
single-pinctrl pinctrl@f4000:   reg/val 0xf4228/0x00050000
single-pinctrl pinctrl@f4000:   reg/val 0xf4224/0x00050000
single-pinctrl pinctrl@f4000:   reg/val 0xf4240/0x00050000

Hong Guan64 said:

Will you upload the full boot log (starting from POR) as attachment?

Here is the full boot log.

Best,

Katherine

Hello,
From the log, it seems r5-spl failed to load tispl.bin from SD card.
Since it is the customer board, what SW was used to run on the customer board?
Best,
-Hong

Hi Hong,

Hong Guan64 said:

what SW was used to run on the customer board?

It is the sd card startup program of sk-am62 in ti-processor-sdk-linux-am62xx-evm-08.04.01.03.

It is different from sk-am62. We use tps65219 for power supply, and the sd card circuit is also different. The schematic diagram has been posted above. Is there an issue with our wiring? How should we modify the device tree file according to the schematic diagram and how should we modify the spl code so that it can successfully load tispl.bin?

Best,

Katherine

Hello,
Some reference on
1/. Hardware Design Guide for AM62x Devices
www.ti.com/.../sprad05.pdf
2/. Powering the AM62x with the TPS65219 PMIC
www.ti.com/.../slvafd0a.pdf
I'm looping in my colleague on his input on customer board schematic...
Best,
-Hong

Hello Katherine

Please share the schematics in a searchable PDF for us to do a quick review.

Regards,

Sreenivasa

Hi Sreenivasa

Attached schematic. 

grc01.pdf

Thanks,

Annie

Hello Annie, 

Thank you for the schematics.

Based on the thread above the issue is with the SD card interface.

Did you check any other interface and does that work?

Regards,

Sreenivasa

Hello Annie, 

The SD card implementation seems to be different with respect to the EVM.

Please review the SD card implementation with respect to the EVM.

Regards,

Sreenivasa

Hi Sreenivasa,

May I know does it have to be consistent with the SD card implementation of the EVM? Can't modify code based on wiring?

Best Regards,

Annie Liu

Hello Annie, 

Thank you for the note.

Based on my internal check, the modification is the preferred approach since the voltage is being switched after the ROM boot.  This is what we recommend.

You could change the code to not switch the voltage. This is not a common use case, and you will have to do the required modifications/testing to confirm the performance. 

Can you confirm if you have been able to test other functionalities or bootmodes on the board?

Regards,

Sreenivasa

Hi Sreenivasa,

Kallikuppa Sreenivasa said:

Can you confirm if you have been able to test other functionalities or bootmodes on the board?

NO, he cann't.

Customer wants to know what part of the code needs to be modified in order to try it out.

Best Regards,

Annie Liu

Hello Annie, 

Thank you for the note.

Annie Liu said:

Customer wants to know what part of the code needs to be modified in order to try it out.

I am not familiar with the modifications and will have to reassign.

Regards,

Sreenivasa

Hi Sreenivasa,

May I know is there any update about modifying the code?

Thanks,

Annie

Hello Annie, 

Thank you for following.

I have assigned to the expert. The expert will have to read the whole thread before answering the query.

Alternatively, please start a new thread as below 

AM625 Custom board: SD card driver's initialization fails, cause could be SD card voltage is fixed to 3.3V. Need suggestions to change the software to fix SD card voltage to 3.3V for testing.

Attache this thread as reference and additionally describe your requirement.

Please note, it would help if you could work on modifying the board if that is feasible.

Regards,

Sreenivasa

Hi Sreenivasa,

Thanks for your suggestion. I have submitted new thread to follow up software question:

(+) AM625: Custom board: SD card driver's initialization fails - Processors forum - Processors - TI E2E support forums

Thanks,

Annie

Hello Annie, 

This is great and thank you.

I want to inform you there are other errors like the Open drain i2C WKUP i2C and MCU I2C not terminated, refer pin connectivity table of datasheet, The USB interface may have to be re-reviewed with respect to the EVM and the datasheet recommendation to name a few.

Customer will have to review the schematics with respect to the datasheet and EVM.

Regards,

Sreenivasa

Hello Annie, 

I am seeing some issues with the DP83867 ethernet interface including the 3.3V clock division, MDIO termination and the bulk caps used.

Please get the PHY section reviewed by the Ethernet PHY PL.

Regards,

Sreenivasa