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TDA4AL-Q1: the power down sequence influence and check of shuting down the 3.3V power source directly.

Part Number: TDA4AL-Q1
Other Parts Discussed in Thread: TCAN1043

hi Ti team,

    our device is a CAN wakeup device.  when there is no activity on the CAN bus, TDA4 need configure the EN and STB of the TJA1043 and it will enter the sleep mode, so, the 3.3V power will be shoutdown by the INH pin of TJA1043, to keep the whole device shutdown mode power consumption  to be under 0.25mA. there are some questions need to be confirmed, please help  me to check it.

 1) is there any risk for the TDA4 system if TDA4 inform TJA1043 shutdown the 3.3V power for TDA4 system?

2)what state does the TDA4 system need to get in to be ready to inform TJA1043 to shutdown the 3.3V power?

3) can we come to the conclusion that there is no risk for the TDA4 system because of the to safe power down sequence of the TDA4 system?

the illustration.pdf

  • hi ti team,

       any updates?

  • I do not understand the system; TDA4AL has many domains of which you only show 3.3V powering the device.

    I would guess (and it is only a guess) that 3.3V is a pre-regulator for one or more PMICs that provide power to the TDA4AL device. Can you clarifiy?

    In most of the modes that partially power down the device(MCU-only, and GPIO / DDR Retention modes), the PMIC stays alive. 

  • hi kevin,

         the 3.3V is the power for the whole TDA4 system,which is indicated as "VSYS_3V3" in the TDA4 AL demo board (PROC118E4_RP). i update a power architecture illustration, please help to check it.

          when there is no activity on the CAN bus, we need to shut dwn the whole system . TDA4 AL will ask the TCAN1043 to pull the INH low, the 3.3V dcdc will be shut down and the 3.3V power VSYS_3V3 will be shut down directly. please help to check: 1)is there any risk for the TDA4 system if  VSYS_3V3 is shutdown directly? 2)what state does the TDA4 system need to get in so to be ready for VSYS_3V3 shutting down?

        

  • hi kevin,

        add the power architecture illustration, please help to check it. tks.

    the illustration_power architecture.pdf

  • When you shut down VSYS_3V3, you are going to power down the PMIC. I do not know how it will wake-up.

    I will also run this e2e past two of my colleagues.

    Kevin

  • hi kevin,

        this is a can wake device. when there is a CAN wakeup request, the can transceiver will enable VSYS_3V3, then the TDA4 will power on. there is no cancern about the power on process. what we need to check is about the powerdown process when VSYS_3V3 is shutdown by TDA4 AL directly. tks.

  • Alan,

    If you directly stop power to the PMIC, you are simply pulling the plug on the PMIC and TDA4. In this case, TPS6594 PMIC will shut down power rails as fast as possible in an "immediate shutdown" rather than going through what is termed an orderly shutdown; other PMICs must have a similar behavior though the terminology may differ. This is a possible method for shutting down the power, but my own inclination would be to shut things in the more staged way. 

    There is a software seqeunce that can be used to shut down the device and command the PMIC to power-off the device. That scheme does not rely upon the CAN device. Maybe you could shut down most of the device by going to MCU-only mode and then issuing a command to the CAN device??

    Note that the TDA4 device will not be in a sleep mode or any mode at all except unpowered when VSYS_3V3 is removed..

  • kevin,

       tks for the reply. so, how can our SW fellow to use the software sequence, in which TDA4 can go to MCU-only mode and inform the can transceiver to shut down VSYS_3V3? is there any SW package or command can make it. it will be great if there is some guide. tks.