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TDA4VM: TDA4V through mcu1_0 to boot mcu1_1 failed

Kangjia Dong
Intellectual 2015 points
Part Number: TDA4VM

Hi expert,

Customer want to use the following boot sequence, We find it will failed at MCU1_0 boot MCU1_1 stage. 

SBL->MCU1_0->MCU1_1

The same MCU1_1 code and different linker file to compile two MCU1_1 binary. It find use MSMC memory can boot success but will failed on use DDR

DDR_log.txt
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Switching core id 8, proc_id 0x1 to split mode...
Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
Sciclient_procBootSetProcessorCfg, ProcId 0x1, enabling split mode...
Sciclient_pmSetModuleState Off, DevId 0x15b...
Calling Sciclient_procBootGetProcessorState, ProcId 0x2...
Enabling MCU TCMs after reset for core 9
Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
Setting HALT for ProcId 0x2...
Sciclient_pmSetModuleState On, DevId 0x15b...
Clearing core_id 9 (lock-step) ATCM @ 0x41400000
Clearing core_id 9 (lock-step) BTCM @ 0x41410000
Copying 0x370 bytes to 0x70012000
Copying 0x8 bytes to 0xa0200000
Setting entry point for core 9 @0x70012000
Sciclient_procBootReleaseProcessor, ProcId 0x20...
Sciclient_procBootReleaseProcessor, ProcId 0x21...
Sciclient_procBootReleaseProcessor, ProcId 0x22...
Sciclient_procBootReleaseProcessor, ProcId 0x23...
Sciclient_procBootReleaseProcessor, ProcId 0x24...
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

MSMC_log.txt
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Switching core id 8, proc_id 0x1 to split mode...
Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
Sciclient_procBootSetProcessorCfg, ProcId 0x1, enabling split mode...
Sciclient_pmSetModuleState Off, DevId 0x15b...
Calling Sciclient_procBootGetProcessorState, ProcId 0x2...
Enabling MCU TCMs after reset for core 9
Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
Setting HALT for ProcId 0x2...
Sciclient_pmSetModuleState On, DevId 0x15b...
Clearing core_id 9 (lock-step) ATCM @ 0x41400000
Clearing core_id 9 (lock-step) BTCM @ 0x41410000
Copying 0x358 bytes to 0x70012000
Copying 0xc8 bytes to 0x70012358
Copying 0x48 bytes to 0x70012420
Setting entry point for core 9 @0x70012000
Sciclient_procBootReleaseProcessor, ProcId 0x20...
Sciclient_procBootReleaseProcessor, ProcId 0x21...
Sciclient_procBootReleaseProcessor, ProcId 0x22...
Sciclient_procBootReleaseProcessor, ProcId 0x23...
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

DDR_sbl_baremetal_boot_test_j784s4_evm_mcu1_1TestApp_release.xer5f(1).map

MSMC_sbl_baremetal_boot_test_j784s4_evm_mcu1_1TestApp_release.xer5f.map

  • 0
    TI__Intellectual 2015 points

    Is DDR initialized in SBL? Then there should not be reason why it does not work with DDR, whereas it works with MSMC. Which sections are keeping in DDR? Can you please make sure to keep initialization sections in internal memory like TCM? 

  • 0 in reply to Kangjia Dong
    TI__Guru**** 453815 points

    Hi Kangjia,

    As discussed, can we please answer to above questions?

    regards,

    Brijesh

  • 0
    Prodigy 110 points

    Hi,

    Add the following information: we use SBL to start MCU1_0. MCU1_0 to start MCU1_1. MCU 1_1 memory: start assembly code to put on-chip RAM, application code to put DDR;

    We have verified:

    1. VH EVM is OK; SDK 8.2

    2. our project use TDA4VM and SDK7.3. 

        2.1 MCU1_1 has passed by using test image;

        2.2 SCI always access failure when using project MCU1_1 image;

    What are some reasons why Sciclient procBootSetProcessorCfg might fail?

  • 0 in reply to Yunhang Wang
    TI__Guru**** 453815 points

    Hi Kangjia,

    Any further update on this ticket? Is this issue resolved? 

    Regards,

    Brijesh