AM62A7: MCU can not get message from SCISERVER,SCISERVER who load and run it.

Hi kingphy hozamon,

This may be because the DM is not yet running on Wakeup R5F core as I see you have put a infinite loop just after the App_runCpus funtion call for the MCU core. Could you please try letting the DM run and see if the MCU core still gets stuck.

Regards,

Prashant

Hi,thank you for your replying.I have had not this infinite loop at beginning.The debug mcu-r5 core also can not go across the sciclient init.

I have several following questions,help me to reply it please:

1.whether is sciserver in sysfw of tiboot3?

2.Whether is sciserver firmware loaded by M4?

3.Whether does sciserver run in M4 if booting from sdcard that only tiboot3 file in sdcard boot partition?

4.When does M4 stop WDT after booting?

5.Can I load sysfw mannualy?

Help me to resolve this problem,I will very appreciate you.Now I am developing the fastbooot.

Hi,

1/ The Sciserver aka DM firmware is not a part of sysfw. The DM firmware is a separate application image booted by SBL Stage2 bootloader.

2/ No, Sciserver is not loaded by M4. The SBL Stage2 loads the DM firmware and jumps to its entry point at the end of execution.

3/ The Sciserver runs on WAKEUP R5F core.

4/ The WDT is stopped as soon as SBL starts running on the WKUP R5 core.

5/ No, the sysfw is part of tiboo3.bin & is loaded by the ROM.

I hope this helps!

Regards,

Prashant

Hi,thank you!Your reply is very helpful.There is still the two I want to know:

1.What does sysfw do?

2.Can I load dm_firmware in sbl1?Because  I want boot MCU as soon as possible.

Hi,

1/ TIFS is a central controller providing security related services like firewall configurations and all. Please refer to the TISCI documentation for AM62A here

https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/index.html#am62ax

2/ It is possible. However, you need to take care of the following:

• If you want to load DM firmware in Stage 1 then you have to give up the Stage 2 Bootloader. All functionality of Stage 2 bootloader must be moved to the Stage 1 bootloader.
• Additionally, the SBL Stage 1 bootloader runs from the HSM RAM so the HSM appimage can't be loaded anymore as it would conflict with the SBL Stage 1 memory space.

Regards,

Prashant

Sorrry for so long not reply to you.And also thank you for your replying.

I search the DM firmware in sbl stage2.But I still not find it.Also I load SBL2 ok,but MCU is still stucked.

Can you show me the DM firmware's location?

Hi,

kingphy hozamon said:

Can you show me the DM firmware's location?

Any WKUP R5F core's example can work as the DM as all these WKUP R5F examples have DM integrated into them. Assuming you are using HSFS, you can find the default DM image location in the flash configuration file default_sbl_emmc_linux_hs_fs.cfg.

This config file contains the following command:

# DM image is flashed at 0xC0000 or to whatever offset your bootloader is configured for
--file=../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62ax-sk/r5fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage.hs_fs --operation=flash-emmc --flash-offset=0xC0000

which tells us the location of the WKUP R5F example's image being used as the DM.

Let me know if MCU core starts running after flashing the DM image at the right offset.

Regards,

Prashant

OK ,thank you.I get it.I may have not expressed what I want to know.I exactly want to know where the sciserver reference location is in sbl2.

I have seen some example of r5f call sciServer_init().

Does it run sciserver?

But I don't see this sciServer_init() in SBL2.

Could it be understood that all image not run after bootloader until WKUPR5F app image run?

Hi,

kingphy hozamon said:

Does it run sciserver?

Yes, you are right. The call sciServer_init() in the WKUP R5F examples (except SBLs) initializes and starts the Sciserver.

Please note all these examples are FreeRTOS examples which creates two tasks. One task is specifically dedicated for running the Sciserver while the other task executes the general purpose example code. The scheduling of these tasks is handled by the FreeRTOS scheduler.

kingphy hozamon said:

But I don't see this sciServer_init() in SBL2.

Yes, there is no such call in SBLs. This is because the SBLs are NORTOS applications and thus they cannot have a task running the DM server. Instead, the SBLs are given direct access to the DM APIs. This means the DM requests from other running cores will not be serviced since there is no DM server running yet.

Only after the SBL Stage2 finishes and jumps to the WKUP R5F application, the DM server starts running and service the DM requests from other cores.

kingphy hozamon said:

Could it be understood that all image not run after bootloader until WKUPR5F app image run?

Yes, you understand correctly. All applications mostly requires RM/PM functionality and so the DM server must be running to service such requests from the different cores.

Coming to your setup, please ensure the DM server is running after which the MCU core should not get stuck.

One simple way to confirm if the DM is running is to check the following similar looking logs on one of the four UART instances.

Sciserver Testapp Built On: Feb 24 2023 09:05:42
Sciserver Version: v2023.01.0.0REL.MCUSDK.08.06.00.10+
RM_PM_HAL Version: REL.MCUSDK.08.06.00.10
Starting Sciserver..... PASSED
GTC freq: 200000000

Regards,

Prashant

Please note all these examples are FreeRTOS examples which creates two tasks. One task is specifically dedicated for running the Sciserver while the other task executes the general purpose example code. The scheduling of these tasks is handled by the FreeRTOS scheduler.

Where is the sciserver task?Could you show it to me?