TDA4AL-Q1: NETDEV WATCHDOG: eth0 (am65-cpsw-nuss): transmit queue 0 timed out

Renf Shi

Expert 1080 points

Part Number: TDA4AL-Q1

Hi,Ti's firends

version:

ti-processor-sdk-linux-j721s2-evm-08_06_00_10

ti-processor-sdk-rtos-j721s2-evm-08_06_00_11

modle:

SBL

Error log:

root@j721s2-evm:~# [   68.163894] ------------[ cut here ]------------
[   68.168517] NETDEV WATCHDOG: eth0 (am65-cpsw-nuss): transmit queue 0 timed out
[   68.175762] WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:467 dev_watchdog+0x320/0x328
[   68.184003] Modules linked in: bluetooth ecdh_generic ecc rfkill rpmsg_char crct10dif_ce phy_can_transceiver ti_k3_r5_remoteproc ti_k3_dsp_remoteproc sa2ul cdns_dsi wave5 virtio_rpmsg_bus pvrsrvkm(O) sha512_generic authenc v4l2_mem2mem videobuf2_dma_contig videobuf2_memops videobuf2_v4l2 videobuf2_common cdns_dphy m_can_platform m_can can_dev optee_rng rng_core sch_fq_codel rpmsg_kdrv_switch cryptodev(O) ipv6
[   68.220208] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G           O      5.10.162-g76b3e88d56 #7
[   68.228708] Hardware name: Texas Instruments J721S2 EVM (DT)
[   68.234349] pstate: 20000005 (nzCv daif -PAN -UAO -TCO BTYPE=--)
[   68.240338] pc : dev_watchdog+0x320/0x328
[   68.244332] lr : dev_watchdog+0x320/0x328
[   68.248326] sp : ffff800010003db0
[   68.251627] x29: ffff800010003db0 x28: ffff000002e39940 
[   68.256922] x27: 0000000000000004 x26: 0000000000000140 
[   68.262218] x25: 00000000ffffffff x24: 0000000000000000 
[   68.267513] x23: ffff000002e383dc x22: ffff000002e38000 
[   68.272809] x21: ffff000002e38480 x20: ffff800011197000 
[   68.278104] x19: 0000000000000000 x18: 0000000000000010 
[   68.283399] x17: 0000000000000000 x16: 0000000000000000 
[   68.288694] x15: ffff8000111a1f10 x14: 00000000000001d5 
[   68.293989] x13: ffff8000111a1f10 x12: 00000000ffffffea 
[   68.299284] x11: ffff8000112205b0 x10: ffff800011208570 
[   68.304580] x9 : ffff8000112085c8 x8 : 0000000000017fe8 
[   68.309876] x7 : c0000000ffffefff x6 : 0000000000000003 
[   68.315171] x5 : 0000000000000000 x4 : 0000000000000000 
[   68.320466] x3 : 0000000000000100 x2 : 0000000000000100 
[   68.325761] x1 : 07fe66d061f82d00 x0 : 0000000000000000 
[   68.331056] Call trace:
[   68.333492]  dev_watchdog+0x320/0x328
[   68.337144]  call_timer_fn.isra.0+0x24/0x80
[   68.341312]  run_timer_softirq+0x400/0x438
[   68.345394]  efi_header_end+0x120/0x268
[   68.349216]  irq_exit+0xc0/0xe0
[   68.352345]  __handle_domain_irq+0x68/0xc0
[   68.356427]  gic_handle_irq+0x58/0x128
[   68.360160]  el1_irq+0xcc/0x180
[   68.363291]  arch_cpu_idle+0x18/0x28
[   68.366853]  default_idle_call+0x20/0x68
[   68.370762]  do_idle+0xc0/0x128
[   68.373889]  cpu_startup_entry+0x28/0x60
[   68.377797]  rest_init+0xd4/0xe4
[   68.381012]  arch_call_rest_init+0x10/0x1c
[   68.385092]  start_kernel+0x478/0x4b0
[   68.388740] ---[ end trace aa61dc5ce5a7d431 ]---
[   68.393353] am65-cpsw-nuss 46000000.ethernet eth0: txq:0 DRV_XOFF:0 tmo:7716 dql_avail:-38 free_desc:505
[   74.051898] am65-cpsw-nuss 46000000.ethernet eth0: txq:0 DRV_XOFF:0 tmo:13600 dql_avail:-38 free_desc:505
[   79.171898] am65-cpsw-nuss 46000000.ethernet eth0: txq:0 DRV_XOFF:0 tmo:18720 dql_avail:-38 free_desc:505
[   85.059897] am65-cpsw-nuss 46000000.ethernet eth0: txq:0 DRV_XOFF:0 tmo:24608 dql_avail:-38 free_desc:505
[   89.923899] am65-cpsw-nuss 46000000.ethernet eth0: txq:0 DRV_XOFF:0 tmo:29472 dql_avail:-38 free_desc:505
[   95.043897] am65-cpsw-nuss 46000000.ethernet eth0: txq:0 DRV_XOFF:0 tmo:34592 dql_avail:-38 free_desc:505
[  100.163897] am65-cpsw-nuss 46000000.ethernet eth0: txq:0 DRV_XOFF:0 tmo:39712 dql_avail:-38 free_desc:505

eth0 can ping under XPL but cannot ping under sbl.

Has this version of sbl mcu_cpsw been verified

Thanks

over 2 years ago

0 Doredla Sudheer Kumar over 2 years ago

TI__Guru 70440 points

Hi,

Can you please share full Linux terminal log.

Also, can you please confirm, have you made nay changes in device tree files related to mcu_cpsw, if so please share us the details.

Can you try to use the device tree files from /boot/ in "tisdk-default-image-j721s2-evm.tar.xz" default file system of SDK and check once.

Best Regards,
Sudheer

0 Renf Shi over 2 years ago in reply to Doredla Sudheer Kumar

Expert 1080 points

HI，

1:Only diff addr in dts.

2:PORT_MODE_SEL should be RGMII but it is RMII, so how should I configure dts？

3：linux log

ttyUSB0_2023-08-31_17-26-56.log

4:devmem2 0x40f04040 w 0x2 ,but read already 0x0000001

5：CONFIG_TI_CPSW_PHY_SEL is disable in default dts,so we open it and copy u-boot dts about cpsw-phy-sel dts.

Thanks

0 Doredla Sudheer Kumar over 2 years ago in reply to Renf Shi

TI__Guru 70440 points

Hi,

Sorry for delayed response, Will be trying to boot EVM using SBL with combined app image for Linux (A72) + MCU1_0 (ipc echo test).

Will update you the status soon.

Best Regards,
Sudheer

0 Renf Shi over 2 years ago in reply to Doredla Sudheer Kumar

Expert 1080 points

Hi,

How is the verification situation on your side, we urgently need to switch to SBL mode for development; thank you for your understanding

Thanks

+1 Doredla Sudheer Kumar over 2 years ago in reply to Renf Shi

TI__Guru 70440 points

Hi,

We are able to reproduce the issue, It is because of CTRLMMR registers are locked by default.
In case of development boot (SBL) or SPL u-boot is unlocking all CTRLMMR blocks so that Interface selection is reflecting in ENET_CTRL register.

In case of optimized boot flow (SBL), where u-boot is not present and SBL loads Linux image no one is unlocking the CTRL MMR blocks so, interface selection to RGMII from ENET_CTRL is not happening as register is locked. (write will not affect the value in register).
This is the reason where you see interface is still RMII even in device tree interface configured as RGMII.

Fix for above:
Unlock the the CTRLMMR registers in SBL or Linux.

Please refer to below changes and add the patch to <PSDK-RTOS>/pdk/packages/ti/boot/sbl/k3/sbl_main.c, where we are unlocking all CTRLMMR from sbl.

 
+#define WKUP_CTRL_MMR0_BASE			0x43000000
+#define MCU_CTRL_MMR0_BASE			0x40f00000
+#define CTRL_MMR0_BASE				0x00100000


+/*
+ * The CTRL_MMR0 memory space is divided into several equally-spaced
+ * partitions, so defining the partition size allows us to determine
+ * register addresses common to those partitions.
+*/
+#define CTRL_MMR0_PARTITION_SIZE		0x4000

+/*
+ * CTRL_MMR0, WKUP_CTRL_MMR0, and MCU_CTRL_MMR0 lock/kick-mechanism
+ * shared register definitions. The same registers are also used for
+ * PADCFG_MMR lock/kick-mechanism.
+*/
+#define CTRLMMR_LOCK_KICK0			0x1008
+#define CTRLMMR_LOCK_KICK0_UNLOCK_VAL		0x68ef3490
+#define CTRLMMR_LOCK_KICK1			0x100c
+#define CTRLMMR_LOCK_KICK1_UNLOCK_VAL		0xd172bc5a


+void CTRL_MMR_unlock(volatile uint32_t baseAddr, uint32_t partition)
+{
+	/* Get the part base address */
+	uint32_t partBaseAddr = baseAddr + (partition * CTRL_MMR0_PARTITION_SIZE);
+
+	/* Unlock the requested partition if locked using two-step sequence */
+	*(volatile uint32_t *)(partBaseAddr + CTRLMMR_LOCK_KICK0) = CTRLMMR_LOCK_KICK0_UNLOCK_VAL;
+	*(volatile uint32_t *)(partBaseAddr + CTRLMMR_LOCK_KICK1) = CTRLMMR_LOCK_KICK1_UNLOCK_VAL;
+}
+
+static void SBL_CTRL_MMR_unlock_all(void)
+{
+	/* Unlock all WKUP_CTRL_MMR0 module registers */
+	CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 0);
+	CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 1);
+	CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 2);
+	CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 3);
+	CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 4);
+	CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 6);
+	CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 7);
+
+	/* Unlock all MCU_CTRL_MMR0 module registers */
+	CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 0);
+	CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 1);
+	CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 2);
+	CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 3);
+	CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 4);
+
+	/* Unlock all CTRL_MMR0 module registers */
+	CTRL_MMR_unlock(CTRL_MMR0_BASE, 0);
+	CTRL_MMR_unlock(CTRL_MMR0_BASE, 1);
+	CTRL_MMR_unlock(CTRL_MMR0_BASE, 2);
+	CTRL_MMR_unlock(CTRL_MMR0_BASE, 3);
+	CTRL_MMR_unlock(CTRL_MMR0_BASE, 5);
+	 #if defined(SOC_J721S2)
+		CTRL_MMR_unlock(CTRL_MMR0_BASE, 6);
+	#endif
+	CTRL_MMR_unlock(CTRL_MMR0_BASE, 7);
+}


int main()
{
   ......
   
    /* Any SoC specific Init. */
    SBL_SocEarlyInit();

+    /* Unlock control MMR registers */
+    SBL_CTRL_MMR_unlock_all();

    if (SBL_LOG_LEVEL > SBL_LOG_ERR)
    {
        /* Configure UART Tx pinmux. */
        Board_uartTxPinmuxConfig();
    }

After taking above changes build "sbl_mmcsd_img_hlos" and "sbl_lib_mmcsd_hlos" as follows.
Follow step-5 and step-7 from FAQ [SBL flow with combined app image].

Best Regards,
Sudheer

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TDA4AL-Q1: NETDEV WATCHDOG: eth0 (am65-cpsw-nuss): transmit queue 0 timed out