Referencing Section 7.11.5.18 OSPI in AM62X Datasheet:
- Tap mode uses an internal reference clock with selectable taps to adjusted data transmit and receive capture delays relative to OSPI0_CLK, which is a divide by 4 of the internal reference clock for SDR transfers or a divide by 8 of the internal reference clock for DDR transfers. Tap mode only supports one clocking topology for the receive data capture clock.
- No Loopback - uses the internal reference clock as the Tap receive data capture clock. This clocking topology supports a maximum internal reference clock rate of 200 MHz, which produces an OSPI0_CLK rate up to 50 MHz for SDR mode or 25 MHz for DDR mode.
I have been operating in TAP SDR mode, however I recently noticed that the internal clock is not enabled (OSPI_RD_DATA_CAPTURE_REG[0] BYPASS_FLD = 0x0). I didn't think this was possible. There is an external loopback circuit connected, however I always assumed that it was un-used. When in TAP SDR mode, it seems like this register can still be disabled by mistake? Is it possible to use the external loopback in Tap SDR / or is this a major issue? I have not seen any performance issues thus far, but wanted to confirm the internal loopback requirement in TAP SDR mode.
The loopback is relatively low propagation delay (2,260 mils or approximately 320ps), is there a maximum specified propagation delay for TAP SDR mode such that an external loopback could still be used?
-James
