PROCESSOR-SDK-AM64X: Timer intereupt example

Genius 3186 points

Part Number: PROCESSOR-SDK-AM64X

May I have questions about AM64x Timer?

I am using MCU+SDK v9.00.00.35.

Question1:

In SDK example (ti\mcu_plus_sdk_am64x_09_00_00_35\examples\drivers),

I found the timer folder, but it was empty.

Is there any plan for release Timer example?

Question2:

I think CA53 rtos and nortos project is experimental.

Is there any plan for the example that peripherals(as timer interrupt) controled by CA53?

Question3:

My customer want to interrupt both CA53 and R5F generated by timer.

we could set timer for generate some interrupt?

In TRM,I think it seems if timer generated interrupt, automatically interrupt both.

TRM 12.5.3.3.2 Timers Integration in MAIN Domain

Or could we use interrupt router for generate 2 interrupt(for CA53 GIC and R5F) souced by timer interuupt?

Thanks,

over 2 years ago

0 Vaibhav Kumar over 2 years ago

TI__Guru 56504 points

Hello GR,

Apologies in delayed responses due to TI India Holiday.

Please expect responses within a day.

Regards,

Vaibhav

ARM Based Processors | FAQ AM62x & AM62A | FAQ AM64x

+1 Vaibhav Kumar over 2 years ago

TI__Guru 56504 points

Hello GR,

GR said:
Question1:

In SDK example (ti\mcu_plus_sdk_am64x_09_00_00_35\examples\drivers),

I found the timer folder, but it was empty.

Is there any plan for release Timer example?

I am checking this internally and I will respond as soon as I get an update on this.

GR said:
I think CA53 rtos and nortos project is experimental.

That is correct.

GR said:
Is there any plan for the example that peripherals(as timer interrupt) controled by CA53?

Do you mean to say that based on timer interrupt, the use case would be to play around with a particular peripheral, as in lets say the timer interrupt occurs and at this instance UART peripheral(for example) sends out data from TX to destination.

GR said:
Question3:

My customer want to interrupt both CA53 and R5F generated by timer.

we could set timer for generate some interrupt?

In TRM,I think it seems if timer generated interrupt, automatically interrupt both.

Allow me sometime to comment on this.

Regards,

Vaibhav

ARM Based Processors | FAQ AM62x & AM62A | FAQ AM64x

0 GR over 2 years ago in reply to Vaibhav Kumar

Genius 3186 points

Hi Vaibhav,

Thanks for your supporting.

Vaibhav Kumar said:
I am checking this internally and I will respond as soon as I get an update on this.

Vaibhav Kumar said:
Allow me sometime to comment on this.

Certainly.

Vaibhav Kumar said:
GR said:
Is there any plan for the example that peripherals(as timer interrupt) controled by CA53?

Do you mean to say that based on timer interrupt, the use case would be to play around with a particular peripheral, as in lets say the timer interrupt occurs and at this instance UART peripheral(for example) sends out data from TX to destination.

I mean Is there plan Timer interrupt sample project for CA53?

Best regards,

0 Vaibhav Kumar over 2 years ago in reply to GR

TI__Guru 56504 points

Hello GR,

Please expect responses by today.

Regards,

Vaibhav

ARM Based Processors | FAQ AM62x & AM62A | FAQ AM64x

+1 Vaibhav Kumar over 2 years ago in reply to Vaibhav Kumar

TI__Guru 56504 points

Hello GR,

GR said:
I mean Is there plan Timer interrupt sample project for CA53?

I have checked internally and found out that we do not have a TIMER example scheduled in the near release.

Regards,

Vaibhav

ARM Based Processors | FAQ AM62x & AM62A | FAQ AM64x

0 GR over 2 years ago in reply to Vaibhav Kumar

Genius 3186 points

Hi vaibhav,

Thanks for your information.

I understand.

And I will wait about this comment.

I am glad if you let me know if there is any information.

Vaibhav Kumar said:
GR said:
Question3:

My customer want to interrupt both CA53 and R5F generated by timer.

we could set timer for generate some interrupt?

In TRM,I think it seems if timer generated interrupt, automatically interrupt both.

Allow me sometime to comment on this.

Best regards,

0 Vaibhav Kumar over 2 years ago in reply to GR

TI__Guru 56504 points

Hello GR,

Please expect responses within few business days, I am checking with the design team.

Regards,

Vaibhav

ARM Based Processors | FAQ AM62x & AM62A | FAQ AM64x

+1 Vaibhav Kumar over 2 years ago in reply to GR

TI__Guru 56504 points

Hello GR,

Upon checking with the design team, it is verified that the interrupt(Lets say DM Timer 0 interrupt) can be routed to both a53 and R5.

Regards,

Vaibhav

ARM Based Processors | FAQ AM62x & AM62A | FAQ AM64x

0 GR over 2 years ago in reply to Vaibhav Kumar

Genius 3186 points

Hello Vaibhav,

Thanks for your information.

I understand.

Best regards,

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PROCESSOR-SDK-AM64X: Timer intereupt example