Hi, TI expert!
I have a development environment for am6234, with our own evaluation board.
The software SDK version is PROCESSOR-SDK-LINUX-RT-AM62X-08.06.00.42.
I referenced the following two links to program the extended OTP eFuse by calling extended OTP TISCI APIs：
https://software-dl.ti.com/tisci/esd/latest/3_boardcfg/BOARDCFG_SEC.html#pub-boardcfg-otp-entry
I have written the following test code:
commit b243210436621414f0572295eca92858b7bdc4e1
Author: liweiyu <1144815495@qq.com>
Date: Wed Nov 8 16:50:43 2023 +0800
otp read write via sysfw api
diff --git a/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/k3-image-gen-2022.01/soc/am62x/evm/sec-cfg.c b/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/k3-image-gen-2022.01/soc/am62x/evm/sec-cfg.c
index 02a314a..f670363 100755
--- a/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/k3-image-gen-2022.01/soc/am62x/evm/sec-cfg.c
+++ b/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/k3-image-gen-2022.01/soc/am62x/evm/sec-cfg.c
@@ -72,7 +72,40 @@ const struct boardcfg_security am62_boardcfg_security_data = {
/* Host ID 0 is DMSC. This means no host has write access to OTP array */
.write_host_id = 0,
/* This is an array with 32 entries */
- .otp_entry = {{ 0 } },
+ .otp_entry = {
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 },
+ { 128, 0 }
+ },
},
/* DKEK configuration */
diff --git a/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/arch/arm/mach-k3/security.c b/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/arch/arm/mach-k3/security.c
index 092588f..1d2c5b2 100755
--- a/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/arch/arm/mach-k3/security.c
+++ b/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/arch/arm/mach-k3/security.c
@@ -43,9 +43,10 @@ void ti_secure_image_post_process(void **p_image, size_t *p_size)
{
struct ti_sci_handle *ti_sci = get_ti_sci_handle();
struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
+ struct ti_sci_extended_otp_ops *otp_ops = &ti_sci->ops.otp_ops;
size_t cert_length;
u64 image_addr;
- u32 image_size;
+ u32 image_size, otp_val;
int ret;
image_size = *p_size;
@@ -93,6 +94,12 @@ void ti_secure_image_post_process(void **p_image, size_t *p_size)
hang();
}
+ /* Read OTP */
+ ret = otp_ops->read_otp_mmr(ti_sci, 16, &otp_val);
+ printf("%s:%d otp_val:%d ret:%d\n", __func__, __LINE__, otp_val, ret);
+ if (ret)
+ printf("Read OTP failed!\n");
+
/* Invalidate any stale lines over data written by system firmware */
if (image_size)
dma_unmap_single(image_addr, image_size, DMA_BIDIRECTIONAL);
@@ -115,5 +122,5 @@ void ti_secure_image_post_process(void **p_image, size_t *p_size)
if (!(IS_ENABLED(CONFIG_SPL_BUILD) &&
IS_ENABLED(CONFIG_SPL_YMODEM_SUPPORT) &&
spl_boot_device() == BOOT_DEVICE_UART))
- printf("Authentication passed\n");
+ printf("Authentication passed\n\n");
}
diff --git a/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/drivers/firmware/ti_sci.c b/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/drivers/firmware/ti_sci.c
index d7ec3f0..6dbd492 100755
--- a/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/drivers/firmware/ti_sci.c
+++ b/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/drivers/firmware/ti_sci.c
@@ -2603,6 +2603,189 @@ static int ti_sci_cmd_change_fwl_owner(const struct ti_sci_handle *handle,
return ret;
}
+static int ti_sci_cmd_read_otp_mmr(const struct ti_sci_handle *handle,
+ u8 mmr_idx, u32 *mmr_val)
+{
+ struct ti_sci_msg_read_otp_mmr_req req;
+ struct ti_sci_msg_read_otp_mmr_resp *resp;
+ struct ti_sci_info *info;
+ struct ti_sci_xfer *xfer;
+ int ret = 0;
+
+ if (IS_ERR(handle)) {
+ printf("%s:%d\n", __func__, __LINE__);
+ return PTR_ERR(handle);
+ }
+ if (!handle) {
+ printf("%s:%d\n", __func__, __LINE__);
+ return -EINVAL;
+ }
+
+ info = handle_to_ti_sci_info(handle);
+
+ xfer = ti_sci_setup_one_xfer(info, TI_SCI_MSG_READ_OTP_MMR,
+ TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ (u32 *)&req, sizeof(req), sizeof(*resp));
+ if (IS_ERR(xfer)) {
+ printf("%s:%d\n", __func__, __LINE__);
+ ret = PTR_ERR(xfer);
+ return ret;
+ }
+ req.mmr_idx = mmr_idx;
+
+ ret = ti_sci_do_xfer(info, xfer);
+ if (ret) {
+ printf("\n%s:%d ti_sci_do_xfer_ret:%d\n", __func__, __LINE__, ret);
+ return ret;
+ }
+
+ resp = (struct ti_sci_msg_read_otp_mmr_resp *)xfer->tx_message.buf;
+ *mmr_val = resp->mmr_val;
+
+ return ret;
+}
+
+static int ti_sci_cmd_write_otp_row(const struct ti_sci_handle *handle,
+ u8 row_idx, u32 row_val, u32 row_mask, u32 *row_val_resp)
+{
+ struct ti_sci_msg_write_otp_row_req req;
+ struct ti_sci_msg_write_otp_row_resp *resp;
+ struct ti_sci_info *info;
+ struct ti_sci_xfer *xfer;
+ int ret = 0;
+
+ if (IS_ERR(handle))
+ return PTR_ERR(handle);
+ if (!handle)
+ return -EINVAL;
+
+ info = handle_to_ti_sci_info(handle);
+
+ xfer = ti_sci_setup_one_xfer(info, TI_SCI_MSG_WRITE_OTP_ROW,
+ TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ (u32 *)&req, sizeof(req), sizeof(*resp));
+ if (IS_ERR(xfer)) {
+ ret = PTR_ERR(xfer);
+ return ret;
+ }
+ req.row_idx = row_idx;
+ req.row_val = row_val;
+ req.row_mask = row_mask;
+
+ ret = ti_sci_do_xfer(info, xfer);
+ if (ret)
+ return ret;
+
+ resp = (struct ti_sci_msg_write_otp_row_resp *)xfer->tx_message.buf;
+ *row_val_resp = resp->row_val;
+
+ return ret;
+}
+
+static int ti_sci_cmd_lock_otp_row(const struct ti_sci_handle *handle,
+ u8 row_idx, u8 hw_write_lock, u8 hw_read_lock, u8 row_soft_lock)
+{
+ struct ti_sci_msg_lock_otp_row_req req;
+ struct ti_sci_msg_lock_otp_row_resp *resp;
+ struct ti_sci_info *info;
+ struct ti_sci_xfer *xfer;
+ int ret = 0;
+
+ if (IS_ERR(handle))
+ return PTR_ERR(handle);
+ if (!handle)
+ return -EINVAL;
+
+ info = handle_to_ti_sci_info(handle);
+
+ xfer = ti_sci_setup_one_xfer(info, TI_SCI_MSG_LOCK_OTP_ROW,
+ TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ (u32 *)&req, sizeof(req), sizeof(*resp));
+ if (IS_ERR(xfer)) {
+ ret = PTR_ERR(xfer);
+ return ret;
+ }
+ req.row_idx = row_idx;
+ req.hw_write_lock = hw_write_lock;
+ req.hw_read_lock = hw_read_lock;
+ req.row_soft_lock = row_soft_lock;
+
+ ret = ti_sci_do_xfer(info, xfer);
+ if (ret)
+ return ret;
+
+ return ret;
+}
+
+static int ti_sci_cmd_soft_lock_otp_write_global(const struct ti_sci_handle *handle)
+{
+ struct ti_sci_msg_soft_lock_otp_write_global_req req;
+ struct ti_sci_msg_soft_lock_otp_write_global_resp *resp;
+ struct ti_sci_info *info;
+ struct ti_sci_xfer *xfer;
+ int ret = 0;
+
+ if (IS_ERR(handle))
+ return PTR_ERR(handle);
+ if (!handle)
+ return -EINVAL;
+
+ info = handle_to_ti_sci_info(handle);
+
+ xfer = ti_sci_setup_one_xfer(info, TI_SCI_MSG_SOFT_LOCK_OTP_WRITE_GLOBAL,
+ TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ (u32 *)&req, sizeof(req), sizeof(*resp));
+ if (IS_ERR(xfer)) {
+ ret = PTR_ERR(xfer);
+ return ret;
+ }
+
+ ret = ti_sci_do_xfer(info, xfer);
+ if (ret)
+ return ret;
+
+ return ret;
+}
+
+static int ti_sci_cmd_get_otp_row_lock_status(const struct ti_sci_handle *handle,
+ u8 row_idx, u8 *global_soft_lock,
+ u8 *hw_write_lock, u8 *hw_read_lock, u8 *row_soft_lock)
+{
+ struct ti_sci_msg_get_otp_row_lock_status_req req;
+ struct ti_sci_msg_get_otp_row_lock_status_resp *resp;
+ struct ti_sci_info *info;
+ struct ti_sci_xfer *xfer;
+ int ret = 0;
+
+ if (IS_ERR(handle))
+ return PTR_ERR(handle);
+ if (!handle)
+ return -EINVAL;
+
+ info = handle_to_ti_sci_info(handle);
+
+ xfer = ti_sci_setup_one_xfer(info, TI_SCI_MSG_GET_OTP_ROW_LOCK_STATUS,
+ TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ (u32 *)&req, sizeof(req), sizeof(*resp));
+ if (IS_ERR(xfer)) {
+ ret = PTR_ERR(xfer);
+ return ret;
+ }
+ req.row_idx = row_idx;
+
+ ret = ti_sci_do_xfer(info, xfer);
+ if (ret)
+ return ret;
+
+ resp = (struct ti_sci_msg_get_otp_row_lock_status_resp *)xfer->tx_message.buf;
+ *global_soft_lock = resp->global_soft_lock;
+ *hw_write_lock = resp->hw_write_lock;
+ *hw_read_lock = resp->hw_read_lock;
+ *row_soft_lock = resp->row_soft_lock;
+
+ return ret;
+}
+
/*
* ti_sci_setup_ops() - Setup the operations structures
* @info: pointer to TISCI pointer
@@ -2620,6 +2803,7 @@ static void ti_sci_setup_ops(struct ti_sci_info *info)
struct ti_sci_rm_psil_ops *psilops = &ops->rm_psil_ops;
struct ti_sci_rm_udmap_ops *udmap_ops = &ops->rm_udmap_ops;
struct ti_sci_fwl_ops *fwl_ops = &ops->fwl_ops;
+ struct ti_sci_extended_otp_ops *otp_ops = &ops->otp_ops;
bops->board_config = ti_sci_cmd_set_board_config;
bops->board_config_rm = ti_sci_cmd_set_board_config_rm;
@@ -2684,6 +2868,12 @@ static void ti_sci_setup_ops(struct ti_sci_info *info)
fwl_ops->set_fwl_region = ti_sci_cmd_set_fwl_region;
fwl_ops->get_fwl_region = ti_sci_cmd_get_fwl_region;
fwl_ops->change_fwl_owner = ti_sci_cmd_change_fwl_owner;
+
+ otp_ops->read_otp_mmr = ti_sci_cmd_read_otp_mmr;
+ otp_ops->write_otp_row = ti_sci_cmd_write_otp_row;
+ otp_ops->lock_otp_row = ti_sci_cmd_lock_otp_row;
+ otp_ops->soft_lock_otp_write_global = ti_sci_cmd_soft_lock_otp_write_global;
+ otp_ops->get_otp_row_lock_status = ti_sci_cmd_get_otp_row_lock_status;
}
/**
diff --git a/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/drivers/firmware/ti_sci.h b/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/drivers/firmware/ti_sci.h
index e4a087c..97900a7 100755
--- a/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/drivers/firmware/ti_sci.h
+++ b/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/drivers/firmware/ti_sci.h
@@ -80,6 +80,13 @@
#define TISCI_MSG_FWL_GET 0x9001
#define TISCI_MSG_FWL_CHANGE_OWNER 0x9002
+/* Extended OTP Messages */
+#define TI_SCI_MSG_READ_OTP_MMR 0x9022
+#define TI_SCI_MSG_WRITE_OTP_ROW 0x9023
+#define TI_SCI_MSG_LOCK_OTP_ROW 0x9024
+#define TI_SCI_MSG_SOFT_LOCK_OTP_WRITE_GLOBAL 0x9025
+#define TI_SCI_MSG_GET_OTP_ROW_LOCK_STATUS 0x9026
+
/**
* struct ti_sci_msg_hdr - Generic Message Header for All messages and responses
* @type: Type of messages: One of TI_SCI_MSG* values
@@ -1530,4 +1537,59 @@ struct ti_sci_msg_fwl_change_owner_info_resp {
u16 owner_permission_bits;
} __packed;
+struct ti_sci_msg_read_otp_mmr_req {
+ struct ti_sci_msg_hdr hdr;
+ u8 mmr_idx;
+} __packed;
+
+struct ti_sci_msg_read_otp_mmr_resp {
+ struct ti_sci_msg_hdr hdr;
+ u32 mmr_val;
+} __packed;
+
+struct ti_sci_msg_write_otp_row_req {
+ struct ti_sci_msg_hdr hdr;
+ u8 row_idx;
+ u32 row_val;
+ u32 row_mask;
+} __packed;
+
+struct ti_sci_msg_write_otp_row_resp {
+ struct ti_sci_msg_hdr hdr;
+ u32 row_val;
+} __packed;
+
+struct ti_sci_msg_lock_otp_row_req {
+ struct ti_sci_msg_hdr hdr;
+ u8 row_idx;
+ u8 hw_write_lock;
+ u8 hw_read_lock;
+ u8 row_soft_lock;
+} __packed;
+
+struct ti_sci_msg_lock_otp_row_resp {
+ struct ti_sci_msg_hdr hdr;
+} __packed;
+
+struct ti_sci_msg_soft_lock_otp_write_global_req {
+ struct ti_sci_msg_hdr hdr;
+} __packed;
+
+struct ti_sci_msg_soft_lock_otp_write_global_resp {
+ struct ti_sci_msg_hdr hdr;
+} __packed;
+
+struct ti_sci_msg_get_otp_row_lock_status_req {
+ struct ti_sci_msg_hdr hdr;
+ u8 row_idx;
+} __packed;
+
+struct ti_sci_msg_get_otp_row_lock_status_resp {
+ struct ti_sci_msg_hdr hdr;
+ u8 global_soft_lock;
+ u8 hw_write_lock;
+ u8 hw_read_lock;
+ u8 row_soft_lock;
+} __packed;
+
#endif /* __TI_SCI_H */
diff --git a/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/include/linux/soc/ti/ti_sci_protocol.h b/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/include/linux/soc/ti/ti_sci_protocol.h
index 7f99418..a978640 100755
--- a/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/include/linux/soc/ti/ti_sci_protocol.h
+++ b/ti-processor-sdk-linux-rt-am62xx-evm-08.06.00.42/board-support/u-boot-2021.01+gitAUTOINC+2ee8efd654-g2ee8efd654/include/linux/soc/ti/ti_sci_protocol.h
@@ -594,6 +594,19 @@ struct ti_sci_fwl_ops {
int (*change_fwl_owner)(const struct ti_sci_handle *handle, struct ti_sci_msg_fwl_owner *owner);
};
+struct ti_sci_extended_otp_ops {
+ int (*read_otp_mmr)(const struct ti_sci_handle *handle,
+ u8 mmr_idx, u32 *mmr_val);
+ int (*write_otp_row)(const struct ti_sci_handle *handle,
+ u8 row_idx, u32 row_val, u32 row_mask, u32 *row_val_resp);
+ int (*lock_otp_row)(const struct ti_sci_handle *handle,
+ u8 row_idx, u8 hw_write_lock, u8 hw_read_lock, u8 row_soft_lock);
+ int (*soft_lock_otp_write_global)(const struct ti_sci_handle *handle);
+ int (*get_otp_row_lock_status)(const struct ti_sci_handle *handle,
+ u8 row_idx, u8 *global_soft_lock,
+ u8 *hw_write_lock, u8 *hw_read_lock, u8 *row_soft_lock);
+};
+
/**
* struct ti_sci_ops - Function support for TI SCI
* @board_ops: Miscellaneous operations
@@ -615,6 +628,7 @@ struct ti_sci_ops {
struct ti_sci_rm_psil_ops rm_psil_ops;
struct ti_sci_rm_udmap_ops rm_udmap_ops;
struct ti_sci_fwl_ops fwl_ops;
+ struct ti_sci_extended_otp_ops otp_ops;
};
/**
When testing, I received the following error message:
U-Boot SPL 2021.01-00001-ga347ec164e-dirty (Nov 08 2023 - 16:32:42 +0800)
SYSFW ABI: 3.1 (firmware rev 0x0008 '8.6.4--v08.06.04 (Chill Capybar')
SPL initial stack usage: 13424 bytes
WDT: Not found!
Trying to boot from MMC2
ti_sci system-controller@44043000: Message not acknowledged
ti_sci_cmd_read_otp_mmr:2638 ti_sci_do_xfer_ret:-19
ti_secure_image_post_process:99 otp_val:1136667183 ret:-19
Read OTP failed!
Authentication passed
ti_sci system-controller@44043000: Message not acknowledged
ti_sci_cmd_read_otp_mmr:2638 ti_sci_do_xfer_ret:-19
ti_secure_image_post_process:99 otp_val:1136667183 ret:-19
Read OTP failed!
Authentication passed
ti_sci system-controller@44043000: Message not acknowledged
ti_sci_cmd_read_otp_mmr:2638 ti_sci_do_xfer_ret:-19
ti_secure_image_post_process:99 otp_val:1136667183 ret:-19
Read OTP failed!
Authentication passed
ti_sci system-controller@44043000: Message not acknowledged
ti_sci_cmd_read_otp_mmr:2638 ti_sci_do_xfer_ret:-19
ti_secure_image_post_process:99 otp_val:1136667183 ret:-19
Read OTP failed!
Authentication passed
ti_sci system-controller@44043000: Message not acknowledged
ti_sci_cmd_read_otp_mmr:2638 ti_sci_do_xfer_ret:-19
ti_secure_image_post_process:99 otp_val:1136667183 ret:-19
Read OTP failed!
Authentication passed
Loading Environment from MMC... *** Warning - No MMC card found, using default environment
Starting ATF on ARM64 core...
NOTICE: BL31: v2.8(release):v2.8-226-g2fcd408bb
NOTICE: BL31: Built : 19:51:21, Oct 26 2023
I/TC:
I/TC: OP-TEE version: Unknown_3.20 (gcc version 9.2.1 20191025 (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10))) #1 Thu Oct 26 11:51:59 UTC 2023 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: SYSFW ABI: 3.1 (firmware rev 0x0008 '8.6.4--v08.06.04 (Chill Capybar')
I/TC: HUK Initialized
I/TC: Activated SA2UL device
I/TC: Enabled firewalls for SA2UL TRNG device
I/TC: SA2UL TRNG initialized
I/TC: SA2UL Drivers initialized
I/TC: Primary CPU switching to normal world boot
U-Boot SPL 2021.01-00001-ga347ec164e-dirty (Nov 08 2023 - 16:31:29 +0800)
SYSFW ABI: 3.1 (firmware rev 0x0008 '8.6.4--v08.06.04 (Chill Capybar')
WDT: Not found!
Trying to boot from MMC2
ti_sci system-controller@44043000: Message not acknowledged
ti_sci_cmd_read_otp_mmr:2638 ti_sci_do_xfer_ret:-19
ti_secure_image_post_process:99 otp_val:0 ret:-19
Read OTP failed!
Authentication passed
ti_sci system-controller@44043000: Message not acknowledged
ti_sci_cmd_read_otp_mmr:2638 ti_sci_do_xfer_ret:-19
ti_secure_image_post_process:99 otp_val:0 ret:-19
Read OTP failed!
Authentication passed
U-Boot 2021.01-00001-ga347ec164e-dirty (Nov 08 2023 - 16:31:29 +0800)
SoC: AM62X SR1.0 HS-SE
Model: ZHIYUAN Electronics AM625
DRAM: 1 GiB
MMC: mmc@fa10000: 0, mmc@fa00000: 1, mmc@fa20000: 2
Loading Environment from MMC... MMC: block number 0x3500 exceeds max(0x2000)
*** Warning - !read failed, using default environment
In: serial@2800000
Out: serial@2800000
Err: serial@2800000
Unidentified board claims in eeprom header
Net: eth0: ethernet@8000000port@1
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc1 is current device
SD/MMC found on device 1
Failed to load 'boot.scr'
1557 bytes read in 5 ms (303.7 KiB/s)
Loaded env from uEnv.txt
Importing environment from mmc1 ...
Running uenvcmd ...
1 bytes read in 4 ms (0 Bytes/s)
Already setup.
SD/MMC found on device 1
Failed to load 'update-img'
switch to partitions #1, OK
mmc0(part 1) is current device
17994512 bytes read in 135 ms (127.1 MiB/s)
## Loading kernel from FIT Image at 90000000 ...
Using 'config@0' configuration
Trying 'kernel@0' kernel subimage
Description: Linux Kernel
Type: Kernel Image
Compression: gzip compressed
Data Start: 0x900000c8
Data Size: 7971647 Bytes = 7.6 MiB
Architecture: AArch64
OS: Linux
Load Address: 0x82000000
Entry Point: 0x82000000
Hash algo: sha1
Hash value: 9bdff7d2a329abeca37ed36b47b5e0c41d20a4b8
Verifying Hash Integrity ... sha1+ OK
ti_sci system-controller@44043000: Message not acknowledged
ti_sci_cmd_read_otp_mmr:2638 ti_sci_do_xfer_ret:-19
ti_secure_image_post_process:99 otp_val:0 ret:-19
Read OTP failed!
Authentication passed
## Loading fdt from FIT Image at 90000000 ...
Using 'config@0' configuration
Trying 'fdt@0' fdt subimage
Description: Flattened Device Tree blob
Type: Flat Device Tree
Compression: uncompressed
Data Start: 0x91117c70
Data Size: 69832 Bytes = 68.2 KiB
Architecture: AArch64
Load Address: 0x88000000
Hash algo: sha1
Hash value: 4683ab377e6321749ab97423c9d041d788fb55cb
Verifying Hash Integrity ... sha1+ OK
ti_sci system-controller@44043000: Message not acknowledged
ti_sci_cmd_read_otp_mmr:2638 ti_sci_do_xfer_ret:-19
ti_secure_image_post_process:99 otp_val:0 ret:-19
Read OTP failed!
Authentication passed
Loading fdt from 0x91117c70 to 0x88000000
Booting using the fdt blob at 0x88000000
Uncompressing Kernel Image
Loading Device Tree to 000000008ffec000, end 000000008ffffa61 ... OK
Starting kernel ...
[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[ 0.000000] Linux version 5.10.168-rt83-gc1a1291911 (root@ubuntu) (aarch64-none-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025, GNU ld (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 2.33.1.20191209) #2 SMP PREEMPT_RT Fri Oct 27 13:49:09 CST 2023
I would like to ask if there are any other places that have not been configured, which caused the error of not being able to read the extended OTP eFuse normally. How should I modify my code?
Regards,
Li
