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AM6442: PCIe External Reference Clcok

Hideaki Matsumoto
Genius 9050 points
Part Number: AM6442

Hi,

We’ve received a question about PCIe Reference Clock- from my customer. Please answer their question below.

They’re using the Pin W16: SERDES0_REFCLK0N and Pin W17: SERDES0_REFCLK0P as the PCIe Reference Clock to input a 100MHz differential clock.

They found the e2e thread below.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1046015/am6442-pcie-external-reference-clock

 

Is it okay to just change the red line in the device tree as shown in this E2E like below ?

Are there any other file changes or settings required?

Also, the signals corresponding to <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>, <&serdes_wiz0 TI_WIZ_REFCLK_DIG>; are not found in TRM. What is it setting ?

Actually, the PCIe configuration had been completed before this change was made. They want to know what this change means.

 

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi

index c29864b3b0e7..4014d80dfae6 100644

--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi

+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi

@@ -752,7 +752,7 @@

        clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, <&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>;

        clock-names = "refclk", "phy_en_refclk";

        assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>, <&serdes_wiz0 TI_WIZ_REFCLK_DIG>;

-       assigned-clock-parents = <&k3_clks 162 1>, <&k3_clks 162 1>, <&k3_clks 162 1>;

+       assigned-clock-parents = <&serdes_refclk>, <&serdes_refclk>, <&serdes_refclk>;

        #address-cells = <1>;

        #size-cells = <0>;

        #clock-cells = <1>;

 

Thanks and regards,

Hideaki

  • 0
    TI__Guru**** 167581 points

    Hi Hideaki-san,

    I am currently working on another task. I will review your question next week and get back to you.

  • 0 in reply to Bin Liu
    TI__Genius 9050 points

    Hi Bin,

    Thank you for your reply. Do you have any update on this inquiry ?

    Thanks and regards,
    Hideaki

  • 0 in reply to Hideaki Matsumoto
    TI__Guru**** 167581 points

    Hi Hideaki-san,

    Sorry for the delay. I will get back to you in a day or two.

  • +1
    TI__Guru 69602 points

    I'm not the PCIe subject-matter expert, but let me comment on this anyways:

    Hideaki Matsumoto said:

    Is it okay to just change the red line in the device tree as shown in this E2E like below ?

    Are there any other file changes or settings required?

    It looks like they will also need to explicitly set that external clock to 100MHz via device tree entry, similar as shown below (on another platform):

    arch/arm64/boot/dts/ti/k3-am69-sk.dts:&serdes_refclk {
arch/arm64/boot/dts/ti/k3-am69-sk.dts-  clock-frequency = <100000000>;
arch/arm64/boot/dts/ti/k3-am69-sk.dts-};

    Hideaki Matsumoto said:
    Also, the signals corresponding to <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>, <&serdes_wiz0 TI_WIZ_REFCLK_DIG>; are not found in TRM. What is it setting ?

    See...

    a0797059@dasso:~/git/linux (ti-linux-6.1.y)
$ cat include/dt-bindings/phy/phy-ti.h
/* SPDX-License-Identifier: GPL-2.0 */
/*
 * This header provides constants for TI SERDES.
 */

#ifndef _DT_BINDINGS_TI_SERDES
#define _DT_BINDINGS_TI_SERDES

/* Clock index for output clocks from WIZ */

/* MUX Clocks */
#define TI_WIZ_PLL0_REFCLK      0
#define TI_WIZ_PLL1_REFCLK      1
#define TI_WIZ_REFCLK_DIG       2

/* Reserve index here for future additions */

/* MISC Clocks */
#define TI_WIZ_PHY_EN_REFCLK    16

#endif /* _DT_BINDINGS_TI_SERDES */

    Looks like they are clocks from the SERDES MUX (WIZ Module) that are shown in the TRM here:

    Hideaki Matsumoto said:
    Actually, the PCIe configuration had been completed before this change was made. They want to know what this change means.

    Sorry I don't understand this statement. Are you saying PCIe worked for them before, even without any DTS changes (to accommodate the external ref clock) at all?

    Regards, Andreas