Part Number: TDA4VM
Other Parts Discussed in Thread: PCM3168A, TDA4VL
apply hardware and software modification according to : [FAQ] TDA4VM: TDA4VM/DRA829V: routing PCIE reference clock externally - Processors forum - Processors - TI E2E support forums, but no clk detected.
dumped registers:
root@j7-evm:/boot# ./analyze_pcie_register_tda4vm.sh
//// Starting register dump ////
CTRLMMR_PCIE0_CLKSEL at addr 0x00108080 is 0x00000000
CTRLMMR_PCIE1_CLKSEL at addr 0x00108084 is 0x00000000
CTRLMMR_PCIE2_CLKSEL at addr 0x00108088 is 0x00000000
CTRLMMR_PCIE3_CLKSEL at addr 0x0010808C is 0x00000000
CTRLMMR_PCIE0_CTRL at addr 0x00104070 is 0x00000082
CTRLMMR_PCIE1_CTRL at addr 0x00104074 is 0x00000182
CTRLMMR_PCIE2_CTRL at addr 0x00104078 is 0x00000182
CTRLMMR_PCIE3_CTRL at addr 0x0010407C is 0x00000103
CTRLMMR_PCIE_REFCLK0_CLKSEL at addr 0x00108070 is 0x00000100
CTRLMMR_PCIE_REFCLK1_CLKSEL at addr 0x00108074 is 0x00000101
CTRLMMR_PCIE_REFCLK2_CLKSEL at addr 0x00108078 is 0x00000100
CTRLMMR_PCIE_REFCLK3_CLKSEL at addr 0x0010807C is 0x00000101
CTRLMMR_ACSPCIE0_CTRL at addr 0x00118090 is 0x01000000
CTRLMMR_ACSPCIE1_CTRL at addr 0x00118094 is 0x01000000
PCIE_CORE_PF0_I_LINK_CTRL_STATUS/PCIE_CORE_RP_I_LINK_CTRL_STATUS at addr 0x0D8000D0 is 0x00210000
PCIE_CORE_PF1_I_LINK_CTRL_STATUS at addr 0x0D8010D0 is 0x00210000
PCIE_CORE_PF2_I_LINK_CTRL_STATUS at addr 0x0D8020D0 is 0x00210000
PCIE_CORE_PF3_I_LINK_CTRL_STATUS at addr 0x0D8030D0 is 0x00210000
PCIE_CORE_PF4_I_LINK_CTRL_STATUS at addr 0x0D8040D0 is 0x00210000
PCIE_CORE_PF5_I_LINK_CTRL_STATUS at addr 0x0D8050D0 is 0x00210000
CTRLMMR_SERDES0_LN0_CTRL at addr 0x00104080 is 0x00000001
CTRLMMR_SERDES0_LN1_CTRL at addr 0x00104084 is 0x00000000
CTRLMMR_SERDES1_LN0_CTRL at addr 0x00104090 is 0x00000001
CTRLMMR_SERDES1_LN1_CTRL at addr 0x00104094 is 0x00000001
CTRLMMR_SERDES2_LN0_CTRL at addr 0x001040A0 is 0x00000001
CTRLMMR_SERDES2_LN1_CTRL at addr 0x001040A4 is 0x00000001
CTRLMMR_SERDES3_LN0_CTRL at addr 0x001040B0 is 0x00000002
CTRLMMR_SERDES3_LN1_CTRL at addr 0x001040B4 is 0x00000002
//// Ending register dump ////
root@j7-evm:/boot#
we are using sdk8.6 with EVM - TDA4VM and the modifications we make to the hardware are:

we also add 49.9R resister to clock output

We change serdes2 only, because we only want to verify if an NVME ssd CAN work with internal clock.
dmesg log are normal, but we do not see linkup log...
root@j7-evm:/boot#
root@j7-evm:/boot#
root@j7-evm:/boot# dmesg | grep pci
[ 1.144926] j721e-pcie 2900000.pcie: host bridge /bus@100000/pcie@2900000 ranges:
[ 1.152626] j721e-pcie 2900000.pcie: IO 0x0010001000..0x0010010fff -> 0x0010001000
[ 1.160904] j721e-pcie 2900000.pcie: MEM 0x0010011000..0x0017ffffff -> 0x0010011000
[ 1.169181] j721e-pcie 2900000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 2.188529] j721e-pcie 2900000.pcie: PCI host bridge to bus 0000:00
[ 2.194951] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 2.200566] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] (bus address [0x10001000-0x10010fff])
[ 2.210263] pci_bus 0000:00: root bus resource [mem 0x10011000-0x17ffffff]
[ 2.217318] pci 0000:00:00.0: [104c:b00d] type 01 class 0x060400
[ 2.223457] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0x4 may corrupt adjacent RW1C bits
[ 2.233407] pci 0000:00:00.0: supports D1
[ 2.237501] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
[ 2.243388] pci 0000:00:00.0: reg 0x224: [mem 0x00000000-0x003fffff 64bit]
[ 2.250414] pci 0000:00:00.0: VF(n) BAR0 space: [mem 0x00000000-0x00ffffff 64bit] (contains BAR0 for 4 VFs)
[ 2.262555] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 2.272688] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[ 2.279460] pci 0000:00:00.0: BAR 7: assigned [mem 0x10400000-0x113fffff 64bit]
[ 2.286934] pci 0000:00:00.0: PCI bridge to [bus 01]
[ 2.292226] pcieport 0000:00:00.0: PME: Signaling with IRQ 61
[ 2.298583] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[ 2.306252] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000
[ 2.314527] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000
[ 2.322808] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 3.334110] j721e-pcie 2910000.pcie: PCI host bridge to bus 0001:00
[ 3.340527] pci_bus 0001:00: root bus resource [bus 00-ff]
[ 3.346133] pci_bus 0001:00: root bus resource [io 0x10000-0x1ffff] (bus address [0x18001000-0x18010fff])
[ 3.356000] pci_bus 0001:00: root bus resource [mem 0x18011000-0x1fffffff]
[ 3.363045] pci 0001:00:00.0: [104c:b00d] type 01 class 0x060400
[ 3.369184] pci_bus 0001:00: 2-byte config write to 0001:00:00.0 offset 0x4 may corrupt adjacent RW1C bits
[ 3.379113] pci 0001:00:00.0: supports D1
[ 3.383207] pci 0001:00:00.0: PME# supported from D0 D1 D3hot
[ 3.391164] pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 3.401291] pci_bus 0001:01: busn_res: [bus 01-ff] end is updated to 01
[ 3.408059] pci 0001:00:00.0: PCI bridge to [bus 01]
[ 3.413337] pcieport 0001:00:00.0: PME: Signaling with IRQ 64
[ 3.419688] j721e-pcie 2920000.pcie: host bridge /bus@100000/pcie@2920000 ranges:
[ 3.427357] j721e-pcie 2920000.pcie: IO 0x4400001000..0x4400010fff -> 0x0000001000
[ 3.435634] j721e-pcie 2920000.pcie: MEM 0x4400011000..0x4407ffffff -> 0x0000011000
[ 3.443910] j721e-pcie 2920000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[ 4.455351] j721e-pcie 2920000.pcie: PCI host bridge to bus 0002:00
[ 4.461771] pci_bus 0002:00: root bus resource [bus 00-ff]
[ 4.467377] pci_bus 0002:00: root bus resource [io 0x20000-0x2ffff] (bus address [0x1000-0x10fff])
[ 4.476624] pci_bus 0002:00: root bus resource [mem 0x4400011000-0x4407ffffff] (bus address [0x00011000-0x07ffffff])
[ 4.487399] pci 0002:00:00.0: [104c:b00d] type 01 class 0x060400
[ 4.493538] pci_bus 0002:00: 2-byte config write to 0002:00:00.0 offset 0x4 may corrupt adjacent RW1C bits
[ 4.503467] pci 0002:00:00.0: supports D1
[ 4.507562] pci 0002:00:00.0: PME# supported from D0 D1 D3hot
[ 4.515514] pci 0002:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 4.525637] pci_bus 0002:01: busn_res: [bus 01-ff] end is updated to 01
[ 4.532404] pci 0002:00:00.0: PCI bridge to [bus 01]
[ 4.537677] pcieport 0002:00:00.0: PME: Signaling with IRQ 67
[ 9.921857] Modules linked in: ti_k3_r5_remoteproc(+) vxe_enc vxd_dec videobuf2_dma_sg videobuf2_dma_contig pruss sa2ul pci_endpoint_test v4l2_mem2mem ti_am335x_tscadc videobuf2_memops videobuf2_v4l2 ti_k3_dsp_remoteproc(+) pvrsrvkm(O) videobuf2_common sha512_generic virtio_rpmsg_bus cdns_dphy authenc cdns3_ti m_can_platform m_can can_dev snd_soc_pcm3168a_i2c snd_soc_pcm3168a rti_wdt ina2xx optee_rng rng_core sch_fq_codel rpmsg_kdrv_switch cryptodev(O) ipv6
root@j7-evm:/boot#
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