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TDA4VM: CPU :Periodic software readback of static configuration registers

Part Number: TDA4VM

hello,

The following four safety mechanisms or diagnostics mechanisms are mentioned in the Arm Cortex-A72 Subsystem, C66x DSP Subsystem and C71x DSP Subsystem and Dual-R5F MCU - Pulsar Subsystem sections of the safety manual:
A72SS.CPU6 - Periodic software readback of static configuration registers
C66X.CPU6 - Periodic software readback of static configuration registers
C7X.CPU6 - Periodic software readback of static configuration registers
R5F.CPU6 - Periodic software readback of static configuration registers
These four are a type of safety mechanism that is necessary to achieve 90% diagnostic coverage. However, there are many static configuration registers in each CPU, and the specific information of these static configuration registers is not clearly described in the safety manual or TRM. So in the current software implementation process, software engineers do not know which static configuration registers to monitor.
May I ask which static registers in the CPU should we monitor for this safety mechanism? Does TI require monitoring of static configuration registers or suggest monitoring of which static registers?
thank you in advance