• State
  • Locked Locked
  • Replies 2 replies
  • Subscribers 100 subscribers
  • Views 156 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM625: DPI pixel clock active, even if DPI not used

Robert Finger
Genius 17057 points
Part Number: AM625

Team,

A customer of mine noted that pixelclk of AM62 DPI is active, even if DPI is not used. The only use a OLDI display connected to VP1. DPI is NOT activated in the Linux kernel. Also enable bits of registers VP2_CONTROL and VP1_CONTROL are set correctly. The measure 170 MHz on pixelclk of VP2 (DPI).

How can this be disabled? What about the DPIENABLE bit, which is present in both control registers? There is not detailed description.

Thanks,
  Robert

  • 0
    TI__Mastermind 36307 points

    Hello,

    Our expert is currently out-of-office and returning the first week of December. Please expect a response by then.

    Thank you,

    Erick

  • 0 in reply to Erick Narvaez
    TI__Mastermind 43735 points

    Hi Robert,

    In summary, I had to set bit 21 for the PADCFG_CTRL0_PADCONFIG65 register. With the current DSS IP design, we don’t have a way to control the PCLK and we have to disable it at the IO pads. Here are the details of my experiment:

    1. Boot the AM62 SK EVM and run an application on DPI port.  

    2. Read the following register: devmem2 0x000f4104. In my case, it read back the following value: 0x00010000

    3. Set bit 21 using following commands: devmem2 0x000f4104 w 0x210000

    [Note: I am not sure which sysfw you are using but on latest version, all the registers are unlocked by default. If you are using older version, you need to unlock the register using following commands: devmem2 0x000F5008 w 0x68EF3490; devmem2 0x000F500C w 0xD172BC5A”

     Regards,
    Krunal