Hello,
I'm trying to double check the margin leve I've got on MCU_OSC0_XI level. I've followed all recommendations and computations on CL1 & CL2.
So according to table 7.7.3 of sprsp56f_Datasheet am6442 Sept 2022 revF.pdf , it seems that Vihmin is about 0.65 x 1.8 = 1.17V
I've put passive probe (Cl=3.9pF), which I know may degrade a little bit the signal, to check signal level, and maximum level is about 1V => Vihmin is never reached.... but it works fine.
I don't understand how it could work.
I wonder if there is not something related to this sentence :

My assumption : in fact, due to MCU_OSC0_XI AC coupling, we just have to respect VHYS (=typ 49mV), and MCU_OSC0_XI should have a min swing of VHSYS .
What are input level threshold on HFOSC?
Thanks for your help.