OMAP-L138: External event on GPIO pin (GPIO8[12]) trigger EDMA3 SPI configuration to collect data from external ADC

Dear Team,

I am using OMAPL-138 processor in which i want to configure the EDMA3 with SPI1 on DSP side to access the ADC data,

External ADC is the SPI master and 25600 is the sampling rate and whenever conversion is completed the ADC give DRDY pulse on GPIO8 pin 12 (pin 141, bank 8 and pin 12) after every 39.06 micro second

The sampling rate is very high and i am missing many samples in that so i want to trigger EDMA3 SPI1 based on the external pin GPIO8[12],

My intention is that whenever processor get interrupt by DRDY pin at GPIO8[12] pin it automatically initiate the SPI EDMA3, collect the 16 byte data and then only processor will go into ISR routine and again it reload the same configuration

I am trying to do this configuration but could not able to get interrupt from GPIO8[12]

I read in the data sheet and reference manual that we can do the external event triggered edma3 spi, based on this i am trying to program it and thinking that if i could do this then no samples will be missed thats the intention i have, please let me know whether i am right

My SPI_RX_Data buffer is in EDMA3CC0-18 number and GPIO8 in EDMA3CC1-18

Please help me in this to come out from this issue

I am using OMAPL138_StarterWare_1_10_04_01 bare metal programming,

Below is the code of the configuration

GPIOBank8Pin12PinMuxSetup();
PSCModuleControl(SOC_PSC_0_REGS, HW_PSC_CC0, PSC_POWERDOMAIN_ALWAYS_ON,PSC_MDCTL_NEXT_ENABLE); // enable cc0
PSCModuleControl(SOC_PSC_0_REGS, HW_PSC_TC0, PSC_POWERDOMAIN_ALWAYS_ON,PSC_MDCTL_NEXT_ENABLE); // enable tc0
PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_CC1, PSC_POWERDOMAIN_ALWAYS_ON,PSC_MDCTL_NEXT_ENABLE); // enable cc1
PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_TC2, PSC_POWERDOMAIN_ALWAYS_ON,PSC_MDCTL_NEXT_ENABLE); // enable tc2
EDMA3Init(SOC_EDMA30CC_0_REGS, 0); // init edma0 to get data from spi rx pin
EDMA3Init(SOC_EDMA31CC_0_REGS, 0); // init edma1 to trigger edma3 spi to collect data 16 bytes from spi rx buf
EDMA3RequestChannel(SOC_EDMA30CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA,EDMA3_CHA_SPI1_RX, EDMA3_CHA_SPI1_RX, 0); // spi rx
EDMA3RequestChannel(SOC_EDMA31CC_0_REGS, EDMA3_CHANNEL_TYPE_DMA,EDMA3_CHA_GPIO_BNKINT8, EDMA3_CHA_GPIO_BNKINT8, 0); // event trigger
DRDYEdmaParamSet(EDMA3_CHA_GPIO_BNKINT8, EDMA3_CHA_GPIO_BNKINT8, rx_data, 1 , 0);
EDMA3ClrMissEvt(SOC_EDMA31CC_0_REGS, EDMA3_CHA_GPIO_BNKINT8);
EDMA3ClearErrorBits(SOC_EDMA31CC_0_REGS, EDMA3_CHA_GPIO_BNKINT8, 0);
EDMA3EnableDmaEvt(SOC_EDMA31CC_0_REGS,EDMA3_CHA_GPIO_BNKINT8);

param setting
void DRDYEdmaParamSet(unsigned int tccNum, unsigned int chNum,volatile unsigned char *buffer, unsigned int length,unsigned int destBidxFlag)
{
    /* srcAddr holds address of GPIO_DRDY. */
    paramSet.srcAddr = (unsigned int) (0x01E260C0);

    /* destAddr is address of memory location named buffer. */
    paramSet.destAddr = (unsigned int) buffer;

    /* aCnt holds the number of bytes in an array. */

    paramSet.aCnt = (unsigned short) 1;

    /* bCnt holds the number of such arrays to be transferred. */
    paramSet.bCnt = (unsigned short) length; //length=1

    /* cCnt holds the number of frames of aCnt*bBcnt bytes to be transferred. */
    paramSet.cCnt = (unsigned short) 1;//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$try with 8192

    /* The srcBidx should not be incremented since it is a h/w register. */
    paramSet.srcBIdx = 0;

    if(TRUE == destBidxFlag)
    {
        /* The destBidx should be incremented for every byte. */
        paramSet.destBIdx = 1;
    }
    else
    {
        /* The destBidx should not be incremented. */
        paramSet.destBIdx = 0;
    }

    /* A sync Transfer Mode. */
    /* srCIdx and destCIdx set to zero since ASYNC Mode is used. */
    paramSet.srcCIdx = 0;
    paramSet.destCIdx = 0;

    /* Linking transfers in EDMA3 are not used. */
    paramSet.linkAddr = (unsigned short)0xFFFF; //PARAMADDR(param18-spi_rx) 0x01C042400x4240;//
    paramSet.bCntReload = 0;

    paramSet.opt = 0x00000000;

    /* Set TCC field in OPT with the tccNum. */
    paramSet.opt |= ((EDMA3_CHA_GPIO_BNKINT8  << EDMA3CC_OPT_TCC_SHIFT) & EDMA3CC_OPT_TCC);

    /* EDMA3 Interrupt is enabled and Intermediate Interrupt Disabled.*/
    paramSet.opt |= (1 << EDMA3CC_OPT_TCINTEN_SHIFT);
}

Regards,

Ashish