TRM describes the operation to change the PLL Controllers dividers in “5.4.5.10.3 PLL Controllers Programming - Dividers PLLDIVn and GO Operation” and we followed all the steps described.
These are the steps we followed, lines with parenthesis represent multiple instructions:
(Unlock PLL registers)
(Enable bypass/reset of PLL, PLL Controllers, and HSDIV’s)
-Clear GOSET field of register PLLCMD.
-Set DN_EN field of register PLLDIV1.
-Clear DN_EN field of register PLLDIV2.
-Write a value different from 1 to the RATIO field of register PLLDIV1.
-Write a value different from 1 to the RATIO field of register PLLDIV2.
-Write value 1 to the ALN1 field of register ALNCTL.
-Write value 1 to the ALN field of register ALNCTL.
-Set GOSET field of register PLLCMD.
-Wait until GOSTAT field of register PLLSTAT is equal to value 0.
Note: We think it should be possible to see updated divider values here
(Continue with PLL Configuration)
(Disable bypass/reset of PLL, PLL Controllers, and HSDIV’s)
(Lock PLL registers)
In any point of the sequence, there is no update in the PLL Controller dividers value, what we expected to observe.
Furthermore, there is a note in section “5.4.5.6 PLL and PLL Controller Connection” describing “PLLCTRL_POSTDIV is not supported in this family of devices.”
Q1:
Are PLL Controller dividers configurable? If so, is it possible to see the value being updated?
Q2:
Is it possible to configure the field DN_EN of the PLL Controller dividers?
In the register type, DN_EN seems to be a read only register, therefore it is not possible to disable them, even though the TRM suggest it in chapter “Table 5-123. Programming Sequence of PLLCTRL, HSDIV, and PLL”.
