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Original question:

AM6442: RGMII ICSSG input slew rate

[FAQ] AM623: RGMII Input Slew Rate for CPSW3G

Marcel Kaltschmied
Prodigy 80 points

Part Number: AM623

Hi 

We are having trouble achieving the input slew rates of 2.64V/ns ... 5V/ns for the RGMII signals defined in the AM62x Rev B datasheet (SPRSP58B), Table 7-33.

Are the values correct for 1.8V? Because the RMII interface, which uses the same pins, differentiates between 1.8V and 3.3V...

I also have another question for my better understanding. Is the input slew rate calculated from 10%/90% or 20%/80%?


Thank you very much and best regards
Marcel Kaltschmied

  • 0
    TI__Guru**** 232365 points

    Hello Marcel Kaltschmied,

    Thank you for the schematics. 

    Marcel Kaltschmied said:
    We are having trouble achieving the input slew rates of 2.64V/ns ... 5V/ns for the RGMII signals defined in the AM62x Rev B datasheet (SPRSP58B), Table 7-33.

    Are the values correct for 1.8V? Because the RMII interface, which uses the same pins, differentiates between 1.8V and 3.3V...

    I am checking on this. Could you add some additional information on the use case -  Example are you measuring the slew on a board 

    Marcel Kaltschmied said:
    I also have another question for my better understanding. Is the input slew rate calculated from 10%/90% or 20%/80%?
    Marcel Kaltschmied said:
    I also have another question for my better understanding. Is the input slew rate calculated from 10%/90% or 20%/80%?

    Refer below and search for rise time.

    /cfs-file/__key/communityserver-discussions-components-files/791/6661.RGMIIv1_5F00_3.pdf

    Regards,

    Sreenivasa

  • 0
    TI__Mastermind 27890 points

    Hello Marcel,

    The RGMII values are shared for 1.8V and 3.3V and are measured from 20/80% and 80/20% as per the RGMII specification.

    As to your (very logical) question about "same pins, different slew rates", this is a result of ensuring compliance to the relevant specification rather than the performance of the IO cell itself. Timing for each interface is closed independently.

  • 0 in reply to Kallikuppa Sreenivasa
    Prodigy 80 points

    Hi Sreenivasa

    Thank you for your reply.

    We are using a System on Module (plug-in version) with a base board containing a Marvell switch.
    I measured RGMII1_RXC directly at the connector of the module on the base board.

    For the RGMII_RX channel, we started with 18 Ohm series resistors and reduced them to 9 Ohm to get a steeper slope. Lower values tend to overshoot. The trace length from the switch to the connector is around 90mm. The marvell switch has a fixed output drive strength and output slew rate.

    In my opinion, the clock signal doesn't look bad, but doesn't meet the slew rate specifications from TI.

    Best Regards
    Marcel

  • 0 in reply to Marcel Kaltschmied
    TI__Guru**** 232365 points

    Hello Marcel,

    Thank you.

    Do you see any issues with the communication?

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    Prodigy 80 points

    Hi Sreenivasa

    No, we haven't had any errors or excessive packet loss.

    Is there anything we could do on the AM6234 to increase the input slew rate?

    Best Regards
    Marcel