TDA4VM: TDA4VM: How to using DSS Overlay Manager composites two display frame buffer

Hi xie jc,

Can you please read overlay managers registers and share them for the review? I think it uses DSS0_OVR4 overlay, so please save 20 registers from offset 0x04AD0000 and share them?

Regards,

Brijesh

Hi，Brijesh;

My SOC is TDA4VE. After running my test demo, the registers read are as follows；

thanks

Hi xie jc,

Can you please read each register at the offset of 0x4? This does not include regsiter at the offset 0x20, that' where the pipelines are enabled.. 

Regards,

Brijesh

Hi，Brijesh;

The registers read are shown in the table below.Please help me check, thank you

Hi xie jc,

But there is no pipeline enabled here. Have you taken this register dump after or while running the application? All the registers shouldn't be zero if it is taking after running or while running the usecase? 

By default, we use overlay4 for dss m2m node, so there should be some value set in the register at the offset 0x20 and 0x24.

Regards,

Brijesh

Hi，Brijesh;

    Have you taken this register dump after or while running the application?

    answer：Yes

   My test application tivxDisplayM2MNode  parameter configuration is as follows：

Hi xie jc,

But we typically use overlayid as 3, because that's the one reserved for the dss m2m node. Can you check it and then read the value of the overlay3 registers ?

Regards,

Brijesh

Hi，Brijesh;

When I used overlay id 3, it didn't seem to have any effect. The two images were simply overlaid, and didn't use alpha values to mix and overlay the two images. The captured registers are as follows:

thanks

Hi xie jc,

ok from these registers, both the layers are setup correct as per the z-order. 

Can you please check the value of global alpha value in both the video pipelines (VID_GLOBAL_ALPHA)? If the global alpha value is set to 0x0, can you please try setting it to 0xFF? 

Regards,

Brijesh

Hi，Brijesh;

The original global alpha value has been set to 0xFF, as follows；

Hi xie jc,

Can we please readback the register value and confirm the same in both the video pipelines?

Regards,

Brijesh 

Hi，Brijesh;

Can you tell me which registers I need to read ?

thanks

Hi，Brijesh;

1、input image0 R=255 G=0 B=0 A=30

2、input image1 R=0 G=255 B=0 A=100

3、output image A=255

After overlaying two semi transparent images, the Alpha value has changed to 255, which looks abnormal. I need the semi transparent effect after overlaying.

Please help me solve this problem together, thank you.

Hi,

Sorry i did not get the above experiment. What is input image0 and image1? How are specifying alpha value for both of these images? Are they fed to different pipelines? 

Can you please read the value of DSS0_VID_GLOBAL_ALPHA register for all video pipelines that you are using? 

Regards,

Brijesh

Hi，Brijesh;

    tivxDisplayM2MNode(vx_graph graph,

                                       vx_user_data_object configuration,

                                       vx_image input0,

                                       vx_image input1,

                                       vx_image output)

1、 What is input image0 and image1?

answer： input image0 and image1 Corresponding parameters for tivxDisplayM2MNode.

2、 How are specifying alpha value for both of these images?

answer：Use the following method to assign values to input image0 and image1 of tivxDisplayM2MNode.

Hi xie jc,

This looks to be fine to me. i need to see in specs, if there is anything else missing. This should have worked fine. 

Regards,

Brijesh

Hi，Brijesh;

Okay, looking forward to your good news.

thanks

Hi xie jc,

What exactly image format you are using for both the input images, image0 and image1? i wanted to see what is set in the attribute registers for both these inputs pipelines and see if alpha is expected in the upper byte or lower byte? 

Regards,

Brijesh

Hi，Brijesh;

 The image format set for input image 0 and image 1 is 'VX_DF_IMAGE_RGBX'.

thanks

Hi xie jc,

ok, i see the problem. This format uses RGBX format in the DSS, which means it does not use alpha value from the pixels, instead it just treats as X, which is dont care. Alpha value is taken from the global alpha value, which is 0xFF, so it will make the layer as transparent.

Can you try a small change in tivxDisplayExtractFvid2Format API in the video_io\kernels\video_io\display_m2m\vx_display_m2m_target.c file, as shown below?. 

case (vx_df_image)VX_DF_IMAGE_RGBX:
format->dataFormat = FVID2_DF_RGBA32_8888;
format->pitch[FVID2_RGB_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y;
break;

Regards,

Brijesh

Hi，Brijesh;

I have tried to modify this method, unfortunately it does not work, and does not use the input image Alpha value to blend and overlay.

thanks

Hi xie jc,

Are you sure that tiovx is rebuild and changes are in?

Can you please read ATTRIBUTE register for both the channels and share the value of it?

Regards,

Brijesh 

Hi，Brijesh;

1、Are you sure that tiovx is rebuild and changes are in?

>>>Yes,I am sure.

2、Can you please read ATTRIBUTE register for both the channels and share the value of it?

>>>As shown below

Hi,

ok, can you please make sure that Alpha value is set in the MSB, as shown below?

Regards,

Brijesh

Hi，Brijesh;

can you please make sure that Alpha value is set in the MSB ?

>>>I've always done this before, and the image format for 'vxCreateImage' is 'VX_DF_IMAGE_RGBX'.

hi xie jc,

ok, it looks ok to me. Let me look at it again and see if there is anything else missing. 

Regards,

Brijesh

Hi，Brijesh;

ok, I look forward to your good news. Thank you very much for your help.

Hi，Brijesh;

Do you have any good news about this issue?

thanks

Hi xie jc, 

no yet, i will update you about it in this week.

Regards,

Brijesh

Hi，Brijesh;

Okay, thank you.

Regards

Hi，Brijesh;

Is there any good news so far on this issue? When will it be finished

thanks

Hi xie jc,

Not yet, could not check it due to other issue, will check next week. 

Regards,

Brijesh

Hi,

Can you share your code for m2m convert?

I want to see if I can reproduce your problem here.

Regards,

Adam

Hi  Adam，

We are using m2m node to overlay two buffer layers, not a simple format conversion, okay? The patches used are as follows:

TDA4VM: How to using DSS Overlay Manager composites two display frame buffer - Processors forum - Processors - TI E2E support forums

Hi xie,

Can you confirm is this problem solved?