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I have tried to replace yolov6's MaxPool5x5 to two MaxPool3x3. And check "artifacts\tempDir\graphvizInfo.txt" that all operators are supported as shown below:
180 0 TIDL_cast_in Cast outputAdjNodes 1 1 inputAdjNodes 0 imagesNet_IN diagInfo 1 TIDL_Scale_In Add outputAdjNodes 1 2 inputAdjNodes 1 0 diagInfo 2 images Mul outputAdjNodes 1 3 inputAdjNodes 1 1 diagInfo 3 Conv_0 Conv outputAdjNodes 1 4 inputAdjNodes 1 2 diagInfo 4 Relu_1 Relu outputAdjNodes 1 5 inputAdjNodes 1 3 diagInfo 5 Conv_2 Conv outputAdjNodes 1 6 inputAdjNodes 1 4 diagInfo 6 Relu_3 Relu outputAdjNodes 1 7 inputAdjNodes 1 5 diagInfo 7 Conv_4 Conv outputAdjNodes 1 8 inputAdjNodes 1 6 diagInfo 8 Relu_5 Relu outputAdjNodes 1 9 inputAdjNodes 1 7 diagInfo 9 Conv_6 Conv outputAdjNodes 1 10 inputAdjNodes 1 8 diagInfo 10 Relu_7 Relu outputAdjNodes 2 11 88 inputAdjNodes 1 9 diagInfo 11 Conv_8 Conv outputAdjNodes 1 12 inputAdjNodes 1 10 diagInfo 12 Relu_9 Relu outputAdjNodes 1 13 inputAdjNodes 1 11 diagInfo 13 Conv_10 Conv outputAdjNodes 1 14 inputAdjNodes 1 12 diagInfo 14 Relu_11 Relu outputAdjNodes 1 15 inputAdjNodes 1 13 diagInfo 15 Conv_12 Conv outputAdjNodes 1 16 inputAdjNodes 1 14 diagInfo 16 Relu_13 Relu outputAdjNodes 1 17 inputAdjNodes 1 15 diagInfo 17 Conv_14 Conv outputAdjNodes 1 18 inputAdjNodes 1 16 diagInfo 18 Relu_15 Relu outputAdjNodes 1 19 inputAdjNodes 1 17 diagInfo 19 Conv_16 Conv outputAdjNodes 1 20 inputAdjNodes 1 18 diagInfo 20 Relu_17 Relu outputAdjNodes 3 21 68 86 inputAdjNodes 1 19 diagInfo 21 Conv_18 Conv outputAdjNodes 1 22 inputAdjNodes 1 20 diagInfo 22 Relu_19 Relu outputAdjNodes 1 23 inputAdjNodes 1 21 diagInfo 23 Conv_20 Conv outputAdjNodes 1 24 inputAdjNodes 1 22 diagInfo 24 Relu_21 Relu outputAdjNodes 1 25 inputAdjNodes 1 23 diagInfo 25 Conv_22 Conv outputAdjNodes 1 26 inputAdjNodes 1 24 diagInfo 26 Relu_23 Relu outputAdjNodes 1 27 inputAdjNodes 1 25 diagInfo 27 Conv_24 Conv outputAdjNodes 1 28 inputAdjNodes 1 26 diagInfo 28 Relu_25 Relu outputAdjNodes 1 29 inputAdjNodes 1 27 diagInfo 29 Conv_26 Conv outputAdjNodes 1 30 inputAdjNodes 1 28 diagInfo 30 Relu_27 Relu outputAdjNodes 1 31 inputAdjNodes 1 29 diagInfo 31 Conv_28 Conv outputAdjNodes 1 32 inputAdjNodes 1 30 diagInfo 32 Relu_29 Relu outputAdjNodes 1 33 inputAdjNodes 1 31 diagInfo 33 Conv_30 Conv outputAdjNodes 1 34 inputAdjNodes 1 32 diagInfo 34 Relu_31 Relu outputAdjNodes 2 35 66 inputAdjNodes 1 33 diagInfo 35 Conv_32 Conv outputAdjNodes 1 36 inputAdjNodes 1 34 diagInfo 36 Relu_33 Relu outputAdjNodes 1 37 inputAdjNodes 1 35 diagInfo 37 Conv_34 Conv outputAdjNodes 1 38 inputAdjNodes 1 36 diagInfo 38 Relu_35 Relu outputAdjNodes 1 39 inputAdjNodes 1 37 diagInfo 39 Conv_36 Conv outputAdjNodes 1 40 inputAdjNodes 1 38 diagInfo 40 Relu_37 Relu outputAdjNodes 2 41 47 inputAdjNodes 1 39 diagInfo 41 Conv_38 Conv outputAdjNodes 1 42 inputAdjNodes 1 40 diagInfo 42 Relu_39 Relu outputAdjNodes 1 43 inputAdjNodes 1 41 diagInfo 43 Conv_40 Conv outputAdjNodes 1 44 inputAdjNodes 1 42 diagInfo 44 Relu_41 Relu outputAdjNodes 1 45 inputAdjNodes 1 43 diagInfo 45 Conv_42 Conv outputAdjNodes 1 46 inputAdjNodes 1 44 diagInfo 46 Relu_43 Relu outputAdjNodes 2 49 55 inputAdjNodes 1 45 diagInfo 47 Conv_44 Conv outputAdjNodes 1 48 inputAdjNodes 1 40 diagInfo 48 Relu_45 Relu outputAdjNodes 1 60 inputAdjNodes 1 47 diagInfo 49 MaxPool_46 MaxPool outputAdjNodes 1 50 inputAdjNodes 1 46 diagInfo 50 MaxPool_47 MaxPool outputAdjNodes 2 51 55 inputAdjNodes 1 49 diagInfo 51 MaxPool_48 MaxPool outputAdjNodes 1 52 inputAdjNodes 1 50 diagInfo 52 MaxPool_49 MaxPool outputAdjNodes 2 53 55 inputAdjNodes 1 51 diagInfo 53 MaxPool_50 MaxPool outputAdjNodes 1 54 inputAdjNodes 1 52 diagInfo 54 MaxPool_51 MaxPool outputAdjNodes 1 55 inputAdjNodes 1 53 diagInfo 55 Concat_52 Concat outputAdjNodes 1 56 inputAdjNodes 4 46 50 52 54 diagInfo 56 Conv_53 Conv outputAdjNodes 1 57 inputAdjNodes 1 55 diagInfo 57 Relu_54 Relu outputAdjNodes 1 58 inputAdjNodes 1 56 diagInfo 58 Conv_55 Conv outputAdjNodes 1 59 inputAdjNodes 1 57 diagInfo 59 Relu_56 Relu outputAdjNodes 1 60 inputAdjNodes 1 58 diagInfo 60 Concat_57 Concat outputAdjNodes 1 61 inputAdjNodes 2 48 59 diagInfo 61 Conv_58 Conv outputAdjNodes 1 62 inputAdjNodes 1 60 diagInfo 62 Relu_59 Relu outputAdjNodes 1 63 inputAdjNodes 1 61 diagInfo 63 Conv_60 Conv outputAdjNodes 1 64 inputAdjNodes 1 62 diagInfo 64 Relu_61 Relu outputAdjNodes 2 65 116 inputAdjNodes 1 63 diagInfo 65 ConvTranspose_62 ConvTranspose outputAdjNodes 1 72 inputAdjNodes 1 64 diagInfo SUGGESTION -- [TIDL_Deconv2DLayer] Please change to Upsample/Resize if possible. Upsample/Resize will be more efficient. 66 Conv_63 Conv outputAdjNodes 1 67 inputAdjNodes 1 34 diagInfo 67 Relu_64 Relu outputAdjNodes 1 72 inputAdjNodes 1 66 diagInfo 68 Conv_65 Conv outputAdjNodes 1 69 inputAdjNodes 1 20 diagInfo 69 Relu_66 Relu outputAdjNodes 1 70 inputAdjNodes 1 68 diagInfo 70 Conv_67 Conv outputAdjNodes 1 71 inputAdjNodes 1 69 diagInfo 71 Relu_68 Relu outputAdjNodes 1 72 inputAdjNodes 1 70 diagInfo 72 Concat_69 Concat outputAdjNodes 1 73 inputAdjNodes 3 65 67 71 diagInfo 73 Conv_70 Conv outputAdjNodes 1 74 inputAdjNodes 1 72 diagInfo 74 Relu_71 Relu outputAdjNodes 1 75 inputAdjNodes 1 73 diagInfo 75 Conv_72 Conv outputAdjNodes 1 76 inputAdjNodes 1 74 diagInfo 76 Relu_73 Relu outputAdjNodes 1 77 inputAdjNodes 1 75 diagInfo 77 Conv_74 Conv outputAdjNodes 1 78 inputAdjNodes 1 76 diagInfo 78 Relu_75 Relu outputAdjNodes 1 79 inputAdjNodes 1 77 diagInfo 79 Conv_76 Conv outputAdjNodes 1 80 inputAdjNodes 1 78 diagInfo 80 Relu_77 Relu outputAdjNodes 1 81 inputAdjNodes 1 79 diagInfo 81 Conv_78 Conv outputAdjNodes 1 82 inputAdjNodes 1 80 diagInfo 82 Relu_79 Relu outputAdjNodes 1 83 inputAdjNodes 1 81 diagInfo 83 Conv_80 Conv outputAdjNodes 1 84 inputAdjNodes 1 82 diagInfo 84 Relu_81 Relu outputAdjNodes 2 85 105 inputAdjNodes 1 83 diagInfo 85 ConvTranspose_82 ConvTranspose outputAdjNodes 1 92 inputAdjNodes 1 84 diagInfo SUGGESTION -- [TIDL_Deconv2DLayer] Please change to Upsample/Resize if possible. Upsample/Resize will be more efficient. 86 Conv_83 Conv outputAdjNodes 1 87 inputAdjNodes 1 20 diagInfo 87 Relu_84 Relu outputAdjNodes 1 92 inputAdjNodes 1 86 diagInfo 88 Conv_85 Conv outputAdjNodes 1 89 inputAdjNodes 1 10 diagInfo 89 Relu_86 Relu outputAdjNodes 1 90 inputAdjNodes 1 88 diagInfo 90 Conv_87 Conv outputAdjNodes 1 91 inputAdjNodes 1 89 diagInfo 91 Relu_88 Relu outputAdjNodes 1 92 inputAdjNodes 1 90 diagInfo 92 Concat_89 Concat outputAdjNodes 1 93 inputAdjNodes 3 85 87 91 diagInfo 93 Conv_90 Conv outputAdjNodes 1 94 inputAdjNodes 1 92 diagInfo 94 Relu_91 Relu outputAdjNodes 1 95 inputAdjNodes 1 93 diagInfo 95 Conv_92 Conv outputAdjNodes 1 96 inputAdjNodes 1 94 diagInfo 96 Relu_93 Relu outputAdjNodes 1 97 inputAdjNodes 1 95 diagInfo 97 Conv_94 Conv outputAdjNodes 1 98 inputAdjNodes 1 96 diagInfo 98 Relu_95 Relu outputAdjNodes 1 99 inputAdjNodes 1 97 diagInfo 99 Conv_96 Conv outputAdjNodes 1 100 inputAdjNodes 1 98 diagInfo 100 Relu_97 Relu outputAdjNodes 1 101 inputAdjNodes 1 99 diagInfo 101 Conv_98 Conv outputAdjNodes 1 102 inputAdjNodes 1 100 diagInfo 102 Relu_99 Relu outputAdjNodes 2 103 125 inputAdjNodes 1 101 diagInfo 103 Conv_100 Conv outputAdjNodes 1 104 inputAdjNodes 1 102 diagInfo 104 Relu_101 Relu outputAdjNodes 1 105 inputAdjNodes 1 103 diagInfo 105 Concat_102 Concat outputAdjNodes 1 106 inputAdjNodes 2 104 84 diagInfo 106 Conv_103 Conv outputAdjNodes 1 107 inputAdjNodes 1 105 diagInfo 107 Relu_104 Relu outputAdjNodes 1 108 inputAdjNodes 1 106 diagInfo 108 Conv_105 Conv outputAdjNodes 1 109 inputAdjNodes 1 107 diagInfo 109 Relu_106 Relu outputAdjNodes 1 110 inputAdjNodes 1 108 diagInfo 110 Conv_107 Conv outputAdjNodes 1 111 inputAdjNodes 1 109 diagInfo 111 Relu_108 Relu outputAdjNodes 1 112 inputAdjNodes 1 110 diagInfo 112 Conv_109 Conv outputAdjNodes 1 113 inputAdjNodes 1 111 diagInfo 113 Relu_110 Relu outputAdjNodes 2 114 139 inputAdjNodes 1 112 diagInfo 114 Conv_111 Conv outputAdjNodes 1 115 inputAdjNodes 1 113 diagInfo 115 Relu_112 Relu outputAdjNodes 1 116 inputAdjNodes 1 114 diagInfo 116 Concat_113 Concat outputAdjNodes 1 117 inputAdjNodes 2 115 64 diagInfo 117 Conv_114 Conv outputAdjNodes 1 118 inputAdjNodes 1 116 diagInfo 118 Relu_115 Relu outputAdjNodes 1 119 inputAdjNodes 1 117 diagInfo 119 Conv_116 Conv outputAdjNodes 1 120 inputAdjNodes 1 118 diagInfo 120 Relu_117 Relu outputAdjNodes 1 121 inputAdjNodes 1 119 diagInfo 121 Conv_118 Conv outputAdjNodes 1 122 inputAdjNodes 1 120 diagInfo 122 Relu_119 Relu outputAdjNodes 1 123 inputAdjNodes 1 121 diagInfo 123 Conv_120 Conv outputAdjNodes 1 124 inputAdjNodes 1 122 diagInfo 124 Relu_121 Relu outputAdjNodes 1 153 inputAdjNodes 1 123 diagInfo 125 Conv_132 Conv outputAdjNodes 2 126 127 inputAdjNodes 1 102 diagInfo 126 Sigmoid_133 Sigmoid outputAdjNodes 1 127 inputAdjNodes 1 125 diagInfo 127 Mul_134 Mul outputAdjNodes 2 128 131 inputAdjNodes 2 125 126 diagInfo 128 Conv_135 Conv outputAdjNodes 2 129 130 inputAdjNodes 1 127 diagInfo 129 Sigmoid_136 Sigmoid outputAdjNodes 1 130 inputAdjNodes 1 128 diagInfo 130 Mul_137 Mul outputAdjNodes 1 134 inputAdjNodes 2 128 129 diagInfo 131 Conv_138 Conv outputAdjNodes 2 132 133 inputAdjNodes 1 127 diagInfo 132 Sigmoid_139 Sigmoid outputAdjNodes 1 133 inputAdjNodes 1 131 diagInfo 133 Mul_140 Mul outputAdjNodes 1 135 inputAdjNodes 2 131 132 diagInfo 134 Conv_141 Conv outputAdjNodes 1 136 inputAdjNodes 1 130 diagInfo 135 Conv_142 Conv outputAdjNodes 1 138 inputAdjNodes 1 133 diagInfo 136 Sigmoid_143 Sigmoid outputAdjNodes 1 137 inputAdjNodes 1 134 diagInfo 137 Reshape_147 Reshape outputAdjNodes 1 167 inputAdjNodes 1 136 diagInfo 138 Reshape_151 Reshape outputAdjNodes 1 169 inputAdjNodes 1 135 diagInfo 139 Conv_162 Conv outputAdjNodes 2 140 141 inputAdjNodes 1 113 diagInfo 140 Sigmoid_163 Sigmoid outputAdjNodes 1 141 inputAdjNodes 1 139 diagInfo 141 Mul_164 Mul outputAdjNodes 2 142 145 inputAdjNodes 2 139 140 diagInfo 142 Conv_165 Conv outputAdjNodes 2 143 144 inputAdjNodes 1 141 diagInfo 143 Sigmoid_166 Sigmoid outputAdjNodes 1 144 inputAdjNodes 1 142 diagInfo 144 Mul_167 Mul outputAdjNodes 1 148 inputAdjNodes 2 142 143 diagInfo 145 Conv_168 Conv outputAdjNodes 2 146 147 inputAdjNodes 1 141 diagInfo 146 Sigmoid_169 Sigmoid outputAdjNodes 1 147 inputAdjNodes 1 145 diagInfo 147 Mul_170 Mul outputAdjNodes 1 149 inputAdjNodes 2 145 146 diagInfo 148 Conv_171 Conv outputAdjNodes 1 150 inputAdjNodes 1 144 diagInfo 149 Conv_172 Conv outputAdjNodes 1 152 inputAdjNodes 1 147 diagInfo 150 Sigmoid_173 Sigmoid outputAdjNodes 1 151 inputAdjNodes 1 148 diagInfo 151 Reshape_177 Reshape outputAdjNodes 1 167 inputAdjNodes 1 150 diagInfo 152 Reshape_181 Reshape outputAdjNodes 1 169 inputAdjNodes 1 149 diagInfo 153 Conv_192 Conv outputAdjNodes 2 154 155 inputAdjNodes 1 124 diagInfo 154 Sigmoid_193 Sigmoid outputAdjNodes 1 155 inputAdjNodes 1 153 diagInfo 155 Mul_194 Mul outputAdjNodes 2 156 159 inputAdjNodes 2 153 154 diagInfo 156 Conv_195 Conv outputAdjNodes 2 157 158 inputAdjNodes 1 155 diagInfo 157 Sigmoid_196 Sigmoid outputAdjNodes 1 158 inputAdjNodes 1 156 diagInfo 158 Mul_197 Mul outputAdjNodes 1 162 inputAdjNodes 2 156 157 diagInfo 159 Conv_198 Conv outputAdjNodes 2 160 161 inputAdjNodes 1 155 diagInfo 160 Sigmoid_199 Sigmoid outputAdjNodes 1 161 inputAdjNodes 1 159 diagInfo 161 Mul_200 Mul outputAdjNodes 1 163 inputAdjNodes 2 159 160 diagInfo 162 Conv_201 Conv outputAdjNodes 1 164 inputAdjNodes 1 158 diagInfo 163 Conv_202 Conv outputAdjNodes 1 166 inputAdjNodes 1 161 diagInfo 164 Sigmoid_203 Sigmoid outputAdjNodes 1 165 inputAdjNodes 1 162 diagInfo 165 Reshape_207 Reshape outputAdjNodes 1 167 inputAdjNodes 1 164 diagInfo 166 Reshape_211 Reshape outputAdjNodes 1 169 inputAdjNodes 1 163 diagInfo 167 Concat_212 Concat outputAdjNodes 1 168 inputAdjNodes 3 137 151 165 diagInfo 168 Transpose_213 Transpose outputAdjNodes 1 179 inputAdjNodes 1 167 diagInfo 169 Concat_214 Concat outputAdjNodes 1 170 inputAdjNodes 3 138 152 166 diagInfo 170 Transpose_215 Transpose outputAdjNodes 1 171 inputAdjNodes 1 169 diagInfo 171 Split_353 Split outputAdjNodes 2 172 173 inputAdjNodes 1 170 diagInfo 172 Sub_354 Sub outputAdjNodes 2 174 176 inputAdjNodes 1 171 diagInfo 173 Add_355 Add outputAdjNodes 2 174 176 inputAdjNodes 1 171 diagInfo 174 Add_356 Add outputAdjNodes 1 175 inputAdjNodes 2 172 173 diagInfo 175 Div_357 Div outputAdjNodes 1 177 inputAdjNodes 1 174 diagInfo 176 Sub_358 Sub outputAdjNodes 1 177 inputAdjNodes 2 173 172 diagInfo 177 Concat_359 Concat outputAdjNodes 1 178 inputAdjNodes 2 175 176 diagInfo 178 Mul_360 Mul outputAdjNodes 1 179 inputAdjNodes 1 177 diagInfo 179 Concat_368 Concat outputAdjNodes 0 outputs inputAdjNodes 2 178 168 diagInfo
But when I ran "run_benchmarks_pc.sh", I still encountered an error as shown below:
Error: Layer 0, outputs:outputs is missing inputs in the network and cannot be topologically sorted Input 0: outputs, dataId=0
Full information using debug level=2 is like this:
(ti_bm_8_5) programer@programer-VirtualBox:~/project/CMS/ti-benchmark_r8_5/edgeai-benchmark$ . ./run_benchmarks_pc.sh TARGET_SOC: TDA4VM Pass the appropriate commandline argument to use another one. before run_set_env target_device/SOC: TDA4VM before run_set_target_machine find: ‘./work_dirs/modelartifacts/8bits/’: No such file or directory after run_set_target_machine TIDL_TOOLS_PATH=/home/programer/project/CMS/ti-benchmark_r8_5/edgeai-benchmark/tools/TDA4VM/tidl_tools LD_LIBRARY_PATH=/home/programer/project/CMS/ti-benchmark_r8_5/edgeai-benchmark/tools/TDA4VM/tidl_tools PYTHONPATH=:::: after run_set_env =================================================================== argv: ['./scripts/benchmark_modelzoo.py', 'settings_import_on_pc.yaml', '--target_device', 'TDA4VM'] settings: {'include_files': None, 'pipeline_type': 'accuracy', 'num_frames': 500, 'calibration_frames': 20, 'calibration_iterations': 20, 'configs_path': './configs', 'models_path': './models', 'modelartifacts_path': './work_dirs/modelartifacts/TDA4VM', 'datasets_path': './data', 'target_device': 'TDA4VM', 'target_machine': 'pc', 'run_suffix': None, 'parallel_devices': [0], 'tensor_bits': 8, 'runtime_options': None, 'run_import': True, 'run_inference': True, 'run_missing': True, 'detection_threshold': 0.4, 'detection_top_k': 500, 'detection_nms_threshold': None, 'detection_keep_top_k': None, 'save_output': True, 'num_output_frames': 50, 'model_selection': ['y6n_ti_lite_640x416_f20_i20'], 'model_shortlist': None, 'model_exclusion': None, 'task_selection': 'detection', 'runtime_selection': ['onnxrt'], 'session_type_dict': {'onnx': 'onnxrt', 'tflite': 'tflitert', 'mxnet': 'tvmdlr'}, 'dataset_type_dict': {'imagenet': 'imagenetv2c'}, 'dataset_selection': ['coco'], 'dataset_loading': True, 'config_range': None, 'enable_logging': True, 'verbose': True, 'capture_log': False, 'experimental_models': False, 'rewrite_results': False, 'with_udp': False, 'flip_test': False, 'model_transformation_dict': None, 'report_perfsim': False, 'tidl_offload': True, 'input_optimization': None, 'run_dir_tree_depth': None, 'settings_file': 'settings_import_on_pc.yaml', 'basic_keys': ['include_files', 'pipeline_type', 'num_frames', 'calibration_frames', 'calibration_iterations', 'configs_path', 'models_path', 'modelartifacts_path', 'datasets_path', 'target_device', 'target_machine', 'run_suffix', 'parallel_devices', 'tensor_bits', 'runtime_options', 'run_import', 'run_inference', 'run_missing', 'detection_threshold', 'detection_top_k', 'detection_nms_threshold', 'detection_keep_top_k', 'save_output', 'num_output_frames', 'model_selection', 'model_shortlist', 'model_exclusion', 'task_selection', 'runtime_selection', 'session_type_dict', 'dataset_type_dict', 'dataset_selection', 'dataset_loading', 'config_range', 'enable_logging', 'verbose', 'capture_log', 'experimental_models', 'rewrite_results', 'with_udp', 'flip_test', 'model_transformation_dict', 'report_perfsim', 'tidl_offload', 'input_optimization', 'run_dir_tree_depth', 'settings_file'], 'dataset_cache': None} work_dir: ./work_dirs/modelartifacts/TDA4VM/8bits INFO:20240328-175603: dataset exists - will reuse - ./data/coco loading annotations into memory... Done (t=0.29s) creating index... index created! loading annotations into memory... Done (t=0.33s) creating index... index created! download_ok: True Download False loading annotations into memory... Done (t=0.00s) creating index... index created! loading annotations into memory... Done (t=0.00s) creating index... index created! configs to run: ['y6n_ti_lite_640x416_f20_i20_onnxrt_edgeai-benchmark_models_yolov6n_ti_lite_640x416_onnx'] number of configs: 1 TASKS | | 0% 0/1| [< ] INFO:20240328-175606: starting process on parallel_device - 0 0%| || 0/1 [00:00<?, ?it/s] INFO:20240328-175606: starting - y6n_ti_lite_640x416_f20_i20_onnxrt_edgeai-benchmark_models_yolov6n_ti_lite_640x416_onnx INFO:20240328-175606: model_path - /home/programer/project/CMS/ti-benchmark_r8_5/edgeai-benchmark/models/yolov6n_ti_lite_640x416.onnx INFO:20240328-175606: model_file - /home/programer/project/CMS/ti-benchmark_r8_5/edgeai-benchmark/work_dirs/modelartifacts/TDA4VM/8bits/y6n_ti_lite_640x416_f20_i20_onnxrt_edgeai-benchmark_models_yolov6n_ti_lite_640x416_onnx/model/yolov6n_ti_lite_640x416.onnx INFO:20240328-175606: running - y6n_ti_lite_640x416_f20_i20_onnxrt_edgeai-benchmark_models_yolov6n_ti_lite_640x416_onnx INFO:20240328-175606: pipeline_config - {'task_type': 'detection', 'dataset_category': 'coco', 'calibration_dataset': <edgeai_benchmark.datasets.coco_det.COCODetection object at 0x7f0bc51062e8>, 'input_dataset': <edgeai_benchmark.datasets.coco_det.COCODetection object at 0x7f0baec0d6a0>, 'preprocess': <edgeai_benchmark.preprocess.PreProcessTransforms object at 0x7f0baec0d710>, 'session': <edgeai_benchmark.sessions.onnxrt_session.ONNXRTSession object at 0x7f0baec0da58>, 'postprocess': <edgeai_benchmark.postprocess.PostProcessTransforms object at 0x7f0baec0dac8>, 'metric': {'label_offset_pred': {0: 1, 1: 2, 2: 3, 3: 4, 4: 5, 5: 6, 6: 7, 7: 8, 8: 9, 9: 10, 10: 11, 11: 12, 12: 13, 13: 14, 14: 15, 15: 16, 16: 17, 17: 18, 18: 19, 19: 20, 20: 21, 21: 22, 22: 23, 23: 24, 24: 25, 25: 26, 26: 27, 27: 28, 28: 29, 29: 30, 30: 31, 31: 32, 32: 33, 33: 34, 34: 35, 35: 36, 36: 37, 37: 38, 38: 39, 39: 40, 40: 41, 41: 42, 42: 43, 43: 44, 44: 45, 45: 46, 46: 47, 47: 48, 48: 49, 49: 50, 50: 51, 51: 52, 52: 53, 53: 54, 54: 55, 55: 56, 56: 57, 57: 58, 58: 59, 59: 60, 60: 61, 61: 62, 62: 63, 63: 64, 64: 65, 65: 66, 66: 67, 67: 68, 68: 69, 69: 70, 70: 71, 71: 72, 72: 73, 73: 74, 74: 75, 75: 76, 76: 77, 77: 78, 78: 79, 79: 80}}, 'model_info': {'metric_reference': {'accuracy_ap[.5:.95]%': 39.6}, 'model_shortlist': None}} INFO:20240328-175606: import - y6n_ti_lite_640x416_f20_i20_onnxrt_edgeai-benchmark_models_yolov6n_ti_lite_640x416_onnx - this may take some time...tidl_tools_path = /home/programer/project/CMS/ti-benchmark_r8_5/edgeai-benchmark/tools/TDA4VM/tidl_tools artifacts_folder = /home/programer/project/CMS/ti-benchmark_r8_5/edgeai-benchmark/work_dirs/modelartifacts/TDA4VM/8bits/y6n_ti_lite_640x416_f20_i20_onnxrt_edgeai-benchmark_models_yolov6n_ti_lite_640x416_onnx/artifacts tidl_tensor_bits = 8 debug_level = 2 num_tidl_subgraphs = 16 tidl_denylist = tidl_denylist_layer_name = tidl_denylist_layer_type = model_type = tidl_calibration_accuracy_level = 7 tidl_calibration_options:num_frames_calibration = 20 tidl_calibration_options:bias_calibration_iterations = 20 mixed_precision_factor = -1.000000 model_group_id = 0 power_of_2_quantization = 2 enable_high_resolution_optimization = 0 pre_batchnorm_fold = 1 add_data_convert_ops = 3 output_feature_16bit_names_list = 289, 323, 357 m_params_16bit_names_list = reserved_compile_constraints_flag = 1601 ti_internal_reserved_1 = TIDL Meta PipeLine (Proto) File : /home/programer/project/CMS/ti-benchmark_r8_5/edgeai-benchmark/work_dirs/modelartifacts/TDA4VM/8bits/y6n_ti_lite_640x416_f20_i20_onnxrt_edgeai-benchmark_models_yolov6n_ti_lite_640x416_onnx/model/yolov6n_ti_lite_640x416.prototxt yolo_v3 yolo_v3 Number of OD backbone nodes = 128 Size of odBackboneNodeIds = 128 Supported TIDL layer type --- Cast -- Supported TIDL layer type --- Add -- Supported TIDL layer type --- Mul -- Supported TIDL layer type --- Conv -- Conv_0 Supported TIDL layer type --- Relu -- Relu_1 Supported TIDL layer type --- Conv -- Conv_2 Supported TIDL layer type --- Relu -- Relu_3 Supported TIDL layer type --- Conv -- Conv_4 Supported TIDL layer type --- Relu -- Relu_5 Supported TIDL layer type --- Conv -- Conv_6 Supported TIDL layer type --- Relu -- Relu_7 Supported TIDL layer type --- Conv -- Conv_8 Supported TIDL layer type --- Relu -- Relu_9 Supported TIDL layer type --- Conv -- Conv_10 Supported TIDL layer type --- Relu -- Relu_11 Supported TIDL layer type --- Conv -- Conv_12 Supported TIDL layer type --- Relu -- Relu_13 Supported TIDL layer type --- Conv -- Conv_14 Supported TIDL layer type --- Relu -- Relu_15 Supported TIDL layer type --- Conv -- Conv_16 Supported TIDL layer type --- Relu -- Relu_17 Supported TIDL layer type --- Conv -- Conv_18 Supported TIDL layer type --- Relu -- Relu_19 Supported TIDL layer type --- Conv -- Conv_20 Supported TIDL layer type --- Relu -- Relu_21 Supported TIDL layer type --- Conv -- Conv_22 Supported TIDL layer type --- Relu -- Relu_23 Supported TIDL layer type --- Conv -- Conv_24 Supported TIDL layer type --- Relu -- Relu_25 Supported TIDL layer type --- Conv -- Conv_26 Supported TIDL layer type --- Relu -- Relu_27 Supported TIDL layer type --- Conv -- Conv_28 Supported TIDL layer type --- Relu -- Relu_29 Supported TIDL layer type --- Conv -- Conv_30 Supported TIDL layer type --- Relu -- Relu_31 Supported TIDL layer type --- Conv -- Conv_32 Supported TIDL layer type --- Relu -- Relu_33 Supported TIDL layer type --- Conv -- Conv_34 Supported TIDL layer type --- Relu -- Relu_35 Supported TIDL layer type --- Conv -- Conv_36 Supported TIDL layer type --- Relu -- Relu_37 Supported TIDL layer type --- Conv -- Conv_38 Supported TIDL layer type --- Relu -- Relu_39 Supported TIDL layer type --- Conv -- Conv_40 Supported TIDL layer type --- Relu -- Relu_41 Supported TIDL layer type --- Conv -- Conv_42 Supported TIDL layer type --- Relu -- Relu_43 Supported TIDL layer type --- Conv -- Conv_44 Supported TIDL layer type --- Relu -- Relu_45 Supported TIDL layer type --- MaxPool -- MaxPool_46 Supported TIDL layer type --- MaxPool -- MaxPool_47 Supported TIDL layer type --- MaxPool -- MaxPool_48 Supported TIDL layer type --- MaxPool -- MaxPool_49 Supported TIDL layer type --- MaxPool -- MaxPool_50 Supported TIDL layer type --- MaxPool -- MaxPool_51 Supported TIDL layer type --- Concat -- Concat_52 Supported TIDL layer type --- Conv -- Conv_53 Supported TIDL layer type --- Relu -- Relu_54 Supported TIDL layer type --- Conv -- Conv_55 Supported TIDL layer type --- Relu -- Relu_56 Supported TIDL layer type --- Concat -- Concat_57 Supported TIDL layer type --- Conv -- Conv_58 Supported TIDL layer type --- Relu -- Relu_59 Supported TIDL layer type --- Conv -- Conv_60 Supported TIDL layer type --- Relu -- Relu_61 Supported TIDL layer type --- ConvTranspose -- ConvTranspose_62 Supported TIDL layer type --- Conv -- Conv_63 Supported TIDL layer type --- Relu -- Relu_64 Supported TIDL layer type --- Conv -- Conv_65 Supported TIDL layer type --- Relu -- Relu_66 Supported TIDL layer type --- Conv -- Conv_67 Supported TIDL layer type --- Relu -- Relu_68 Supported TIDL layer type --- Concat -- Concat_69 Supported TIDL layer type --- Conv -- Conv_70 Supported TIDL layer type --- Relu -- Relu_71 Supported TIDL layer type --- Conv -- Conv_72 Supported TIDL layer type --- Relu -- Relu_73 Supported TIDL layer type --- Conv -- Conv_74 Supported TIDL layer type --- Relu -- Relu_75 Supported TIDL layer type --- Conv -- Conv_76 Supported TIDL layer type --- Relu -- Relu_77 Supported TIDL layer type --- Conv -- Conv_78 Supported TIDL layer type --- Relu -- Relu_79 Supported TIDL layer type --- Conv -- Conv_80 Supported TIDL layer type --- Relu -- Relu_81 Supported TIDL layer type --- ConvTranspose -- ConvTranspose_82 Supported TIDL layer type --- Conv -- Conv_83 Supported TIDL layer type --- Relu -- Relu_84 Supported TIDL layer type --- Conv -- Conv_85 Supported TIDL layer type --- Relu -- Relu_86 Supported TIDL layer type --- Conv -- Conv_87 Supported TIDL layer type --- Relu -- Relu_88 Supported TIDL layer type --- Concat -- Concat_89 Supported TIDL layer type --- Conv -- Conv_90 Supported TIDL layer type --- Relu -- Relu_91 Supported TIDL layer type --- Conv -- Conv_92 Supported TIDL layer type --- Relu -- Relu_93 Supported TIDL layer type --- Conv -- Conv_94 Supported TIDL layer type --- Relu -- Relu_95 Supported TIDL layer type --- Conv -- Conv_96 Supported TIDL layer type --- Relu -- Relu_97 Supported TIDL layer type --- Conv -- Conv_98 Supported TIDL layer type --- Relu -- Relu_99 Supported TIDL layer type --- Conv -- Conv_100 Supported TIDL layer type --- Relu -- Relu_101 Supported TIDL layer type --- Concat -- Concat_102 Supported TIDL layer type --- Conv -- Conv_103 Supported TIDL layer type --- Relu -- Relu_104 Supported TIDL layer type --- Conv -- Conv_105 Supported TIDL layer type --- Relu -- Relu_106 Supported TIDL layer type --- Conv -- Conv_107 Supported TIDL layer type --- Relu -- Relu_108 Supported TIDL layer type --- Conv -- Conv_109 Supported TIDL layer type --- Relu -- Relu_110 Supported TIDL layer type --- Conv -- Conv_111 Supported TIDL layer type --- Relu -- Relu_112 Supported TIDL layer type --- Concat -- Concat_113 Supported TIDL layer type --- Conv -- Conv_114 Supported TIDL layer type --- Relu -- Relu_115 Supported TIDL layer type --- Conv -- Conv_116 Supported TIDL layer type --- Relu -- Relu_117 Supported TIDL layer type --- Conv -- Conv_118 Supported TIDL layer type --- Relu -- Relu_119 Supported TIDL layer type --- Conv -- Conv_120 Supported TIDL layer type --- Relu -- Relu_121 Supported TIDL layer type --- Conv -- Conv_132 Supported TIDL layer type --- Conv -- Conv_162 Supported TIDL layer type --- Conv -- Conv_192 Preliminary subgraphs created = 1 Final number of subgraphs created are : 1, - Offloaded Nodes - 180, Total Nodes - 180 SUGGESTION -- [TIDL_Deconv2DLayer] Please change to Upsample/Resize if possible. Upsample/Resize will be more efficient. SUGGESTION -- [TIDL_Deconv2DLayer] Please change to Upsample/Resize if possible. Upsample/Resize will be more efficient. Running runtimes graphviz - /home/programer/project/CMS/ti-benchmark_r8_5/edgeai-benchmark/tools/TDA4VM/tidl_tools/tidl_graphVisualiser_runtimes.out /home/programer/project/CMS/ti-benchmark_r8_5/edgeai-benchmark/work_dirs/modelartifacts/TDA4VM/8bits/y6n_ti_lite_640x416_f20_i20_onnxrt_edgeai-benchmark_models_yolov6n_ti_lite_640x416_onnx/artifacts/allowedNode.txt /home/programer/project/CMS/ti-benchmark_r8_5/edgeai-benchmark/work_dirs/modelartifacts/TDA4VM/8bits/y6n_ti_lite_640x416_f20_i20_onnxrt_edgeai-benchmark_models_yolov6n_ti_lite_640x416_onnx/artifacts/tempDir/graphvizInfo.txt /home/programer/project/CMS/ti-benchmark_r8_5/edgeai-benchmark/work_dirs/modelartifacts/TDA4VM/8bits/y6n_ti_lite_640x416_f20_i20_onnxrt_edgeai-benchmark_models_yolov6n_ti_lite_640x416_onnx/artifacts/tempDir/runtimes_visualization.svg *** In TIDL_createStateImportFunc *** Compute on node : TIDLExecutionProvider_TIDL_0_0 0, Cast, 1, 1, imagesNet_IN, TIDL_cast_in 1, Add, 2, 1, TIDL_cast_in, TIDL_Scale_In 2, Mul, 2, 1, TIDL_Scale_In, images 3, Conv, 3, 1, images, 157 4, Relu, 1, 1, 157, 158 5, Conv, 3, 1, 158, 159 6, Relu, 1, 1, 159, 160 7, Conv, 3, 1, 160, 161 8, Relu, 1, 1, 161, 162 9, Conv, 3, 1, 162, 163 10, Relu, 1, 1, 163, 164 11, Conv, 3, 1, 164, 165 12, Relu, 1, 1, 165, 166 13, Conv, 3, 1, 166, 167 14, Relu, 1, 1, 167, 168 15, Conv, 3, 1, 168, 169 16, Relu, 1, 1, 169, 170 17, Conv, 3, 1, 170, 171 18, Relu, 1, 1, 171, 172 19, Conv, 3, 1, 172, 173 20, Relu, 1, 1, 173, 174 21, Conv, 3, 1, 174, 175 22, Relu, 1, 1, 175, 176 23, Conv, 3, 1, 176, 177 24, Relu, 1, 1, 177, 178 25, Conv, 3, 1, 178, 179 26, Relu, 1, 1, 179, 180 27, Conv, 3, 1, 180, 181 28, Relu, 1, 1, 181, 182 29, Conv, 3, 1, 182, 183 30, Relu, 1, 1, 183, 184 31, Conv, 3, 1, 184, 185 32, Relu, 1, 1, 185, 186 33, Conv, 3, 1, 186, 187 34, Relu, 1, 1, 187, 188 35, Conv, 3, 1, 188, 189 36, Relu, 1, 1, 189, 190 37, Conv, 3, 1, 190, 191 38, Relu, 1, 1, 191, 192 39, Conv, 3, 1, 192, 193 40, Relu, 1, 1, 193, 194 41, Conv, 3, 1, 194, 201 42, Relu, 1, 1, 201, 202 43, Conv, 3, 1, 194, 195 44, Relu, 1, 1, 195, 196 45, Conv, 3, 1, 196, 197 46, Relu, 1, 1, 197, 198 47, Conv, 3, 1, 198, 199 48, Relu, 1, 1, 199, 200 49, MaxPool, 1, 1, 200, 203 50, MaxPool, 1, 1, 203, 204 51, MaxPool, 1, 1, 204, 205 52, MaxPool, 1, 1, 205, 206 53, MaxPool, 1, 1, 206, 207 54, MaxPool, 1, 1, 207, 208 55, Concat, 4, 1, 200, 209 56, Conv, 3, 1, 209, 210 57, Relu, 1, 1, 210, 211 58, Conv, 3, 1, 211, 212 59, Relu, 1, 1, 212, 213 60, Concat, 2, 1, 202, 214 61, Conv, 3, 1, 214, 215 62, Relu, 1, 1, 215, 216 63, Conv, 3, 1, 216, 217 64, Relu, 1, 1, 217, 218 65, ConvTranspose, 3, 1, 218, 219 66, Conv, 3, 1, 188, 220 67, Relu, 1, 1, 220, 221 68, Conv, 3, 1, 174, 222 69, Relu, 1, 1, 222, 223 70, Conv, 3, 1, 223, 224 71, Relu, 1, 1, 224, 225 72, Concat, 3, 1, 219, 226 73, Conv, 3, 1, 226, 227 74, Relu, 1, 1, 227, 228 75, Conv, 3, 1, 228, 229 76, Relu, 1, 1, 229, 230 77, Conv, 3, 1, 230, 231 78, Relu, 1, 1, 231, 232 79, Conv, 3, 1, 232, 233 80, Relu, 1, 1, 233, 234 81, Conv, 3, 1, 234, 235 82, Relu, 1, 1, 235, 236 83, Conv, 3, 1, 236, 237 84, Relu, 1, 1, 237, 238 85, ConvTranspose, 3, 1, 238, 239 86, Conv, 3, 1, 174, 240 87, Relu, 1, 1, 240, 241 88, Conv, 3, 1, 164, 242 89, Relu, 1, 1, 242, 243 90, Conv, 3, 1, 243, 244 91, Relu, 1, 1, 244, 245 92, Concat, 3, 1, 239, 246 93, Conv, 3, 1, 246, 247 94, Relu, 1, 1, 247, 248 95, Conv, 3, 1, 248, 249 96, Relu, 1, 1, 249, 250 97, Conv, 3, 1, 250, 251 98, Relu, 1, 1, 251, 252 99, Conv, 3, 1, 252, 253 100, Relu, 1, 1, 253, 254 101, Conv, 3, 1, 254, 255 102, Relu, 1, 1, 255, 256 103, Conv, 3, 1, 256, 289 104, Sigmoid, 1, 1, 289, 290 105, Mul, 2, 1, 289, 291 106, Conv, 3, 1, 291, 292 107, Sigmoid, 1, 1, 292, 293 108, Mul, 2, 1, 292, 294 109, Conv, 3, 1, 294, 298 110, Sigmoid, 1, 1, 298, 300 111, Reshape, 2, 1, 300, 306 112, Conv, 3, 1, 256, 257 113, Relu, 1, 1, 257, 258 114, Concat, 2, 1, 258, 259 115, Conv, 3, 1, 259, 260 116, Relu, 1, 1, 260, 261 117, Conv, 3, 1, 261, 262 118, Relu, 1, 1, 262, 263 119, Conv, 3, 1, 263, 264 120, Relu, 1, 1, 264, 265 121, Conv, 3, 1, 265, 266 122, Relu, 1, 1, 266, 267 123, Conv, 3, 1, 267, 323 124, Sigmoid, 1, 1, 323, 324 125, Mul, 2, 1, 323, 325 126, Conv, 3, 1, 325, 326 127, Sigmoid, 1, 1, 326, 327 128, Mul, 2, 1, 326, 328 129, Conv, 3, 1, 328, 332 130, Sigmoid, 1, 1, 332, 334 131, Reshape, 2, 1, 334, 340 132, Conv, 3, 1, 267, 268 133, Relu, 1, 1, 268, 269 134, Concat, 2, 1, 269, 270 135, Conv, 3, 1, 270, 271 136, Relu, 1, 1, 271, 272 137, Conv, 3, 1, 272, 273 138, Relu, 1, 1, 273, 274 139, Conv, 3, 1, 274, 275 140, Relu, 1, 1, 275, 276 141, Conv, 3, 1, 276, 277 142, Relu, 1, 1, 277, 278 143, Conv, 3, 1, 278, 357 144, Sigmoid, 1, 1, 357, 358 145, Mul, 2, 1, 357, 359 146, Conv, 3, 1, 359, 360 147, Sigmoid, 1, 1, 360, 361 148, Mul, 2, 1, 360, 362 149, Conv, 3, 1, 362, 366 150, Sigmoid, 1, 1, 366, 368 151, Reshape, 2, 1, 368, 374 152, Concat, 3, 1, 306, 381 153, Transpose, 1, 1, 381, 382 154, Conv, 3, 1, 291, 295 155, Sigmoid, 1, 1, 295, 296 156, Mul, 2, 1, 295, 297 157, Conv, 3, 1, 297, 299 158, Reshape, 2, 1, 299, 312 159, Conv, 3, 1, 325, 329 160, Sigmoid, 1, 1, 329, 330 161, Mul, 2, 1, 329, 331 162, Conv, 3, 1, 331, 333 163, Reshape, 2, 1, 333, 346 164, Conv, 3, 1, 359, 363 165, Sigmoid, 1, 1, 363, 364 166, Mul, 2, 1, 363, 365 167, Conv, 3, 1, 365, 367 168, Reshape, 2, 1, 367, 380 169, Concat, 3, 1, 312, 383 170, Transpose, 1, 1, 383, 384 171, Split, 1, 2, 384, 528 172, Sub, 2, 1, 526, 530 173, Add, 2, 1, 526, 531 174, Add, 2, 1, 530, 532 175, Div, 2, 1, 532, 535 176, Sub, 2, 1, 531, 536 177, Concat, 2, 1, 535, 537 178, Mul, 2, 1, 537, 538 179, Concat, 3, 1, 538, outputs Input tensor name - imagesNet_IN Output tensor name - outputs In TIDL_onnxRtImportInit subgraph_name=outputs Layer 0, subgraph id outputs, name=outputs Layer 1, subgraph id outputs, name=imagesNet_IN In TIDL_runtimesOptimizeNet: LayerIndex = 130, dataIndex = 129 Error: Layer 0, outputs:outputs is missing inputs in the network and cannot be topologically sorted Input 0: outputs, dataId=0 ************** Frame index 1 : Running float import ************* In TIDL_runtimesPostProcessNet SUGGESTION: [TIDL_Deconv2DLayer] ConvTranspose_62 Please change to Upsample/Resize if possible. Upsample/Resize will be more efficient. SUGGESTION: [TIDL_Deconv2DLayer] ConvTranspose_82 Please change to Upsample/Resize if possible. Upsample/Resize will be more efficient. WARNING: [TIDL_E_DATAFLOW_INFO_NULL] Network compiler returned with error or didn't executed, this model can only be used on PC/Host emulation mode, it is not expected to work on target/EVM. **************************************************** ** 3 WARNINGS 0 ERRORS ** **************************************************** ************ in TIDL_subgraphRtCreate ************ The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.35s: VX_ZONE_ERROR:Enabled 0.69s: VX_ZONE_WARNING:Enabled 0.1101s: VX_ZONE_INIT:[tivxInit:184] Initialization Done !!! Alg Alloc for Layer # - 0 Alg Alloc for Layer # - 1 Alg Alloc for Layer # - 2 Alg Alloc for Layer # - 3 Alg Alloc for Layer # - 4 Alg Alloc for Layer # - 5 Alg Alloc for Layer # - 6 Alg Alloc for Layer # - 7 Alg Alloc for Layer # - 8 Alg Alloc for Layer # - 9 Alg Alloc for Layer # - 10 Alg Alloc for Layer # - 11 Alg Alloc for Layer # - 12 Alg Alloc for Layer # - 13 Alg Alloc for Layer # - 14 Alg Alloc for Layer # - 15 Alg Alloc for Layer # - 16 Alg Alloc for Layer # - 17 Alg Alloc for Layer # - 18 Alg Alloc for Layer # - 19 Alg Alloc for Layer # - 20 Alg Alloc for Layer # - 21 Alg Alloc for Layer # - 22 Alg Alloc for Layer # - 23 Alg Alloc for Layer # - 24 Alg Alloc for Layer # - 25 Alg Alloc for Layer # - 26 Alg Alloc for Layer # - 27 Alg Alloc for Layer # - 28 Alg Alloc for Layer # - 29 Alg Alloc for Layer # - 30 Alg Alloc for Layer # - 31 Alg Alloc for Layer # - 32 Alg Alloc for Layer # - 33 Alg Alloc for Layer # - 34 Alg Alloc for Layer # - 35 Alg Alloc for Layer # - 36 Alg Alloc for Layer # - 37 Alg Alloc for Layer # - 38 Alg Alloc for Layer # - 39 Alg Alloc for Layer # - 40 Alg Alloc for Layer # - 41 Alg Alloc for Layer # - 42 Alg Alloc for Layer # - 43 Alg Alloc for Layer # - 44 Alg Alloc for Layer # - 45 Alg Alloc for Layer # - 46 Alg Alloc for Layer # - 47 Alg Alloc for Layer # - 48 Alg Alloc for Layer # - 49 Alg Alloc for Layer # - 50 Alg Alloc for Layer # - 51 Alg Alloc for Layer # - 52 Alg Alloc for Layer # - 53 Alg Alloc for Layer # - 54 Alg Alloc for Layer # - 55 Alg Alloc for Layer # - 56 Alg Alloc for Layer # - 57 Alg Alloc for Layer # - 58 Alg Alloc for Layer # - 59 Alg Alloc for Layer # - 60 Alg Alloc for Layer # - 61 Alg Alloc for Layer # - 62 Alg Alloc for Layer # - 63 Alg Alloc for Layer # - 64 Alg Alloc for Layer # - 65 Alg Alloc for Layer # - 66 Alg Alloc for Layer # - 67 Alg Alloc for Layer # - 68 Alg Alloc for Layer # - 69 Alg Alloc for Layer # - 70 Alg Alloc for Layer # - 71 Alg Alloc for Layer # - 72 Alg Alloc for Layer # - 73 -------------------------------------------- TIDL Memory size requiement (record wise): MemRecNum , Space , Attribute , Size(KBytes) 0 , DDR Non-cacheable, Persistent , 14.86 1 , DDR Non-cacheable, Persistent , 0.14 2 , DDR Non-cacheable, Scratch , 16.00 3 , DDR Non-cacheable, Scratch , 4.00 4 , DDR Non-cacheable, Scratch , 56.00 5 , DDR Non-cacheable, Persistent , 79.20 6 , DDR Non-cacheable, Scratch , 26825.97 7 , DDR Non-cacheable, Scratch , 0.12 8 , DDR Non-cacheable, Scratch , 6349.91 9 , DDR Non-cacheable, Scratch , 33868.50 10 , DDR Non-cacheable, Scratch , 0.12 11 , DDR Non-cacheable, Persistent , 830.12 12 , DDR Non-cacheable, Scratch , 512.25 13 , DDR Non-cacheable, Persistent , 0.12 14 , DDR Non-cacheable, Persistent , 0.12 15 , DDR Non-cacheable, Persistent , 0.12 -------------------------------------------- Total memory size requirement (space wise): Mem Space , Size(KBytes) DDR Non-cacheable, 68557.57 -------------------------------------------- NOTE: Memory requirement in host emulation can be different from the same on EVM To get the actual TIDL memory requirement make sure to run on EVM with writeTraceLevel = 2 -------------------------------------------- Alg Init for Layer # - 0 out of 73 Alg Init for Layer # - 1 out of 73 Alg Init for Layer # - 2 out of 73 Alg Init for Layer # - 3 out of 73 Alg Init for Layer # - 4 out of 73 Alg Init for Layer # - 5 out of 73 Alg Init for Layer # - 6 out of 73 Alg Init for Layer # - 7 out of 73 Alg Init for Layer # - 8 out of 73 Alg Init for Layer # - 9 out of 73 Alg Init for Layer # - 10 out of 73 Alg Init for Layer # - 11 out of 73 Alg Init for Layer # - 12 out of 73 Alg Init for Layer # - 13 out of 73 Alg Init for Layer # - 14 out of 73 Alg Init for Layer # - 15 out of 73 Alg Init for Layer # - 16 out of 73 Alg Init for Layer # - 17 out of 73 Alg Init for Layer # - 18 out of 73 Alg Init for Layer # - 19 out of 73 Alg Init for Layer # - 20 out of 73 Alg Init for Layer # - 21 out of 73 Alg Init for Layer # - 22 out of 73 Alg Init for Layer # - 23 out of 73 Alg Init for Layer # - 24 out of 73 Alg Init for Layer # - 25 out of 73 Alg Init for Layer # - 26 out of 73 Alg Init for Layer # - 27 out of 73 Alg Init for Layer # - 28 out of 73 Alg Init for Layer # - 29 out of 73 Alg Init for Layer # - 30 out of 73 Alg Init for Layer # - 31 out of 73 Alg Init for Layer # - 32 out of 73 Alg Init for Layer # - 33 out of 73 Alg Init for Layer # - 34 out of 73 Alg Init for Layer # - 35 out of 73 Alg Init for Layer # - 36 out of 73 Alg Init for Layer # - 37 out of 73 Alg Init for Layer # - 38 out of 73 Alg Init for Layer # - 39 out of 73 Alg Init for Layer # - 40 out of 73 Alg Init for Layer # - 41 out of 73 Alg Init for Layer # - 42 out of 73 Alg Init for Layer # - 43 out of 73 Alg Init for Layer # - 44 out of 73 Alg Init for Layer # - 45 out of 73 Alg Init for Layer # - 46 out of 73 Alg Init for Layer # - 47 out of 73 Alg Init for Layer # - 48 out of 73 Alg Init for Layer # - 49 out of 73 Alg Init for Layer # - 50 out of 73 Alg Init for Layer # - 51 out of 73 Alg Init for Layer # - 52 out of 73 Alg Init for Layer # - 53 out of 73 Alg Init for Layer # - 54 out of 73 Alg Init for Layer # - 55 out of 73 Alg Init for Layer # - 56 out of 73 Alg Init for Layer # - 57 out of 73 Alg Init for Layer # - 58 out of 73 Alg Init for Layer # - 59 out of 73 Alg Init for Layer # - 60 out of 73 Alg Init for Layer # - 61 out of 73 Alg Init for Layer # - 62 out of 73 Alg Init for Layer # - 63 out of 73 Alg Init for Layer # - 64 out of 73 Alg Init for Layer # - 65 out of 73 Alg Init for Layer # - 66 out of 73 Alg Init for Layer # - 67 out of 73 Alg Init for Layer # - 68 out of 73 Alg Init for Layer # - 69 out of 73 Alg Init for Layer # - 70 out of 73 Alg Init for Layer # - 71 out of 73 Alg Init for Layer # - 72 out of 73 Alg Init for Layer # - 73 out of 73 PREEMPTION: Adding a new priority object for targetPriority = 2, handle = 0x7f0bddd94000 PREEMPTION: Now total number of priority objects = 1 at priorityId = 2, with new memRec of base = 0x7f0bfe751000 and size = 128 PREEMPTION: Requesting context memory addr for handle 0x7f0bddd94000, return Addr = 0x7f0bfe751000 ************ TIDL_subgraphRtCreate done ************ Warning : Couldn't find corresponding ioBuf tensor for onnx tensor with matching name ******* In TIDL_subgraphRtInvoke ******** TIDL_activate is called with handle : ddd94000 Starting Layer # - 1 Processing Layer # - 1 End of Layer # - 1 with outPtrs[0] = 0x7f0b7e5cd000 Starting Layer # - 2 Processing Layer # - 2 End of Layer # - 2 with outPtrs[0] = 0x7f0b7e8dfe00 Starting Layer # - 3 Processing Layer # - 3 End of Layer # - 3 with outPtrs[0] = 0x7f0b7ed02300 Starting Layer # - 4 Processing Layer # - 4 End of Layer # - 4 with outPtrs[0] = 0x7f0b7ef1c880 Starting Layer # - 5 Processing Layer # - 5 End of Layer # - 5 with outPtrs[0] = 0x7f0b7ed02300 Starting Layer # - 6 Processing Layer # - 6 End of Layer # - 6 with outPtrs[0] = 0x7f0b7f136e00 Starting Layer # - 7 Processing Layer # - 7 End of Layer # - 7 with outPtrs[0] = 0x7f0b7f24d500 Starting Layer # - 8 Processing Layer # - 8 End of Layer # - 8 with outPtrs[0] = 0x7f0b7f136e00 Starting Layer # - 9 Processing Layer # - 9 End of Layer # - 9 with outPtrs[0] = 0x7f0b7f24d500 Starting Layer # - 10 Processing Layer # - 10 End of Layer # - 10 with outPtrs[0] = 0x7f0b7f136e00 Starting Layer # - 11 Processing Layer # - 11 End of Layer # - 11 with outPtrs[0] = 0x7f0b7f363c00 Starting Layer # - 12 Processing Layer # - 12 End of Layer # - 12 with outPtrs[0] = 0x7f0b7f3f8600 Starting Layer # - 13 Processing Layer # - 13 End of Layer # - 13 with outPtrs[0] = 0x7f0b7f363c00 Starting Layer # - 14 Processing Layer # - 14 End of Layer # - 14 with outPtrs[0] = 0x7f0b7f3f8600 Starting Layer # - 15 Processing Layer # - 15 End of Layer # - 15 with outPtrs[0] = 0x7f0b7f363c00 Starting Layer # - 16 Processing Layer # - 16 End of Layer # - 16 with outPtrs[0] = 0x7f0b7f3f8600 Starting Layer # - 17 Processing Layer # - 17 End of Layer # - 17 with outPtrs[0] = 0x7f0b7f363c00 Starting Layer # - 18 Processing Layer # - 18 End of Layer # - 18 with outPtrs[0] = 0x7f0b7f48d000 Starting Layer # - 19 Processing Layer # - 19 End of Layer # - 19 with outPtrs[0] = 0x7f0b7f4e1000 Starting Layer # - 20 Processing Layer # - 20 End of Layer # - 20 with outPtrs[0] = 0x7f0b7f535000 Starting Layer # - 21 Processing Layer # - 21 End of Layer # - 21 with outPtrs[0] = 0x7f0b7f576000 Starting Layer # - 22 Processing Layer # - 22 End of Layer # - 22 with outPtrs[0] = 0x7f0b7f4e1000 Starting Layer # - 23 Processing Layer # - 23 End of Layer # - 23 with outPtrs[0] = 0x7f0b7f535000 Starting Layer # - 24 Processing Layer # - 24 End of Layer # - 24 with outPtrs[0] = 0x7f0b7f4e1000 Starting Layer # - 25 Processing Layer # - 25 End of Layer # - 25 with outPtrs[0] = 0x7f0b7f596800 Starting Layer # - 26 Processing Layer # - 26 End of Layer # - 26 with outPtrs[0] = 0x7f0b7f5c0800 Starting Layer # - 27 Processing Layer # - 27 End of Layer # - 27 with outPtrs[0] = 0x7f0b7f596800 Starting Layer # - 28 Processing Layer # - 28 End of Layer # - 28 with outPtrs[0] = 0x7f0b7f5ea800 Starting Layer # - 29 Processing Layer # - 29 End of Layer # - 29 with outPtrs[0] = 0x7f0b7f596800 Starting Layer # - 30 Processing Layer # - 30 End of Layer # - 30 with outPtrs[0] = 0x7f0b7f614800 Starting Layer # - 31 Processing Layer # - 31 End of Layer # - 31 with outPtrs[0] = 0x7f0b7f635000 Starting Layer # - 32 Processing Layer # - 32 End of Layer # - 32 with outPtrs[0] = 0x7f0b7f4e1000 Starting Layer # - 33 Processing Layer # - 33 End of Layer # - 33 with outPtrs[0] = 0x7f0b7f535000 Starting Layer # - 34 Processing Layer # - 34 End of Layer # - 34 with outPtrs[0] = 0x7f0b7f635000 Starting Layer # - 35 Processing Layer # - 35 End of Layer # - 35 with outPtrs[0] = 0x7f0b7f535000 Starting Layer # - 36 Processing Layer # - 36 End of Layer # - 36 with outPtrs[0] = 0x7f0b7f576000 Starting Layer # - 37 Processing Layer # - 37 End of Layer # - 37 with outPtrs[0] = 0x7f0b7f6b7000 Starting Layer # - 38 Processing Layer # - 38 End of Layer # - 38 with outPtrs[0] = 0x7f0b7f6f8000 Starting Layer # - 39 Processing Layer # - 39 End of Layer # - 39 with outPtrs[0] = 0x7f0b7f24d500 Starting Layer # - 40 Processing Layer # - 40 End of Layer # - 40 with outPtrs[0] = 0x7f0b7f739000 Starting Layer # - 41 Processing Layer # - 41 End of Layer # - 41 with outPtrs[0] = 0x7f0b7f77a000 Starting Layer # - 42 Processing Layer # - 42 End of Layer # - 42 with outPtrs[0] = 0x7f0b7f3f8600 Starting Layer # - 43 Processing Layer # - 43 End of Layer # - 43 with outPtrs[0] = 0x7f0b7f363c00 Starting Layer # - 44 Processing Layer # - 44 End of Layer # - 44 with outPtrs[0] = 0x7f0b7f3f8600 Starting Layer # - 45 Processing Layer # - 45 End of Layer # - 45 with outPtrs[0] = 0x7f0b7f363c00 Starting Layer # - 46 Processing Layer # - 46 End of Layer # - 46 with outPtrs[0] = 0x7f0b7f739000 Starting Layer # - 47 Processing Layer # - 47 End of Layer # - 47 with outPtrs[0] = 0x7f0b7f6f8000 Starting Layer # - 48 Processing Layer # - 48 End of Layer # - 48 with outPtrs[0] = 0x7f0b7f83d000 Starting Layer # - 49 Processing Layer # - 49 End of Layer # - 49 with outPtrs[0] = 0x7f0b7f8bf000 Starting Layer # - 50 Processing Layer # - 50 End of Layer # - 50 with outPtrs[0] = 0x7f0b7ef1c880 Starting Layer # - 51 Processing Layer # - 51 End of Layer # - 51 with outPtrs[0] = 0x7f0b7f941000 Starting Layer # - 52 Processing Layer # - 52 End of Layer # - 52 with outPtrs[0] = 0x7f0b7f9c3000 Starting Layer # - 53 Processing Layer # - 53 End of Layer # - 53 with outPtrs[0] = 0x7f0b7f24d500 Starting Layer # - 54 Processing Layer # - 54 End of Layer # - 54 with outPtrs[0] = 0x7f0b7f136e00 Starting Layer # - 55 Processing Layer # - 55 End of Layer # - 55 with outPtrs[0] = 0x7f0b7f24d500 Starting Layer # - 56 Processing Layer # - 56 End of Layer # - 56 with outPtrs[0] = 0x7f0b7f136e00 Starting Layer # - 57 Processing Layer # - 57 End of Layer # - 57 with outPtrs[0] = 0x7f0b7f24d500 Starting Layer # - 58 Processing Layer # - 58 End of Layer # - 58 with outPtrs[0] = 0x7f0bbfa20000 Starting Layer # - 59 Processing Layer # - 59 End of Layer # - 59 with outPtrs[0] = 0x7f0b7f739000 Starting Layer # - 60 Processing Layer # - 60 End of Layer # - 60 with outPtrs[0] = 0x7f0b7fb49000 Starting Layer # - 61 Processing Layer # - 61 End of Layer # - 61 with outPtrs[0] = 0x7f0b7f3f8600 Starting Layer # - 62 Processing Layer # - 62 End of Layer # - 62 with outPtrs[0] = 0x7f0b7f363c00 Starting Layer # - 63 Processing Layer # - 63 End of Layer # - 63 with outPtrs[0] = 0x7f0b7f3f8600 Starting Layer # - 64 Processing Layer # - 64 End of Layer # - 64 with outPtrs[0] = 0x7f0b7f363c00 Starting Layer # - 65 Processing Layer # - 65 End of Layer # - 65 with outPtrs[0] = 0x7f0bbf9dd000 Starting Layer # - 66 Processing Layer # - 66 End of Layer # - 66 with outPtrs[0] = 0x7f0b7f535000 Starting Layer # - 67 Processing Layer # - 67 End of Layer # - 67 with outPtrs[0] = 0x7f0b7fb93500 Starting Layer # - 68 Processing Layer # - 68 End of Layer # - 68 with outPtrs[0] = 0x7f0b7f4e1000 Starting Layer # - 69 Processing Layer # - 69 End of Layer # - 69 with outPtrs[0] = 0x7f0b7f48d000 Starting Layer # - 70 Processing Layer # - 70 End of Layer # - 70 with outPtrs[0] = 0x7f0b7f4e1000 Starting Layer # - 71 Processing Layer # - 71 End of Layer # - 71 with outPtrs[0] = 0x7f0b7f576000 Starting Layer # - 72 Processing Layer # - 72 End of Layer # - 72 with outPtrs[0] = 0x7f0bbf9bc000 TIDL_process is completed with handle : ddd94000 Layer, Layer Cycles,kernelOnlyCycles, coreLoopCycles,LayerSetupCycles,dmaPipeupCycles, dmaPipeDownCycles, PrefetchCycles,copyKerCoeffCycles,LayerDeinitCycles,LastBlockCycles, paddingTrigger, paddingWait,LayerWithoutPad,LayerHandleCopy, BackupCycles, RestoreCycles, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 29, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 33, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 35, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 36, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 37, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 38, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 39, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 40, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 41, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 43, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 44, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 45, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 46, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 47, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 49, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 50, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 51, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 52, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 53, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 54, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 55, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 56, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 57, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 58, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 59, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 61, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 62, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 63, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 65, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 66, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 67, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 68, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 69, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 70, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 72, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, Sum of Layer Cycles 0 ERROR: Running TIDL graph ... Failed !!! Sub Graph Stats 395.000000 2294317.000000 1293.000000 ******* TIDL_subgraphRtInvoke done ********
Any suggestion?
Thanks
--Joy
Hi Joy,
Due to upcoming holiday, please expect a 1~2 business day delay in responses.
Apologies for the delay, and thank you for your patience.
Regards,
Takuma
Without looking at the actual model, its hard to say what could be wrong.
Currently we are in the process of publishing our fork of https://github.com/open-mmlab/mmyolo with support of training several lite models (including yolov5, yolox, yolov7 and yolov8). Unfortunately yolov6 is not supported in our fork of mmyolo as it requires more work to correctly export those parallel paths used in training. We will also publish options for TIDL model compilation.
If you can wait for a few days, we will publish the fork and you can take a look at it.