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AM6442: GPMC want to read two16 bit words instead of one (GPMC single synch read)

Part Number: AM6442

Hello TI Support Team,

we use the AM6442A chip.
We want to read one word from the GPMC interface in synchronous mode.

But the GPMC interface always wants to read two words (two GPMC clocks are active if /ren is low, see the following diagram).
The timings are the following:

ADVONTIME 1 //1
ADVRDOFFTIME 2
RDCYCLETIME 5 
RDACCESSTIME 4 
CSRDOFFTIME 5 
OEONTIME 3 
OEOFFTIME 5
WRDATAONADMUXBUS 3
PAGEBURSTACCESSTIME 1
CYCLE2CYCLEDELAY 2 

Single Synch 16 Bit read does a 2 x 16bit read instead of 1 x 16bit
(two GPMC clock rising edges are seen if /ren is low).
The delays i think are ok.





It is possible to configure the GPMC interface in single synch read mode to read only one word (1 x 16 bit read access) in NOR mode (we use a fpga no NOR memory)?


Writing of one word is  ok. GPMC limits the single write to 1 x 16 bit, (only one rising edge if /wen is low) and is ok.




With best regards

Steffen