Hi,
We are using TMS320C6655 DSP Processor.We are interfacing DSP with fpga via EMIF Communication.We have used EDMA transfer to read the data from fpga and also Transfer Completion Interrupt is Enabled.We are observing the transfer signals in fpga stp.
For the First Dma initiate,we are able to see the emif read signal in stp and also tcc isr is getting triggered in fpga.After that for second initiate,we are not able to see the read signal going from dsp to fpga.Edma channel initiate didnt happen.After every power cycle,only once dma transfer is happening and completion isr is getting called.Second time onwards,we are facing edma access issue.
Please provide any suggestions for the issue that we are facing currently.
Regards,Thilak
