Tool/software:
Hi Expert,
In the newest AM64 DDR config tools, read DBI is set as enable, and it can not be changed to disable, read DBI will increase read latency, please suggest how to disable it in DDR config tools.
Thanks
Thomas
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Tool/software:
Hi Expert,
In the newest AM64 DDR config tools, read DBI is set as enable, and it can not be changed to disable, read DBI will increase read latency, please suggest how to disable it in DDR config tools.
Thanks
Thomas
Hi James,
Customer choose a DDR4 which doesn't support read DBI, how to change the DDR4 config tool?
-Thomas
OK, but please note that they may encounter supply noise issues with a memory that doesn't support DBI. This is required for reliable operation.
They will have to manually make the following changes to their configuration:
Regards,
James
Hi James,
If we keep the default setting as ENABLE (for read DBI), will AM6442 still could boot up? If not, how could we know the boot process stop here?
PS: I am also encountering a DDR4 initialization issue on my AM6442 customized board. The DDR4 modules we used also not support "read DBI" function. My SDK version is 09.02.01.09.
Kind Regards,
Anderson
Hi James,
The old DDR config tool can modify this item, where we can find the old config tool?
-Thomas
Thomas, i would not recommend using the old tool. The latest tool has several enhancements and modifications. I can allow changing the read DBI in the next version of the tool, but i will still reiterate that it is not recommended to use a DDR4 that doesn't support read DBI.
For now, they will have to use the current tool, and make the manual changes i mentioned above
Regards,
James
Hi James,
My DDR4 part number is IS43QR81024A-075VBLI K103 (ISSI, 8-bit, 1Gb).
For our customized AM6442 board, we use 2 pieces of such 8-bit DDR4 module to be a 16-bit system connecting with AM6442.
After following your above instruction, I try to DISABLE the "read DBI" function manually, but our system still cannot boot up, yet. (as attached screenshot)
PS: The EEPROM check process has been bypassed. (SDK 09.02.01.09)
Kind Regards,
Choson
Hi Choson, is the a new custom board, or has this board worked before and now it doesn't? I'm just trying to see if this is specifically a DBI problem, or there may be some other unrelated issue.
Can you send the schematic of the DDR interface from processor to memory? Did you implement VTT termination? Did you connect both BG[1:0] signals?
Regards,
James
Hi JJD,
Thanks for your kind response. I create a new question below for discussing our issue and provide more information there.
Could you help me on providing some guidance, if you may? Thanks.