Tool/software:
Provide the steps to integrate SDL functional safety modules such as BIST, POK, VTM and TOG with the PDK Boot Application.
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Tool/software:
Provide the steps to integrate SDL functional safety modules such as BIST, POK, VTM and TOG with the PDK Boot Application.
When the Boot Application is operating in DDR, it indicates that it is functioning within the Main Domain. It is important to note that any BIST assessments that may affect the overall functionality of the Main Domain cannot be executed from the Boot App. This precaution is necessary to prevent potential corruption of the Boot App itself.
The below PBIST tests must therefore be excluded from Boot App as they should be followed by a Main Domain reset before starting the Boot App.
In the case of the board booting in SD or eMMC boot mode, caution should be exercised when running the following tests, as they impact the SD/eMMC drivers:
0001-BIST-Integration-with-SBL-BootApp.txt
NOTE: To exclude the above mentioned tests from SDL, please apply the patch shared below as follows:
cd $RTOS_SDK/sdl/
git init
git add .
git commit -m "init commit"
git am $PATH_TO_PATCH_SHARED_BELOW
diff -ru sdl_baseline/examples/bist/bist.c sdl/examples/bist/bist.c --- sdl_baseline/examples/bist/bist.c 2024-01-12 06:08:21.398350632 -0800 +++ sdl/examples/bist/bist.c 2024-01-20 09:08:46.101244213 -0800 @@ -295,6 +295,31 @@ { continue; } + /* Main Infra0/1, NAVSS and MSMC should not be run, if Boot App is running in DDR */ + if((i==7)|| (i==2)||(i==6)||(i==25)) + { + continue; + } + /* HC has MMCSD in Auxiallary list*/ + if(i==9) + { + continue; + } + /* Codecs are impacting QNX SDMMC driver */ + if ((i==12) || (i==1)) + { + continue; + } + /* DSS is impacting QNX SDMMC driver */ + if (i==4) + { + continue; + } + /* A72 affects Linux boot */ + if ((i==13)|| (i==14)||(i==15)||(i==16)) + { + continue; + } #endif /*MCU instances are not supported for neg and pos test, So skipped according to the pbist_first_boot_stage array sequence */ @@ -350,6 +375,31 @@ { continue; } + /* Main Infra0/1, NAVSS and MSMC should not be run, if Boot App is running in DDR */ + if((i==7)|| (i==2)||(i==6)||(i==25)) + { + continue; + } + /* HC has MMCSD in Auxiallary list*/ + if(i==9) + { + continue; + } + /* Codecs are impacting QNX SDMMC driver */ + if ((i==12) || (i==1)) + { + continue; + } + /* DSS is impacting QNX SDMMC driver */ + if (i==4) + { + continue; + } + /* A72 affects Linux boot */ + if ((i==13)|| (i==14)||(i==15)||(i==16)) + { + continue; + } #endif /*MCU instances are not supported for neg and pos test, So skipped according to the pbist_first_boot_stage array sequence */ @@ -395,6 +445,32 @@ #if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4) for (i = 0; i < num_pbists_per_boot_stage[j]; i++) { + + /* Main Infra0/1, NAVSS and MSMC should not be run, if Boot App is running in DDR */ + if((i==7)|| (i==2)||(i==6)||(i==25)) + { + continue; + } + /* HC has MMCSD in Auxiallary list*/ + if(i==9) + { + continue; + } + /* Codecs are impacting QNX SDMMC driver */ + if ((i==12) || (i==1)) + { + continue; + } + /* DSS is impacting QNX SDMMC driver */ + if (i==4) + { + continue; + } + /* A72 affects Linux boot */ + if ((i==13)|| (i==14)||(i==15)||(i==16)) + { + continue; + } /* Run test on selected instance */ testResult = PBIST_runTest(pbist_array[i], (uint8_t)PBIST_TEST_ROM); diff -ru sdl_baseline/examples/bist/pbist_utils.c sdl/examples/bist/pbist_utils.c --- sdl_baseline/examples/bist/pbist_utils.c 2024-01-12 06:08:21.398350632 -0800 +++ sdl/examples/bist/pbist_utils.c 2024-01-15 09:05:48.365366685 -0800 @@ -535,14 +535,13 @@ { #if defined(SOC_J721E) || defined(SOC_J721S2)|| defined(SOC_J784S4) CSL_ErrType_t status; - int32_t retValue = 0; + /* Add firewall entry to gain access to CLEC registers */ status = PBIST_setFirewall(); if (status != CSL_PASS) { UART_printf( " PBIST_setFirewall failed \n"); - retValue = -1; } return status; @@ -1384,7 +1383,7 @@ UART_printf(" Secondary core: Taking out of local reset the core %s \n", PBIST_TestHandleArray[instanceId].secCoreName); #endif - status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciSecProcId, + status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciSecDeviceId, 0x0, /* Local Reset de-asserted */ SCICLIENT_SERVICE_WAIT_FOREVER); if (status != CSL_PASS) @@ -1403,7 +1402,7 @@ UART_printf(" Third core: Taking out of local reset the core %s \n", PBIST_TestHandleArray[instanceId].thCoreName); #endif - status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciThProcId, + status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciThDeviceId, 0x0, /* Local Reset de-asserted */ SCICLIENT_SERVICE_WAIT_FOREVER); if (status != SDL_PASS) @@ -1422,7 +1421,7 @@ UART_printf(" Third core: Taking out of local reset the core %s \n", PBIST_TestHandleArray[instanceId].foCoreName); #endif - status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciFoProcId, + status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciFoDeviceId, 0x0, /* Local Reset de-asserted */ SCICLIENT_SERVICE_WAIT_FOREVER); if (status != SDL_PASS)
2. VTM Integration with PDK BootApp:
From 4beed975130f93d23980cc42e0c06373f003a2b7 Mon Sep 17 00:00:00 2001
From: Josiitaa RL <j-rl@ti.com>
Date: Wed, 27 Mar 2024 17:21:25 +0530
Subject: [PATCH 1/3] VTM Integration with PDK BootApp
---
packages/ti/boot/sbl/build/boot_app.mk | 11 +-
.../boot/sbl/example/boot_app/boot_app_main.c | 70 ++-
.../ti/boot/sbl/example/boot_app/vtm/vtm.c | 442 ++++++++++++++++++
.../ti/boot/sbl/example/boot_app/vtm/vtm.h | 66 +++
.../sbl/example/boot_app/vtm/vtm_example.c | 438 +++++++++++++++++
5 files changed, 1024 insertions(+), 3 deletions(-)
create mode 100644 packages/ti/boot/sbl/example/boot_app/vtm/vtm.c
create mode 100644 packages/ti/boot/sbl/example/boot_app/vtm/vtm.h
create mode 100644 packages/ti/boot/sbl/example/boot_app/vtm/vtm_example.c
diff --git a/packages/ti/boot/sbl/build/boot_app.mk b/packages/ti/boot/sbl/build/boot_app.mk
index c2606d46..ba30b945 100644
--- a/packages/ti/boot/sbl/build/boot_app.mk
+++ b/packages/ti/boot/sbl/build/boot_app.mk
@@ -51,21 +51,26 @@ ifeq ($(BOOTMODE), mmcsd)
CFLAGS_LOCAL_COMMON += -DBOOT_MMCSD
ifeq ($(BOARD),$(filter $(BOARD), j784s4_evm))
CFLAGS_LOCAL_COMMON += -DBIST_TASK_ENABLED
+ CFLAGS_LOCAL_COMMON += -DVTM_TASK_ENABLED
#CFLAGS_LOCAL_COMMON +=
INCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/bist
INCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/bist/soc/$(SOC)
+
+ INCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/vtm
# SDL Include Files
SDL_INSTALL_PATH=$(PDK_INSTALL_PATH)/../../sdl
INCDIR += $(SDL_INSTALL_PATH)/
INCDIR += $(SDL_INSTALL_PATH)/src/sdl
+ INCDIR += $(SDL_INSTALL_PATH)/src/ip
INCDIR += $(SDL_INSTALL_PATH)/include
INCDIR += $(SDL_INSTALL_PATH)/include/soc/$(SOC)
-
+
# SDL Source File Paths
SRCDIR += $(SDL_INSTALL_PATH)/test/osal/src
SRCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/bist
SRCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/bist/soc/$(SOC)
-
+
+ SRCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/vtm
# SDL Integration
EXT_LIB_LIST_COMMON += $(SDL_INSTALL_PATH)/binary/osal/lib/$(SOC)/r5f/$(BUILD_PROFILE)/sdl_osal.$(LIBEXT)
EXT_LIB_LIST_COMMON += $(SDL_INSTALL_PATH)/binary/src/ip/lib/$(SOC)/r5f/$(BUILD_PROFILE)/sdl_ip.$(LIBEXT)
@@ -77,6 +82,8 @@ ifeq ($(BOOTMODE), mmcsd)
SRCS_COMMON += lbist_utils.c lbist_defs.c
SRCS_COMMON += pbist_utils.c pbist_defs.c
SRCS_COMMON += power_seq.c armv8_power_utils.c
+
+ SRCS_COMMON += vtm.c vtm_example.c
endif
endif
ifeq ($(BOOTMODE), ospi)
diff --git a/packages/ti/boot/sbl/example/boot_app/boot_app_main.c b/packages/ti/boot/sbl/example/boot_app/boot_app_main.c
index 73231700..1f654ad8 100644
--- a/packages/ti/boot/sbl/example/boot_app/boot_app_main.c
+++ b/packages/ti/boot/sbl/example/boot_app/boot_app_main.c
@@ -85,6 +85,9 @@
#include "bist.h"
#include "test/osal/osal_interface.h"
#endif
+#if defined(VTM_TASK_ENABLED)
+#include "vtm.h"
+#endif
/* ========================================================================== */
/* Macros & Typedefs */
/* ========================================================================== */
@@ -95,10 +98,14 @@
#define BOOT_TASK_PRIORITY (2)
#if defined(BIST_TASK_ENABLED)
-#define BIST_TASK_PRIORITY (3)
+#define BIST_TASK_PRIORITY (4)
#define BIST_TASK_STACKSIZE (16U * 1024U)
#endif
+#if defined(VTM_TASK_ENABLED)
+#define VTM_TASK_PRIORITY (3)
+#define VTM_TASK_STACKSIZE (10U * 1024U)
+#endif
/* uncomment the following for debug logs */
// #define UART_PRINT_DEBUG
@@ -115,6 +122,9 @@ static void BootApp_TaskFxn(void* a0, void* a1);
#if defined(BIST_TASK_ENABLED)
static void BistApp_TaskFxn(void* a0, void* a1);
#endif
+#if defined(VTM_TASK_ENABLED)
+static void VtmApp_TaskFxn(void* a0, void* a1);
+#endif
static uint32_t Boot_App();
static void BootApp_AppSetup();
static int32_t BootApp_RequestStageCores(uint8_t stageNum);
@@ -144,6 +154,14 @@ static uint64_t gtimeBistAppStart, gtimeBistAppFinish;
static SemaphoreP_Handle gBistTaskCompletedSem = NULL;
#endif
+#if defined(VTM_TASK_ENABLED)
+static uint8_t gVtm_TaskStack[VTM_TASK_STACKSIZE] __attribute__((aligned(32)));
+TaskP_Handle gVtmTask;
+static uint64_t gtimeVtmAppStart, gtimeVtmAppFinish;
+/* Semaphore to indicate VTM Task completion */
+static SemaphoreP_Handle gVtmTaskCompletedSem = NULL;
+#endif
+
int32_t main(void)
{
Board_initCfg boardCfg;
@@ -201,6 +219,31 @@ int32_t main(void)
OS_stop();
}
#endif
+
+#if defined(VTM_TASK_ENABLED)
+ /* initializing the semaphores*/
+ SemaphoreP_Params VtmsemParams;
+ SemaphoreP_Params_init(&VtmsemParams);
+ gVtmTaskCompletedSem = SemaphoreP_create(0, &VtmsemParams);
+ if(NULL == gVtmTaskCompletedSem)
+ {
+ UART_printf("\n Semaphore create failed\r\n");
+ }
+
+ /* Initialize the task params */
+ TaskP_Params VtmTaskParams;
+ TaskP_Params_init(&VtmTaskParams);
+ VtmTaskParams.priority = VTM_TASK_PRIORITY;
+ VtmTaskParams.stack = gVtm_TaskStack;
+ VtmTaskParams.stacksize = sizeof (gVtm_TaskStack);
+
+ gVtmTask = TaskP_create(&VtmApp_TaskFxn, &VtmTaskParams);
+ if (NULL == gVtmTask)
+ {
+ UART_printf("\nVTM Task creation failed\r\n");
+ OS_stop();
+ }
+#endif
OS_start(); /* does not return */
return(0);
@@ -211,6 +254,10 @@ static void BootApp_TaskFxn(void* a0, void* a1)
#if defined(BIST_TASK_ENABLED)
/* Wait for the BIST task completion */
SemaphoreP_pend(gBistTaskCompletedSem, SemaphoreP_WAIT_FOREVER);
+#endif
+#if defined(VTM_TASK_ENABLED)
+ /* Wait for the VTM task completion */
+ SemaphoreP_pend(gVtmTaskCompletedSem, SemaphoreP_WAIT_FOREVER);
#endif
gtimeBootAppStart = BootApp_GetTimeInMicroSec(CSL_armR5PmuReadCntr(CSL_ARM_R5_PMU_CYCLE_COUNTER_NUM));
@@ -244,6 +291,27 @@ static void BistApp_TaskFxn(void* a0, void* a1)
}
#endif
+#if defined(VTM_TASK_ENABLED)
+static void VtmApp_TaskFxn(void* a0, void* a1)
+{
+ /* Initialize the SDL osal */
+ SDL_TEST_osalInit();
+
+ gtimeVtmAppStart = BootApp_GetTimeInMicroSec(CSL_armR5PmuReadCntr(CSL_ARM_R5_PMU_CYCLE_COUNTER_NUM));
+
+ vtm_example_app();
+
+ gtimeVtmAppFinish = BootApp_GetTimeInMicroSec(CSL_armR5PmuReadCntr(CSL_ARM_R5_PMU_CYCLE_COUNTER_NUM));
+
+ UART_printf("\nVTM Task started at %d usecs and finished at %d usecs\r\n", (uint32_t)gtimeVtmAppStart, (uint32_t)gtimeVtmAppFinish);
+
+ /* Post semaphore after VTM task completion so other tasks could start execution */
+ SemaphoreP_post(gVtmTaskCompletedSem);
+
+ return;
+}
+#endif
+
uint32_t Boot_App()
{
uint32_t retVal;
diff --git a/packages/ti/boot/sbl/example/boot_app/vtm/vtm.c b/packages/ti/boot/sbl/example/boot_app/vtm/vtm.c
new file mode 100644
index 00000000..90d096e2
--- /dev/null
+++ b/packages/ti/boot/sbl/example/boot_app/vtm/vtm.c
@@ -0,0 +1,442 @@
+/*
+ * VTM Example Application
+ *
+ * Voltage and Thermal Monitor (VTM) Example Application
+ *
+ * Copyright (c) 2024 Texas Instruments Incorporated
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * \file vtm.c
+ *
+ * \brief This file contains functions that provide functions
+ * for the Voltage and Thermal Monitor (VTM) application.
+ */
+/* For Timer functions */
+#include <ti/osal/osal.h>
+
+#include "vtm.h"
+#include "sdl_esm.h"
+#include <stdbool.h>
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/UART_stdio.h>
+
+
+#define USE_CASES_RUN (2)
+#define USE_CASES (2)
+#define START_USE_CASE (0)
+#define MAX_ESM_EVENTS_LOGGED (20)
+#define SDLR_WKUP_ESM0_ESM_LVL_EVENT_WKUP_VTM0_THERM_LVL_GT_TH1_INTR_0 (8U)
+#define SDLR_WKUP_ESM0_ESM_LVL_EVENT_WKUP_VTM0_THERM_LVL_LT_TH0_INTR_0 (9U)
+#define APP_ARG (1)
+
+/* #define DEBUG */
+
+static uint32_t totalEventsLogged = 0;
+static uint32_t totalHiEventsLogged = 0;
+static uint32_t totalLoEventsLogged = 0;
+static int32_t thresholdsReset = 0;
+int32_t apparg = APP_ARG;
+/* ESM event log entry */
+typedef struct
+{
+ SDL_ESM_Inst esmInstance;
+ SDL_ESM_IntType intType;
+ uint32_t grpChannel;
+ uint32_t index;
+ uint32_t intSrc;
+ uint8_t useCaseNum;
+} VTM_Example_log_entry_t;
+static int32_t deactivateTrigger(SDL_ESM_Inst esmInstType,
+ SDL_ESM_IntType esmIntType,
+ uint32_t intEsmSrc);
+
+static VTM_Example_log_entry_t esmEventLog[MAX_ESM_EVENTS_LOGGED];
+
+
+/* State variable for each test case indicating input event trigger
+ * has been completed */
+volatile uint32_t vtmEventInputTrig[USE_CASES] = {USE_CASE_STATUS_NOT_RUN,
+ USE_CASE_STATUS_NOT_RUN};
+
+/* State variable for each test case indicating the ISR for the test case
+ * has been completed */
+volatile uint32_t vtmOutputResult[USE_CASES] = {USE_CASE_STATUS_NOT_RUN,
+ USE_CASE_STATUS_NOT_RUN};
+
+volatile uint8_t currTestCase = START_USE_CASE;
+
+static const char *printTestCaseStepResult(uint32_t result);
+void vtm_example_test_app_runner(void);
+void VTM_test_printSummary(void);
+int32_t VTM_ESM_init (void);
+
+/* Initialization structure for WKUP ESM instance */
+static SDL_ESM_config VTM_esmInitConfig_WKUP =
+{
+ .esmErrorConfig = {0u, 0u}, /* Self test error config */
+ .enableBitmap = {0xffffffffu, 0x00180003u, 0xffffffffu, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ },
+ /**< All events enable: except clkstop events for unused clocks */
+ .priorityBitmap = {0xfffffcffu, 0x00180003u, 0xffffffffu, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ },
+ /**< All events high priority: except clkstop events for unused clocks,
+ * and make VTM WKUP_VTM0_THERM_LVL_GT_TH1_INTR_0 and
+ * WKUP_VTM0_THERM_LVL_LT_TH0_INTR_0 events low priority */
+ .errorpinBitmap = {0xfffffcffu, 0x00180003u, 0xffffffffu, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
+ },
+ /**< All events high priority: except clkstop for unused clocks
+ * and make VTM WKUP_VTM0_THERM_LVL_GT_TH1_INTR_0 and
+ * WKUP_VTM0_THERM_LVL_LT_TH0_INTR_0 events not output to pin */
+};
+static const char *printEsmIntType(SDL_ESM_IntType esmIntType)
+{
+ char *pStr;
+
+ switch(esmIntType)
+ {
+ case SDL_ESM_INT_TYPE_HI:
+ pStr = "High Priority ESM event";
+ break;
+ case SDL_ESM_INT_TYPE_LO:
+ pStr = "Low Priority ESM event";
+ break;
+ case SDL_ESM_INT_TYPE_CFG:
+ pStr = "Config ESM event";
+ break;
+ default:
+ pStr = NULL;
+ break;
+ }
+
+ return pStr;
+}
+
+
+
+
+int32_t SDL_ESM_applicationCallbackFunction(SDL_ESM_Inst esmInstType,
+ SDL_ESM_IntType esmIntType,
+ uint32_t grpChannel,
+ uint32_t index,
+ uint32_t intSrc,
+ void *arg)
+{
+ /* Log the event */
+ esmEventLog[totalEventsLogged].useCaseNum = currTestCase;
+ esmEventLog[totalEventsLogged].esmInstance = esmInstType;
+ esmEventLog[totalEventsLogged].intType = esmIntType;
+ esmEventLog[totalEventsLogged].grpChannel = grpChannel;
+ esmEventLog[totalEventsLogged].index = index;
+ esmEventLog[totalEventsLogged].intSrc = intSrc;
+
+ totalEventsLogged++;
+ if (esmIntType == SDL_ESM_INT_TYPE_HI) {
+ totalHiEventsLogged++;
+ } else if (esmIntType == SDL_ESM_INT_TYPE_LO) {
+ totalLoEventsLogged++;
+ }
+
+ /* Any additional customer-specific actions to address ESM event
+ * can be added here */
+
+ deactivateTrigger(esmInstType, esmIntType, intSrc);
+
+ /* Print information to screen */
+ UART_printf("\n ESM Call back function called : instType 0x%x, intType 0x%x, " \
+ "grpChannel 0x%x, index 0x%x, intSrc 0x%x \n",
+ esmInstType, esmIntType, grpChannel, index, intSrc);
+ UART_printf(" Take action \n");
+
+ UART_printf(" ESM instance #%d, ESM interrupt type = %s\n",
+ esmInstType, printEsmIntType(esmIntType));
+
+ vtmOutputResult[currTestCase]= USE_CASE_STATUS_COMPLETED_SUCCESS;
+
+ return SDL_PASS;
+}
+
+/*********************************************************************
+* @fn VTM_ESM_init
+*
+* @brief Initializes Board, Timers, and ESM module
+*
+* @param None
+*
+* @return 0 : Success; < 0 for failures
+*/
+int32_t VTM_ESM_init (void)
+{
+ int32_t retValue=0;
+ int32_t result;
+ /* Initialize WKUP ESM module */
+ result = SDL_ESM_init(SDL_ESM_INST_WKUP_ESM0, &VTM_esmInitConfig_WKUP, SDL_ESM_applicationCallbackFunction, &apparg);
+ if (result != SDL_PASS) {
+ /* print error and quit */
+ UART_printf("VTM_ESM_init: Error initializing WKUP ESM: result = %d\n", result);
+
+ retValue = -1;
+ } else {
+ UART_printf("\nVTM_ESM_init: Init WKUP ESM complete \n");
+ }
+ return retValue;
+}
+
+static int32_t deactivateTrigger(SDL_ESM_Inst esmInstType,
+ SDL_ESM_IntType esmIntType,
+ uint32_t intEsmSrc)
+{
+ int32_t retVal = 0;
+
+ if ((esmInstType == SDL_ESM_INST_WKUP_ESM0) && (esmIntType == SDL_ESM_INT_TYPE_LO)) {
+ /* UC-1: Low Priority interrupt on WKUP ESM -
+ * VTM greater than THR1 */
+ if (intEsmSrc ==
+ SDLR_WKUP_ESM0_ESM_LVL_EVENT_WKUP_VTM0_THERM_LVL_GT_TH1_INTR_0)
+ {
+ if (currTestCase == 0)
+ {
+ if (thresholdsReset == 0)
+ {
+ /* Simulate thresholds as if temperature is going to be reduced
+ * below lt_Thr0 */
+ vtm_setNormalThresholds();
+
+ thresholdsReset = 1;
+ }
+ SDL_VTM_IntrruptGtThr1();
+ } else if (currTestCase == 1)
+ {
+ if (thresholdsReset == 0)
+ {
+ /* Simulate thresholds as if temperature continues to increase
+ * toward gt_Thr2 */
+ vtm_setThresholdsForCriticalTrigger();
+
+ thresholdsReset = 1;
+ }
+ SDL_VTM_IntrruptGtThr1();
+ }
+ } else if (intEsmSrc ==
+ SDLR_WKUP_ESM0_ESM_LVL_EVENT_WKUP_VTM0_THERM_LVL_LT_TH0_INTR_0)
+ {
+ SDL_VTM_IntrruptLtThr0();
+
+ thresholdsReset = 0;
+ if (currTestCase == 0) {
+ /* At end of this test case, clear the Pin that was left on
+ * throughout the test case*/
+ Osal_delay(4);
+ }
+ }
+ } else if ((esmInstType == SDL_ESM_INST_WKUP_ESM0) &&
+ (esmIntType == SDL_ESM_INT_TYPE_HI)) {
+
+ if (currTestCase == 1) {
+ /* UC-2 High Priority interrupt on WKUP ESM -
+ * VTM greater than THR2 with clearing
+ * of MCU_SAFETY_ERRORn pin */
+ if (thresholdsReset == 1)
+ {
+ /* Simulate thresholds as if temperature is going to be reduced
+ * below lt_Thr0 */
+ vtm_setNormalThresholds();
+
+ thresholdsReset = 2;
+ }
+ if (currTestCase == 1) {
+ SDL_ESM_resetErrPin(SDL_WKUP_ESM0_CFG_BASE);
+ }
+ SDL_VTM_IntrruptGtThr2();
+ } else {
+ retVal = -1;
+ }
+ } else {
+ UART_printf("ERR: Unexpected ESM Instance %d and ESM Interrupt Type %d \n",
+ esmInstType, esmIntType);
+ retVal = -1;
+ }
+
+ return (retVal);
+}
+
+/*********************************************************************
+* @fn VTM_app_printSummary
+*
+* @brief Print summary of all the test cases run
+*
+* @param None
+*
+* @return None
+*/
+void VTM_test_printSummary(void)
+{
+ int32_t i;
+
+ UART_printf("\n\n");
+ UART_printf("ESM Example Application summary\n");
+ UART_printf("-------------------------------\n");
+ UART_printf("Completed %d Test Cases\n", currTestCase);
+ UART_printf("Received %d High Priority Interrupts\n", totalHiEventsLogged);
+ UART_printf("Received %d Low Priority Interrupts\n", totalLoEventsLogged);
+
+ UART_printf("\nTest Case Event Log\n");
+ UART_printf("------------------\n");
+ for (i = 0; i < totalEventsLogged; i++) {
+ UART_printf("\nTest Case %d: ESM Call back function called : grpChannel 0x%x, " \
+ "index 0x%x, intSrc 0x%x \n",
+ esmEventLog[i].useCaseNum,
+ esmEventLog[i].grpChannel,
+ esmEventLog[i].index,
+ esmEventLog[i].intSrc);
+ UART_printf(" ESM instance #%d, ESM interrupt type = %s\n",
+ esmEventLog[i].esmInstance,
+ printEsmIntType(esmEventLog[i].intType));
+
+ }
+}
+
+
+
+/*****************************************************************************
+ * This is the main function for the Voltage and Thermal Monitor (VTM) example
+ * application.
+ * It runs through 2 test cases to demonstrate usage of the VTM modules
+ * for receiving errors and controlling the error pin.
+ */
+void vtm_example_app(void)
+{
+ int32_t testErrCount = 0;
+ int32_t retValue;
+ uint8_t i;
+
+ /* Initialize the ESM instances and handlers */
+ retValue = VTM_ESM_init();
+
+ if (retValue < 0) {
+ /* print and exit */
+ UART_printf("\nERR: VTM_ESM_init failed");
+ testErrCount++;
+ }
+
+ UART_printf("\n VTM_ESM_init complete");
+
+ /* Trigger each Test Case */
+ for (i = START_USE_CASE; i < 2; i++) {
+ retValue = vtm_runTestCaseTrigger(i);
+
+ if (retValue != 0) {
+ UART_printf("\nERR: Use Case Trigger for Use Case %d failed \n",
+ retValue);
+ break;
+ }
+
+ while((vtmEventInputTrig[i] == USE_CASE_STATUS_NOT_RUN) ||
+ (vtmOutputResult[i] == USE_CASE_STATUS_NOT_RUN))
+ {
+#ifdef DEBUG
+ UART_printf("InputTrig = %d, OutputResult = %d, ClearResult = %d\n",
+ vtmEventInputTrig[i],
+ vtmOutputResult[i]);
+#endif
+ }
+ UART_printf("\n Use Case %d completed: Input Event Trigger = %s, \n",
+ i,
+ printTestCaseStepResult(vtmEventInputTrig[i]));
+ currTestCase++;
+ }
+
+ /* Check results of all the tests */
+ for (i = 0; i < 2; i++) {
+ if ((vtmEventInputTrig[i] != USE_CASE_STATUS_COMPLETED_SUCCESS) ||
+ (vtmOutputResult[i] != USE_CASE_STATUS_COMPLETED_SUCCESS)) {
+ testErrCount++;
+ }
+ }
+
+ /* Print results and logs of the Test Cases */
+ VTM_test_printSummary();
+ UART_printf("\n VTM Example Application: Complete");
+
+ if (testErrCount == 0)
+ {
+ UART_printf("\n All Use cases have passed. \n");
+ }
+ else
+ {
+ UART_printf("\n VTM Example app failed. \n");
+ }
+ return;
+}
+
+static const char *printTestCaseStepResult(uint32_t result)
+{
+ char *pStr;
+
+ switch(result)
+ {
+ case USE_CASE_STATUS_NOT_RUN:
+ pStr = "Step Not yet run";
+ break;
+ case USE_CASE_STATUS_COMPLETED_SUCCESS:
+ pStr = "Step completed successfully";
+ break;
+ case USE_CASE_STATUS_COMPLETED_FAILURE:
+ pStr = "Step completed with failure";
+ break;
+ default:
+ pStr = NULL;
+ break;
+ }
+
+ return pStr;
+}
+/* Nothing past this point */
\ No newline at end of file
diff --git a/packages/ti/boot/sbl/example/boot_app/vtm/vtm.h b/packages/ti/boot/sbl/example/boot_app/vtm/vtm.h
new file mode 100644
index 00000000..45bc5ce9
--- /dev/null
+++ b/packages/ti/boot/sbl/example/boot_app/vtm/vtm.h
@@ -0,0 +1,66 @@
+/*
+ * VTM Example Application
+ *
+ * Voltage and Thermal Monitor (VTM) Example Application
+ *
+ * Copyright (c) 2024 Texas Instruments Incorporated
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * \file vtm.h
+ *
+ * \brief This file contains functions that provide functions
+ * for the Voltage and Thermal Monitor (VTM) application.
+ */
+
+
+#ifndef __VTM__
+#define __VTM__
+
+/* ========================================================================== */
+/* Macros & Typedefs */
+/* ========================================================================== */
+/* Function prototypes */
+void vtm_example_app(void);
+
+int32_t vtm_runTestCaseTrigger(uint8_t useCaseId);
+int32_t vtm_setNormalThresholds(void);
+int32_t vtm_setThresholdsForCriticalTrigger(void);
+int32_t vtm_printCurrentThresholds(void);
+
+void SDL_VTM_IntrruptLtThr0(void);
+void SDL_VTM_IntrruptGtThr1(void);
+void SDL_VTM_IntrruptGtThr2(void);
+
+#define USE_CASE_STATUS_NOT_RUN (0u)
+#define USE_CASE_STATUS_COMPLETED_SUCCESS (1u)
+#define USE_CASE_STATUS_COMPLETED_FAILURE (2u)
+
+#endif /* __VTM__ */
\ No newline at end of file
diff --git a/packages/ti/boot/sbl/example/boot_app/vtm/vtm_example.c b/packages/ti/boot/sbl/example/boot_app/vtm/vtm_example.c
new file mode 100644
index 00000000..1f44d5c8
--- /dev/null
+++ b/packages/ti/boot/sbl/example/boot_app/vtm/vtm_example.c
@@ -0,0 +1,438 @@
+/*
+ * VTM Example Application
+ *
+ * Voltage and Thermal Monitor (VTM) Example Application
+ *
+ * Copyright (c) 2024 Texas Instruments Incorporated
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * \file vtm_example.c
+ *
+ * \brief This file contains functions that provide input event triggers
+ * for the Voltage and Thermal Monitor (VTM) application.
+ */
+
+/* ========================================================================== */
+/* Include Files */
+/* ========================================================================== */
+
+#include <ti/drv/sciclient/sciclient.h>
+#include <include/soc.h>
+#include <sdl_esm.h>
+#include "vtm.h"
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include <sdl_ip_vtm.h>
+#include <sdl_vtm.h>
+/* ========================================================================== */
+/* Macros & Typedefs */
+/* ========================================================================== */
+
+#define LT_THR0_DEFAULT (95000)
+#define GT_THR1_DEFAULT (105000)
+#define GT_THR2_DEFAULT (115000)
+
+/* ========================================================================== */
+/* Structure Declarations */
+/* ========================================================================== */
+
+/* None */
+
+/* ========================================================================== */
+/* Function Declarations */
+/* ========================================================================== */
+
+static int32_t vtmTriggerTh(int32_t lt_thr0_offset,
+ int32_t gt_thr1_offset,
+ int32_t gt_thr2_offset);
+static int32_t SDL_VTM_config(void);
+static void setAllVTMTempThr(SDL_VTM_adc_code lt_thr0_adc_code,
+ SDL_VTM_adc_code gt_thr1_adc_code,
+ SDL_VTM_adc_code gt_thr2_adc_code);
+
+/* ========================================================================== */
+/* Global Variables */
+/* ========================================================================== */
+
+/* Completion of Use Case from Input trigger perspective updates these flags */
+extern volatile uint32_t vtmEventInputTrig[2];
+/* Current Use case being run */
+extern volatile uint8_t currTestCase;
+uint32_t pStatus;
+SDL_ESM_Inst currEsmInstance;
+
+
+/* ========================================================================== */
+/* External Variables */
+/* ========================================================================== */
+
+/* None */
+
+/* ========================================================================== */
+/* Function Definitions */
+/* ========================================================================== */
+
+/*
+* This function modifies all the VTM thresholds in a single function to ensure
+* appropriate number of ESM events are triggered by the change in thresholds.
+*/
+static void setAllVTMTempThr(SDL_VTM_adc_code lt_thr0_adc_code,
+ SDL_VTM_adc_code gt_thr1_adc_code,
+ SDL_VTM_adc_code gt_thr2_adc_code)
+{
+
+ SDL_VTM_tsThrVal thr_val;
+ SDL_VTM_intrCtrl ctrl;
+ SDL_VTM_configTs cfgTs;
+ thr_val.thrValidMap = SDL_VTM_GT_TH1_VALID | \
+ SDL_VTM_GT_TH2_VALID | \
+ SDL_VTM_LT_TH0_VALID;
+ thr_val.gtTh2En = TRUE;
+ thr_val.gtTh2 = gt_thr2_adc_code;
+ thr_val.gtTh1En = TRUE;
+ thr_val.gtTh1 = gt_thr1_adc_code;
+ thr_val.ltTh0En = TRUE;
+ thr_val.ltTh0 = lt_thr0_adc_code;
+ cfgTs.thr_val = thr_val;
+ cfgTs.tsCtrl_cfg.valid_map = 0;
+ cfgTs.tsCtrl_cfg.maxt_outrg_alert_en = 0;
+ cfgTs.tsCtrl_cfg.tsReset = 0;
+ cfgTs.tsCtrl_cfg.adc_stat = 0;
+ cfgTs.tsCtrl_cfg.mode = 0;
+ cfgTs.configTsCtrl = SDL_VTM_VD_CONFIG_CTRL_SET_THR;
+
+ ctrl = SDL_VTM_VD_GT_THR2_INTR_EN_SET | \
+ SDL_VTM_VD_GT_THR1_INTR_EN_SET | \
+ SDL_VTM_VD_LT_THR0_INTR_EN_CLR;
+
+ SDL_VTM_configVd cfgVd;
+ cfgVd.configVdCtrl = SDL_VTM_VD_CONFIG_CTRL_EVT_SEL;
+ cfgVd.vd_temp_evts = SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_0;
+ SDL_VTM_tsGlobal_cfg tsGlobalCfg;
+ tsGlobalCfg.validMap = 0;
+ tsGlobalCfg.clkSel = 0;
+ tsGlobalCfg.clkDiv = 0;
+ tsGlobalCfg.any_maxt_outrg_alert_en = 0;
+ tsGlobalCfg.maxt_outrg_alert_thr0 = 0;
+ tsGlobalCfg.maxt_outrg_alert_thr = 0;
+ tsGlobalCfg.samplesPerCnt = 0;
+ cfgVd.tsGlobal_cfg = tsGlobalCfg;
+ /* Set the temperature thresholds */
+ SDL_VTM_initTs(SDL_VTM_INSTANCE_TS_0 , &cfgTs);
+
+ /* enable the threshold interrupts */
+ SDL_VTM_intrCntrl(SDL_VTM_INSTANCE_VD_DOMAIN_1, ctrl);
+
+ /* enable the tracking of temperature events on this VD */
+ SDL_VTM_initVd(SDL_VTM_INSTANCE_VD_DOMAIN_1, &cfgVd);
+}
+
+/*
+* This function reads the current temperature in the VTM module
+* and then modifies the VTM thresholds to cause events to trigger.
+* Note that in a typical system, the thresholds would be kept the static, and
+* changes in temperature would cause the events to occur.
+*/
+static int32_t vtmTriggerTh(int32_t lt_thr0_offset,
+ int32_t gt_thr1_offset,
+ int32_t gt_thr2_offset)
+{
+ int32_t retVal = 0;
+ int32_t temp_milli_degrees_read;
+ SDL_VTM_InstTs insTs = SDL_VTM_INSTANCE_TS_0;
+ SDL_VTM_adc_code adc_code_read;
+ SDL_VTM_adc_code adc_code_lt_thr0 = 0, adc_code_gt_thr1 = 0, adc_code_gt_thr2 = 0;
+ int32_t gt_thr2_val, gt_thr1_val, lt_thr0_val;
+ SDL_VTM_intrCtrl ctrl;
+ SDL_VTM_Stat_val statusVal;
+ SDL_VTM_Stat_read_ctrl readCtrl;
+ SDL_VTM_configTs cfgTs;
+ readCtrl = SDL_VTM_TS_READ_DATA_OUT_VAL;
+
+ /* Set temp sensor for continuous mode */
+ cfgTs.configTsCtrl = SDL_VTM_VD_CONFIG_CTRL_SET_CTL;
+ cfgTs.tsCtrl_cfg.valid_map = SDL_VTM_TS_CTRL_MODE_VALID;
+ cfgTs.tsCtrl_cfg.mode = SDL_VTM_TS_CTRL_CONTINUOUS_MODE;
+ SDL_VTM_initTs(SDL_VTM_INSTANCE_TS_0 , &cfgTs);
+
+ /* Get current temperature value */
+ SDL_VTM_getSensorStatus(insTs, &readCtrl, &statusVal);
+ adc_code_read = statusVal.data_out;
+ (void) SDL_VTM_tsConvADCToTemp (adc_code_read, insTs, \
+ &temp_milli_degrees_read);
+#ifdef DEBUG
+ UART_printf ("sensor id : %d \n" \
+ "adc_code : %d \n" \
+ "temp in milli degree celcius : %d \n", \
+ insTs, adc_code_read, temp_milli_degrees_read);
+#endif
+
+ /* Disable interrupts while changing thresholds */
+ ctrl = (SDL_VTM_VD_GT_THR2_INTR_EN_CLR | \
+ SDL_VTM_VD_GT_THR2_INTR_RAW_CLR | \
+ SDL_VTM_VD_GT_THR1_INTR_EN_CLR | \
+ SDL_VTM_VD_GT_THR1_INTR_RAW_CLR | \
+ SDL_VTM_VD_LT_THR0_INTR_EN_CLR | \
+ SDL_VTM_VD_LT_THR0_INTR_RAW_CLR);
+ SDL_VTM_intrCntrl(SDL_VTM_INSTANCE_VD_DOMAIN_1, ctrl);
+
+ /* Change all 3 thresholds relative to the current temperature */
+ lt_thr0_val = temp_milli_degrees_read + lt_thr0_offset;
+ gt_thr1_val = temp_milli_degrees_read + gt_thr1_offset;
+ gt_thr2_val = temp_milli_degrees_read + gt_thr2_offset;
+
+ SDL_VTM_tsConvTempToAdc(lt_thr0_val, insTs, &adc_code_lt_thr0);
+ SDL_VTM_tsConvTempToAdc(gt_thr1_val, insTs, &adc_code_gt_thr1);
+ SDL_VTM_tsConvTempToAdc(gt_thr2_val, insTs, &adc_code_gt_thr2);
+
+#ifdef DEBUG
+ UART_printf ("vtmTriggerTh: Setting lt_thr0_val temp to " \
+ "%d millidegrees Celsius, and adc_code_lt_thr0 = %d\n",
+ lt_thr0_val,
+ adc_code_lt_thr0);
+ UART_printf ("vtmTriggerTh: Setting gt_thr1_val temp to " \
+ "%d millidegrees Celsius, and adc_code_gt_thr1 = %d\n",
+ gt_thr1_val,
+ adc_code_gt_thr1);
+ UART_printf ("vtmTriggerTh: Setting gt_thr2_val temp to " \
+ "%d millidegrees Celsius, and adc_code_gt_thr2 = %d\n",
+ gt_thr2_val,
+ adc_code_gt_thr2);
+#endif
+
+ setAllVTMTempThr(adc_code_lt_thr0, adc_code_gt_thr1, adc_code_gt_thr2);
+
+#ifdef DEBUG
+ UART_printf("Finished VTM threshold setting\n");
+#endif
+ return (retVal);
+}
+
+static int32_t SDL_VTM_config(void)
+{
+ int32_t retVal = 0;
+#ifdef DEBUG
+ UART_printf("SDL_VTM_config: starting test with threshold change\n");
+#endif
+ retVal = vtmTriggerTh(-4000, -2000, 5000);
+
+ return (retVal);
+}
+
+/*
+* This function clears VTM THR0 interrupt (Less Than Temp event)
+* for VTM input events to the ESM.
+* It resets the VTM module to look for high temperature events again.
+*/
+void SDL_VTM_IntrruptLtThr0(void)
+{
+ SDL_VTM_intrCtrl ctrl;
+
+ /* Ack the interrupt, by clearing the pending bit */
+ ctrl = (SDL_VTM_VD_LT_THR0_INTR_EN_CLR | \
+ SDL_VTM_VD_GT_THR1_INTR_EN_SET | \
+ SDL_VTM_VD_GT_THR2_INTR_EN_SET | \
+ SDL_VTM_VD_LT_THR0_INTR_RAW_CLR | \
+ SDL_VTM_VD_GT_THR1_INTR_RAW_CLR | \
+ SDL_VTM_VD_GT_THR2_INTR_RAW_CLR);
+ SDL_VTM_intrCntrl(SDL_VTM_INSTANCE_VD_DOMAIN_1, ctrl);
+ /* Print output ESM event to the screen */
+ UART_printf ("\n Got ltThr0 interrupt through ESM module\n");
+ UART_printf ("\n System at a temperature below the threshold of lt_thr0 \n"
+ " System running at a safe temperature \n");
+}
+
+/*
+* This function clears VTM THR1 interrupts for VTM input event to the ESM.
+*/
+void SDL_VTM_IntrruptGtThr1(void)
+{
+ SDL_VTM_intrCtrl ctrl;
+ /*
+ - disable the gt1 interrupt
+ - clear the gt1 interrupt
+ - clear the lt0 interrupt
+ - enable the lt0 intterupt
+ */
+ ctrl = (SDL_VTM_VD_GT_THR1_INTR_EN_CLR | \
+ SDL_VTM_VD_GT_THR1_INTR_RAW_CLR | \
+ SDL_VTM_VD_LT_THR0_INTR_EN_SET | \
+ SDL_VTM_VD_LT_THR0_INTR_RAW_CLR);
+
+ /* Ack and Re-enable the LT_THR0 interrupt to let system know if cooling
+ * took place */
+ SDL_VTM_intrCntrl(SDL_VTM_INSTANCE_VD_DOMAIN_1, ctrl);
+
+ /* Print output ESM event to the screen */
+ UART_printf ("\n Got gtThr1 interrupt through ESM module\n");
+ UART_printf ("\n Crossed early warning threshold of gt_thr1 \n"
+ " System should take action to implement system cooling \n");
+}
+
+/*
+* This function clears VTM THR2 interrupts for VTM input event to the ESM.
+*/
+void SDL_VTM_IntrruptGtThr2(void)
+{
+ SDL_VTM_intrCtrl ctrl;
+ /* Ack the interrupt, by clearing the pending bit */
+ ctrl = (SDL_VTM_VD_GT_THR2_INTR_EN_CLR | \
+ SDL_VTM_VD_GT_THR2_INTR_RAW_CLR);
+ SDL_VTM_intrCntrl(SDL_VTM_INSTANCE_VD_DOMAIN_1, ctrl);
+
+ /* Print output ESM event to the screen */
+ UART_printf ("\n Got gtThr2 interrupt through ESM module\n");
+ UART_printf ("\n Crossed critical threshold of gt_thr2 \n"
+ " System should take critical action to implement system cooling \n");
+}
+
+
+int32_t vtm_setThresholdsForCriticalTrigger(void)
+{
+ int32_t retVal = 0;
+#ifdef DEBUG
+ UART_printf("vtm_setThresholdsForCriticalTrigger: setting thresholds " \
+ "to trigger high priority thermal event.\n");
+#endif
+ retVal = vtmTriggerTh(-12000, -8000, -3000);
+
+ return (retVal);
+}
+
+/*
+* This function resets the VTM thresholds back to some typical default
+* values.
+*/
+int32_t vtm_setNormalThresholds(void)
+{
+ int32_t retVal = 0;
+ SDL_VTM_InstTs insTs = SDL_VTM_INSTANCE_TS_0;
+ SDL_VTM_adc_code adc_code_lt_thr0 = 0, adc_code_gt_thr1 = 0, adc_code_gt_thr2 = 0;
+ int32_t gt_thr2_val, gt_thr1_val, lt_thr0_val;
+ SDL_VTM_intrCtrl ctrl;
+
+#ifdef DEBUG
+ UART_printf("Start changing to normal VTM threshold setting\n");
+#endif
+
+ /* Disable interrupts while changing thresholds */
+ ctrl = (SDL_VTM_VD_GT_THR2_INTR_EN_CLR | \
+ SDL_VTM_VD_GT_THR2_INTR_RAW_CLR | \
+ SDL_VTM_VD_GT_THR1_INTR_EN_CLR | \
+ SDL_VTM_VD_GT_THR1_INTR_EN_CLR | \
+ SDL_VTM_VD_LT_THR0_INTR_EN_CLR | \
+ SDL_VTM_VD_LT_THR0_INTR_RAW_CLR);
+
+ SDL_VTM_intrCntrl(SDL_VTM_INSTANCE_VD_DOMAIN_1, ctrl);
+
+ /* Set to default values */
+ lt_thr0_val = LT_THR0_DEFAULT;
+ gt_thr1_val = GT_THR1_DEFAULT;
+ gt_thr2_val = GT_THR2_DEFAULT;
+
+ SDL_VTM_tsConvTempToAdc(lt_thr0_val, insTs, &adc_code_lt_thr0);
+ SDL_VTM_tsConvTempToAdc(gt_thr1_val, insTs, &adc_code_gt_thr1);
+ SDL_VTM_tsConvTempToAdc(gt_thr2_val, insTs, &adc_code_gt_thr2);
+
+#ifdef DEBUG
+ UART_printf ("vtm_setNormalThresholds: Setting lt_thr0_val temp to %d " \
+ "millidegrees Celsius, and adc_code_lt_thr0 = %d\n",
+ lt_thr0_val,
+ adc_code_lt_thr0);
+ UART_printf ("vtm_setNormalThresholds: Setting gt_thr1_val temp to %d " \
+ "millidegrees Celsius, and adc_code_gt_thr1 = %d\n",
+ gt_thr1_val,
+ adc_code_gt_thr1);
+ UART_printf ("vtm_setNormalThresholds: Setting gt_thr2_val temp to %d " \
+ "millidegrees Celsius, and adc_code_gt_thr2 = %d\n",
+ gt_thr2_val,
+ adc_code_gt_thr2);
+#endif
+
+ setAllVTMTempThr(adc_code_lt_thr0, adc_code_gt_thr1, adc_code_gt_thr2);
+
+#ifdef DEBUG
+ UART_printf("Finished normal VTM threshold setting\n");
+#endif
+
+ return (retVal);
+}
+
+/* USE CASE FUNCTIONS */
+
+/*
+* This function initiates the input trigger event for each use case
+*/
+int32_t vtm_runTestCaseTrigger(uint8_t useCaseId)
+{
+ int32_t retVal = 0;
+ UART_printf("\nStarting Use Case %d \n", useCaseId);
+ switch(useCaseId)
+ {
+ case 0:
+ /* UC-1: Low Priority interrupt on WKUP ESM -
+ * VTM less than THR1 */
+ currEsmInstance = SDL_ESM_INST_WKUP_ESM0;
+ retVal = SDL_VTM_config();
+ if (retVal == 0) {
+ UART_printf("case 0 success\n");
+ vtmEventInputTrig[useCaseId] = USE_CASE_STATUS_COMPLETED_SUCCESS;
+ } else{
+ UART_printf("case 0 failure\n");
+ vtmEventInputTrig[useCaseId] = USE_CASE_STATUS_COMPLETED_FAILURE;
+ }
+ break;
+
+ case 1:
+ /* UC-2: High Priority interrupt on WKUP ESM -
+ * VTM greater than THR2 with clearing
+ * of MCU_SAFETY_ERRORn pin */
+
+ /* Start the Pin Control and Measurement Timer */
+ currEsmInstance = SDL_ESM_INST_WKUP_ESM0;
+ retVal = SDL_VTM_config();
+ if (retVal == 0) {
+ vtmEventInputTrig[useCaseId] = USE_CASE_STATUS_COMPLETED_SUCCESS;
+ } else {
+ vtmEventInputTrig[useCaseId] = USE_CASE_STATUS_COMPLETED_FAILURE;
+ }
+ break;
+
+ default:
+ UART_printf("ERR: Invalid Test Case ID %d \n", useCaseId);
+ retVal = -1;
+ break;
+ }
+
+ return (retVal);
+}
+
+/* Nothing past this point */
\ No newline at end of file
--
2.34.1
3. POK Integration with PDK BootApp:
From 5f0cb2f928270b28a76d895738529cbfe2c74ba9 Mon Sep 17 00:00:00 2001
From: Josiitaa RL <j-rl@ti.com>
Date: Tue, 2 Apr 2024 12:20:27 +0530
Subject: [PATCH 2/3] POK Integration with PDK BootApp
---
packages/ti/boot/sbl/build/boot_app.mk | 7 +
.../boot/sbl/example/boot_app/boot_app_main.c | 72 ++-
.../ti/boot/sbl/example/boot_app/pok/pok.c | 161 +++++++
.../ti/boot/sbl/example/boot_app/pok/pok.h | 107 +++++
.../sbl/example/boot_app/pok/pok_example.c | 413 ++++++++++++++++++
5 files changed, 758 insertions(+), 2 deletions(-)
create mode 100644 packages/ti/boot/sbl/example/boot_app/pok/pok.c
create mode 100644 packages/ti/boot/sbl/example/boot_app/pok/pok.h
create mode 100644 packages/ti/boot/sbl/example/boot_app/pok/pok_example.c
diff --git a/packages/ti/boot/sbl/build/boot_app.mk b/packages/ti/boot/sbl/build/boot_app.mk
index ba30b945..69856ae2 100644
--- a/packages/ti/boot/sbl/build/boot_app.mk
+++ b/packages/ti/boot/sbl/build/boot_app.mk
@@ -52,11 +52,14 @@ ifeq ($(BOOTMODE), mmcsd)
ifeq ($(BOARD),$(filter $(BOARD), j784s4_evm))
CFLAGS_LOCAL_COMMON += -DBIST_TASK_ENABLED
CFLAGS_LOCAL_COMMON += -DVTM_TASK_ENABLED
+ CFLAGS_LOCAL_COMMON += -DPOK_TASK_ENABLED
#CFLAGS_LOCAL_COMMON +=
INCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/bist
INCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/bist/soc/$(SOC)
INCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/vtm
+
+ INCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/pok
# SDL Include Files
SDL_INSTALL_PATH=$(PDK_INSTALL_PATH)/../../sdl
INCDIR += $(SDL_INSTALL_PATH)/
@@ -71,6 +74,8 @@ ifeq ($(BOOTMODE), mmcsd)
SRCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/bist/soc/$(SOC)
SRCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/vtm
+
+ SRCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/pok
# SDL Integration
EXT_LIB_LIST_COMMON += $(SDL_INSTALL_PATH)/binary/osal/lib/$(SOC)/r5f/$(BUILD_PROFILE)/sdl_osal.$(LIBEXT)
EXT_LIB_LIST_COMMON += $(SDL_INSTALL_PATH)/binary/src/ip/lib/$(SOC)/r5f/$(BUILD_PROFILE)/sdl_ip.$(LIBEXT)
@@ -84,6 +89,8 @@ ifeq ($(BOOTMODE), mmcsd)
SRCS_COMMON += power_seq.c armv8_power_utils.c
SRCS_COMMON += vtm.c vtm_example.c
+
+ SRCS_COMMON += pok.c pok_example.c
endif
endif
ifeq ($(BOOTMODE), ospi)
diff --git a/packages/ti/boot/sbl/example/boot_app/boot_app_main.c b/packages/ti/boot/sbl/example/boot_app/boot_app_main.c
index 1f654ad8..d8311308 100644
--- a/packages/ti/boot/sbl/example/boot_app/boot_app_main.c
+++ b/packages/ti/boot/sbl/example/boot_app/boot_app_main.c
@@ -88,6 +88,9 @@
#if defined(VTM_TASK_ENABLED)
#include "vtm.h"
#endif
+#if defined(POK_TASK_ENABLED)
+#include "pok.h"
+#endif
/* ========================================================================== */
/* Macros & Typedefs */
/* ========================================================================== */
@@ -98,14 +101,19 @@
#define BOOT_TASK_PRIORITY (2)
#if defined(BIST_TASK_ENABLED)
-#define BIST_TASK_PRIORITY (4)
+#define BIST_TASK_PRIORITY (5)
#define BIST_TASK_STACKSIZE (16U * 1024U)
#endif
#if defined(VTM_TASK_ENABLED)
-#define VTM_TASK_PRIORITY (3)
+#define VTM_TASK_PRIORITY (4)
#define VTM_TASK_STACKSIZE (10U * 1024U)
#endif
+
+#if defined(POK_TASK_ENABLED)
+#define POK_TASK_PRIORITY (3)
+#define POK_TASK_STACKSIZE (10U * 1024U)
+#endif
/* uncomment the following for debug logs */
// #define UART_PRINT_DEBUG
@@ -125,6 +133,9 @@ static void BistApp_TaskFxn(void* a0, void* a1);
#if defined(VTM_TASK_ENABLED)
static void VtmApp_TaskFxn(void* a0, void* a1);
#endif
+#if defined(POK_TASK_ENABLED)
+static void PokApp_TaskFxn(void* a0, void* a1);
+#endif
static uint32_t Boot_App();
static void BootApp_AppSetup();
static int32_t BootApp_RequestStageCores(uint8_t stageNum);
@@ -162,6 +173,14 @@ static uint64_t gtimeVtmAppStart, gtimeVtmAppFinish;
static SemaphoreP_Handle gVtmTaskCompletedSem = NULL;
#endif
+#if defined(POK_TASK_ENABLED)
+static uint8_t gPok_TaskStack[POK_TASK_STACKSIZE] __attribute__((aligned(32)));
+TaskP_Handle gPokTask;
+static uint64_t gtimePokAppStart, gtimePokAppFinish;
+/* Semaphore to indicate POK Task completion */
+static SemaphoreP_Handle gPokTaskCompletedSem = NULL;
+#endif
+
int32_t main(void)
{
Board_initCfg boardCfg;
@@ -244,6 +263,31 @@ int32_t main(void)
OS_stop();
}
#endif
+
+#if defined(POK_TASK_ENABLED)
+ /* initializing the semaphores*/
+ SemaphoreP_Params PoksemParams;
+ SemaphoreP_Params_init(&PoksemParams);
+ gPokTaskCompletedSem = SemaphoreP_create(0, &PoksemParams);
+ if(NULL == gPokTaskCompletedSem)
+ {
+ UART_printf("\n Semaphore create failed\r\n");
+ }
+
+ /* Initialize the task params */
+ TaskP_Params PokTaskParams;
+ TaskP_Params_init(&PokTaskParams);
+ PokTaskParams.priority = POK_TASK_PRIORITY;
+ PokTaskParams.stack = gPok_TaskStack;
+ PokTaskParams.stacksize = sizeof (gPok_TaskStack);
+
+ gPokTask = TaskP_create(&PokApp_TaskFxn, &PokTaskParams);
+ if (NULL == gPokTask)
+ {
+ UART_printf("\nPOK Task creation failed\r\n");
+ OS_stop();
+ }
+#endif
OS_start(); /* does not return */
return(0);
@@ -258,6 +302,10 @@ static void BootApp_TaskFxn(void* a0, void* a1)
#if defined(VTM_TASK_ENABLED)
/* Wait for the VTM task completion */
SemaphoreP_pend(gVtmTaskCompletedSem, SemaphoreP_WAIT_FOREVER);
+#endif
+#if defined(POK_TASK_ENABLED)
+ /* Wait for the POK task completion */
+ SemaphoreP_pend(gPokTaskCompletedSem, SemaphoreP_WAIT_FOREVER);
#endif
gtimeBootAppStart = BootApp_GetTimeInMicroSec(CSL_armR5PmuReadCntr(CSL_ARM_R5_PMU_CYCLE_COUNTER_NUM));
@@ -312,6 +360,26 @@ static void VtmApp_TaskFxn(void* a0, void* a1)
}
#endif
+#if defined(POK_TASK_ENABLED)
+static void PokApp_TaskFxn(void* a0, void* a1)
+{
+ /* Initialize the SDL osal */
+ SDL_TEST_osalInit();
+
+ gtimePokAppStart = BootApp_GetTimeInMicroSec(CSL_armR5PmuReadCntr(CSL_ARM_R5_PMU_CYCLE_COUNTER_NUM));
+
+ test_sdl_pok_baremetal_test_app();
+
+ gtimePokAppFinish = BootApp_GetTimeInMicroSec(CSL_armR5PmuReadCntr(CSL_ARM_R5_PMU_CYCLE_COUNTER_NUM));
+
+ UART_printf("\nPOK Task started at %d usecs and finished at %d usecs\r\n", (uint32_t)gtimePokAppStart, (uint32_t)gtimePokAppFinish);
+
+ /* Post semaphore after POK task completion so other tasks could start execution */
+ SemaphoreP_post(gPokTaskCompletedSem);
+
+ return;
+}
+#endif
uint32_t Boot_App()
{
uint32_t retVal;
diff --git a/packages/ti/boot/sbl/example/boot_app/pok/pok.c b/packages/ti/boot/sbl/example/boot_app/pok/pok.c
new file mode 100644
index 00000000..06b7f6c8
--- /dev/null
+++ b/packages/ti/boot/sbl/example/boot_app/pok/pok.c
@@ -0,0 +1,161 @@
+/* Copyright (c) 2024 Texas Instruments Incorporated
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+ /**
+ * \file pok.c
+ *
+ * \brief This file contains POK example code.
+ *
+ * \details POK example
+ **/
+
+/*===========================================================================*/
+/* Include files */
+/*===========================================================================*/
+
+#include "pok.h"
+#ifdef UNITY_INCLUDE_CONFIG_H
+#include <ti/build/unit-test/Unity/src/unity.h>
+#include <ti/build/unit-test/config/unity_config.h>
+#endif
+
+
+/*===========================================================================*/
+/* Declarations */
+/*===========================================================================*/
+/* None */
+
+/*===========================================================================*/
+/* Macros */
+/*===========================================================================*/
+/* define the unlock values */
+#define KICK0_UNLOCK_VAL 0x68EF3490
+#define KICK1_UNLOCK_VAL 0xD172BC5A
+
+/*===========================================================================*/
+/* Internal function declarations */
+/*===========================================================================*/
+void test_sdl_pok_baremetal_test_app (void);
+/*===========================================================================*/
+/* Global Variables */
+/*===========================================================================*/
+sdlPokTest_t sdlPokTestList[] = {
+ {sdlPOK_func, "POK EXAMPLE UC-1" , SDL_APP_TEST_NOT_RUN },
+ {sdlPOKInPor_func, "POR EXAMPLE UC-2" , SDL_APP_TEST_NOT_RUN },
+ {NULL, "TERMINATING CONDITION", SDL_APP_TEST_NOT_RUN }
+};
+
+SDL_ESM_config POK_Test_esmInitConfig_WKUP =
+{
+ .esmErrorConfig = {0u, 8u}, /* Self test error config */
+ .enableBitmap = {0xffffffffu, 0x00180003u, 0xffffffffu,
+ },
+ /**< All events enable: except clkstop events for unused clocks */
+ .priorityBitmap = {0xffffffffu, 0x00180003u, 0xffffffffu,
+ },
+ /**< All events high priority: except clkstop events for unused clocks */
+ .errorpinBitmap = {0xffffffffu, 0x00180003u, 0xffffffffu,
+ },
+ /**< All events high priority: except clkstop for unused clocks
+ * and selftest error events */
+};
+
+extern int32_t SDL_POK_ESM_applicationCallbackFunction(SDL_ESM_Inst esmInstType,
+ SDL_ESM_IntType esmIntType,
+ uint32_t grpChannel,
+ uint32_t index,
+ uint32_t intSrc,
+ void *arg);
+static uint32_t arg;
+/*===========================================================================*/
+/* Local Function definitions */
+/*===========================================================================*/
+/*===========================================================================*/
+/* Function definitions */
+/*===========================================================================*/
+void test_sdl_pok_baremetal_test_app (void)
+{
+ /* Declarations of variables */
+ int32_t testResult = SDL_APP_TEST_PASS;
+ int32_t i;
+ int32_t sdlRet;
+ void *ptr = (void *)&arg;
+
+ UART_printf("\n POK Test Application\r\n");
+ /* Unlock the MMR in order to access the POK registers */
+ *((uint32_t *)(SDL_WKUP_CTRL_MMR0_CFG0_BASE + SDL_WKUP_CTRL_MMR_CFG0_LOCK6_KICK0)) = KICK0_UNLOCK_VAL;
+ *((uint32_t *)(SDL_WKUP_CTRL_MMR0_CFG0_BASE + SDL_WKUP_CTRL_MMR_CFG0_LOCK6_KICK1)) = KICK1_UNLOCK_VAL;
+
+ /* ESM Setup for POK tests */
+ /* Initialize WKUP ESM module */
+ sdlRet = SDL_ESM_init(SDL_ESM_INST_WKUP_ESM0, &POK_Test_esmInitConfig_WKUP, SDL_POK_ESM_applicationCallbackFunction,ptr);
+ if (sdlRet != SDL_PASS) {
+ /* print error and quit */
+ UART_printf("sdlEsmSetupForPOK init: Error initializing WKUP ESM: sdlRet = SDL_EFAIL \n");
+ sdlRet = -1;
+ } else {
+ UART_printf("\nsdlEsmSetupForPOK init: Init WKUP ESM complete \n");
+ }
+
+ for ( i = 0; sdlPokTestList[i].testFunction != NULL; i++)
+ {
+ testResult = sdlPokTestList[i].testFunction();
+ sdlPokTestList[i].testStatus = testResult;
+ }
+
+ testResult = SDL_APP_TEST_PASS;
+ for ( i = 0; sdlPokTestList[i].testFunction != NULL; i++)
+ {
+ if (sdlPokTestList[i].testStatus != SDL_APP_TEST_PASS)
+ {
+ UART_printf("Test Name: %s FAILED \n", sdlPokTestList[i].name);
+ testResult = SDL_APP_TEST_FAILED;
+ break;
+ }
+ else
+ {
+ UART_printf("Test Name: %s PASSED \n", sdlPokTestList[i].name);
+ }
+ }
+
+ if (testResult == SDL_APP_TEST_PASS)
+ {
+ UART_printStatus("\n All tests have passed. \n");
+ }
+ else
+ {
+ UART_printStatus("\n Few/all tests Failed \n");
+ }
+#if defined (UNITY_INCLUDE_CONFIG_H)
+ TEST_ASSERT_EQUAL_INT32(SDL_APP_TEST_PASS, testResult);
+#endif
+}
\ No newline at end of file
diff --git a/packages/ti/boot/sbl/example/boot_app/pok/pok.h b/packages/ti/boot/sbl/example/boot_app/pok/pok.h
new file mode 100644
index 00000000..d13c3ba7
--- /dev/null
+++ b/packages/ti/boot/sbl/example/boot_app/pok/pok.h
@@ -0,0 +1,107 @@
+/* Copyright (c) 2024 Texas Instruments Incorporated
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+ /**
+ * \file pok.h
+ *
+ * \brief This file contains POK example code defines.
+ *
+ **/
+
+/*===========================================================================*/
+/* Include files */
+/*===========================================================================*/
+/*===========================================================================*/
+#include <stdint.h>
+#include <string.h>
+#include <stdio.h>
+#include <src/sdl/sdl_types.h>
+#include <include/soc.h>
+#include <src/sdl/hw_types.h>
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include <ti/board/board.h>
+#include <sdl_pok.h>
+#include <sdl_ip_pok.h>
+#include <sdl_esm.h>
+
+
+#if !defined(TEST_POK_H)
+#define TEST_POK_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SDL_INVALID_POK_ID 0xff;
+
+/*===========================================================================*/
+/* Declarations */
+/*===========================================================================*/
+
+/* Define the test interface */
+typedef struct sdlPokTest_s
+{
+ int32_t (*testFunction)(void); /* The code that runs the test */
+ char *name; /* The test name */
+ int32_t testStatus; /* Test Status */
+} sdlPokTest_t;
+
+/*===========================================================================*/
+/* Macros */
+/*===========================================================================*/
+#define SDL_APP_TEST_NOT_RUN (-(int32_t) (2))
+#define SDL_APP_TEST_FAILED (-(int32_t) (1))
+#define SDL_APP_TEST_PASS ( (int32_t) (0))
+
+/*===========================================================================*/
+/* Internal function declarations */
+/*===========================================================================*/
+void sdlApp_print(const char * str);
+void test_sdl_pok_baremetal_test_app (void);
+/*===========================================================================*/
+/* External function declarations */
+/*===========================================================================*/
+extern int32_t sdlPOK_func(void);
+extern int32_t sdlPOKInPor_func(void);
+extern int32_t SDL_POK_setConfig(SDL_POK_Inst instance, SDL_POK_config *pPokCfg);
+/*===========================================================================*/
+/* Local Function definitions */
+/*===========================================================================*/
+
+#ifdef __cplusplus
+}
+
+#endif /*extern "C" */
+
+#endif /* POK_H */
+/* Nothing past this point */
\ No newline at end of file
diff --git a/packages/ti/boot/sbl/example/boot_app/pok/pok_example.c b/packages/ti/boot/sbl/example/boot_app/pok/pok_example.c
new file mode 100644
index 00000000..216228ff
--- /dev/null
+++ b/packages/ti/boot/sbl/example/boot_app/pok/pok_example.c
@@ -0,0 +1,413 @@
+/* Copyright (c) 2024 Texas Instruments Incorporated
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+ /**
+ * \file sdl_pok_example.c
+ *
+ * \brief This file contains POK example code.
+ *
+ * \details POK example
+ **/
+
+/*===========================================================================*/
+/* Include files */
+/*===========================================================================*/
+#include "pok.h"
+
+/*===========================================================================*/
+/* Macros */
+/*===========================================================================*/
+/* None */
+
+/* Global variables */
+
+
+/*===========================================================================*/
+/* Internal function declarations */
+/*===========================================================================*/
+int32_t SDL_POK_setConfig(SDL_POK_Inst instance, SDL_POK_config *pPokCfg);
+int32_t sdlPOKInPor_func(void);
+int32_t sdlPOK_func(void);
+int32_t SDL_POK_ESM_applicationCallbackFunction(SDL_ESM_Inst esmInstType,
+ SDL_ESM_IntType esmIntType,
+ uint32_t grpChannel,
+ uint32_t index,
+ uint32_t intSrc,
+ void *arg);
+volatile bool ESM_Error = false;
+uint32_t deactivate_trigger(uint32_t *esm_err_sig );
+static void sdlGetInstance(SDL_POK_Inst *instance, uint32_t *esm_err_sig);
+
+/*===========================================================================*/
+/* Function definitions */
+/*===========================================================================*/
+int32_t SDL_POK_ESM_applicationCallbackFunction(SDL_ESM_Inst esmInst,
+ SDL_ESM_IntType esmIntrType,
+ uint32_t grpChannel,
+ uint32_t index,
+ uint32_t intSrc,
+ void *arg)
+{
+ int32_t retVal = SDL_PASS;
+ UART_printf("\n ESM Call back function called : instType 0x%x, intType 0x%x, " \
+ "grpChannel 0x%x, index 0x%x, intSrc 0x%x \n",
+ esmInst, esmIntrType, grpChannel, index, intSrc);
+ UART_printf(" Take action \n");
+ /* Disable the ESM Interrupt */
+ deactivate_trigger(&intSrc);
+ SDL_ESM_clrNError(esmInst);
+ ESM_Error = true;
+ /* Any additional customer specific actions can be added here */
+
+ return retVal;
+}
+
+uint32_t deactivate_trigger(uint32_t *esm_err_sig )
+{
+ SDL_POK_Inst instance;
+ SDL_POK_config pPokCfg;
+ SDL_pokVal_t pPokVal;
+ SDL_wkupCtrlRegsBase_t *pBaseAddr = (SDL_wkupCtrlRegsBase_t *) SDL_POK_MMR_BASE;
+ int32_t sdlRet = SDL_EFAIL;
+
+ sdlGetInstance(&instance, esm_err_sig);
+
+ pPokCfg.hystCtrl = SDL_PWRSS_HYSTERESIS_NO_ACTION;
+ pPokCfg.voltDetMode = SDL_PWRSS_GET_VOLTAGE_DET_MODE;
+ pPokCfg.trim = SDL_PWRSS_TRIM_NO_ACTION;
+ pPokCfg.detectionCtrl = SDL_POK_DETECTION_NO_ACTION;
+ pPokCfg.pokEnSelSrcCtrl = SDL_POK_ENSEL_NO_ACTION;
+#if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
+ pPokCfg.hystCtrlOV = SDL_PWRSS_HYSTERESIS_NO_ACTION;
+ pPokCfg.trimOV = SDL_PWRSS_TRIM_NO_ACTION;
+ pPokCfg.deglitch = SDL_PWRSS_DEGLITCH_NO_ACTION;
+#endif
+
+ SDL_pokGetControl (pBaseAddr,&pPokCfg,&pPokVal,instance);
+ /* Re-configure to "good" setting */
+ if (pPokVal.voltDetMode == SDL_PWRSS_SET_UNDER_VOLTAGE_DET_ENABLE)
+ {
+ pPokCfg.trim = 0;
+#if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
+ pPokCfg.trimOV = SDL_PWRSS_TRIM_NO_ACTION;
+#endif
+ }
+ else
+ {
+#if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
+ pPokCfg.trimOV = 45;
+ pPokCfg.trim = SDL_PWRSS_TRIM_NO_ACTION;
+#else
+ pPokCfg.trim = 45;
+#endif
+ }
+
+ pPokCfg.hystCtrl = SDL_PWRSS_HYSTERESIS_NO_ACTION;
+ pPokCfg.voltDetMode = pPokVal.voltDetMode;
+ pPokCfg.detectionCtrl = SDL_POK_DETECTION_NO_ACTION;
+ pPokCfg.pokEnSelSrcCtrl = SDL_POK_ENSEL_NO_ACTION;
+#if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
+ pPokCfg.hystCtrlOV = SDL_PWRSS_HYSTERESIS_NO_ACTION;
+ pPokCfg.deglitch = SDL_PWRSS_DEGLITCH_NO_ACTION;
+#endif
+ sdlRet = SDL_POK_init(instance,&pPokCfg);
+
+ return sdlRet;
+}
+
+int32_t SDL_POK_setConfig(SDL_POK_Inst instance, SDL_POK_config *pPokCfg)
+{
+ int32_t sdlRet = SDL_EFAIL;
+ sdlRet = SDL_POK_init(instance, pPokCfg);
+ if (sdlRet != SDL_PASS)
+ {
+ UART_printf("SDL_POK_init failed! \n");
+ }
+ else
+ {
+ volatile int32_t i = 0;
+ UART_printf("Waiting for ESM to report the error \n");
+ /* Wait for the ESM interrupt to report the error */
+ do {
+ i++;
+ if (i > 0x0FFFFFFF)
+ {
+ /* Timeout for the wait */
+ break;
+ }
+ } while (ESM_Error == false);
+
+ if (ESM_Error == true)
+ {
+ UART_printf(" Got the ESM Error Interrupt \n");
+ UART_printf("Action taken \n");
+ ESM_Error = false;
+ if (sdlRet != SDL_PASS)
+ {
+ UART_printf("SDL_POK_init failed! \n");
+ }
+ }
+ else
+ {
+ sdlRet = SDL_EFAIL;
+ }
+ }
+ return(sdlRet);
+}
+
+
+int32_t sdlPOKInPor_func(void)
+{
+ int32_t testStatus, sdlRet = SDL_PASS, overallStatus = SDL_APP_TEST_PASS;
+ SDL_POK_config pPokCfg;
+ SDL_POK_Inst instance;
+
+#if defined (SOC_J721E)
+ UART_printf(" \n\n Below are the POK In POR ID values for the example\n");
+ UART_printf(" SDL_POR_POKHV_UV_ID is: 14 \n");
+ UART_printf(" SDL_POR_POKLV_UV_ID is: 15 \n");
+ UART_printf(" SDL_POR_POKHV_OV_ID is: 16 \n");
+
+ instance = SDL_POR_POKHV_OV_ID;
+#else
+ instance = SDL_POR_POKLVA_OV_ID;
+#endif
+
+ UART_printf ("\n\n POK ID = %d , monitoring set to OV \n", instance);
+ pPokCfg.voltDetMode = SDL_PWRSS_SET_OVER_VOLTAGE_DET_ENABLE;
+ pPokCfg.trim = 0;
+ pPokCfg.hystCtrl = SDL_PWRSS_HYSTERESIS_NO_ACTION;
+ pPokCfg.detectionCtrl = SDL_POK_DETECTION_NO_ACTION;
+ pPokCfg.pokEnSelSrcCtrl = SDL_POK_ENSEL_NO_ACTION;
+#if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
+ pPokCfg.hystCtrlOV = SDL_PWRSS_HYSTERESIS_NO_ACTION;
+ pPokCfg.trimOV = 0;
+ pPokCfg.deglitch = SDL_PWRSS_DEGLITCH_NO_ACTION;
+#endif
+
+ sdlRet = SDL_POK_setConfig(instance, &pPokCfg);
+ if (sdlRet == SDL_PASS)
+ {
+ testStatus = SDL_APP_TEST_PASS;
+ }
+ else
+ {
+ testStatus = SDL_APP_TEST_FAILED;
+ overallStatus = SDL_APP_TEST_FAILED;
+ }
+ UART_printf("Safety software Example UC-2 pok for instance %d %s\n",
+ instance, (testStatus == SDL_APP_TEST_PASS) ? "PASSED" : "FAILED");
+
+ return (overallStatus);
+}
+
+int32_t sdlPOK_func(void)
+{
+ int32_t testStatus, sdlRet = SDL_PASS, overallStatus = SDL_APP_TEST_PASS;
+ SDL_POK_config pPokCfg;
+ SDL_POK_Inst instance;
+
+#if defined (SOC_J721E)
+ UART_printf(" \n \n Below are the POK ID values \n");
+ UART_printf(" SDL_POK_VDDA_PMIC_IN_ID is: 0 \n");
+ UART_printf(" SDL_POK_VDD_CORE_UV_ID is: 1 \n");
+ UART_printf(" SDL_POK_VDDSHV_WKUP_GEN_UV_ID is: 2 \n");
+ UART_printf(" SDL_POK_VDD_CPU_UV_ID is: 3 \n");
+ UART_printf(" SDL_POK_VDDR_MCU_UV_ID is: 4 \n");
+ UART_printf(" SDL_POK_VMON_EXT_UV_ID is: 5 \n");
+ UART_printf(" SDL_POK_VDD_MCU_OV_ID is: 6 \n");
+ UART_printf(" SDL_POK_VDDR_CORE_UV_ID is: 7 \n");
+ UART_printf(" SDL_POK_VDDSHV_WKUP_GEN_OV_ID is: 8 \n");
+ UART_printf(" SDL_POK_VDD_CORE_OV_ID is: 9 \n");
+ UART_printf(" SDL_POK_VDDR_MCU_OV_ID is: 10 \n");
+ UART_printf(" SDL_POK_VDD_CPU_OV_ID is: 11 \n");
+ UART_printf(" SDL_POK_VDDR_CORE_OV_ID is: 12 \n");
+ UART_printf(" SDL_POK_VMON_EXT_OV_ID is: 13 \n\n");
+
+ instance = SDL_POK_VDD_CORE_UV_ID;
+#else
+ instance = SDL_POK_VDD_CORE_ID;
+#endif
+
+ UART_printf ("\n\n POK ID = %d , monitoring set to UV \n", instance);
+ pPokCfg.voltDetMode = SDL_PWRSS_SET_UNDER_VOLTAGE_DET_ENABLE;
+ pPokCfg.trim = 127;
+ pPokCfg.hystCtrl = SDL_PWRSS_HYSTERESIS_NO_ACTION;
+ pPokCfg.detectionCtrl = SDL_POK_DETECTION_NO_ACTION;
+ pPokCfg.pokEnSelSrcCtrl = SDL_POK_ENSEL_NO_ACTION;
+#if defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4)
+ pPokCfg.hystCtrlOV = SDL_PWRSS_HYSTERESIS_NO_ACTION;
+ pPokCfg.trimOV = SDL_PWRSS_TRIM_NO_ACTION;
+ pPokCfg.deglitch = SDL_PWRSS_DEGLITCH_NO_ACTION;
+#endif
+
+ sdlRet = SDL_POK_setConfig(instance, &pPokCfg);
+ if (sdlRet == SDL_PASS)
+ {
+ testStatus = SDL_APP_TEST_PASS;
+ }
+ else
+ {
+ testStatus = SDL_APP_TEST_FAILED;
+ overallStatus = SDL_APP_TEST_FAILED;
+ }
+ UART_printf("Safety software Example UC-1 pok for instance %d %s\n",
+ instance, (testStatus == SDL_APP_TEST_PASS) ? "PASSED" : "FAILED");
+
+ return (overallStatus);
+}
+
+#if defined (SOC_J721E)
+static void sdlGetInstance(SDL_POK_Inst *instance, uint32_t *esm_err_sig)
+{
+ switch (*esm_err_sig)
+ {
+ case ESM_ERR_SIG_POKHV_UV:
+ *instance = SDL_POR_POKHV_UV_ID;
+ break;
+ case ESM_ERR_SIG_POKHV_OV:
+ *instance = SDL_POR_POKHV_OV_ID;
+ break;
+ case ESM_ERR_SIG_POKLV_UV:
+ *instance = SDL_POR_POKLV_UV_ID;
+ break;
+ case ESM_ERR_SIG_VDDA_IN:
+ *instance = SDL_POK_VDDA_PMIC_IN_ID;
+ break;
+ case ESM_ERR_SIG_VDD_CORE_UV:
+ *instance = SDL_POK_VDD_CORE_UV_ID;
+ break;
+ case ESM_ERR_SIG_VDDSHV_WKUP_GEN_UV:
+ *instance = SDL_POK_VDDSHV_WKUP_GEN_UV_ID;
+ break;
+ case ESM_ERR_SIG_VDD_CPU_UV:
+ *instance = SDL_POK_VDD_CPU_UV_ID;
+ break;
+ case ESM_ERR_SIG_VDDR_MCU_UV:
+ *instance = SDL_POK_VDDR_MCU_UV_ID;
+ break;
+ case ESM_ERR_SIG_VMON_EXT_UV:
+ *instance = SDL_POK_VMON_EXT_UV_ID;
+ break;
+ case ESM_ERR_SIG_VDD_MCU_OV:
+ *instance = SDL_POK_VDD_MCU_OV_ID;
+ break;
+ case ESM_ERR_SIG_VDDR_CORE_UV:
+ *instance = SDL_POK_VDDR_CORE_UV_ID;
+ break;
+ case ESM_ERR_SIG_VDDSHV_WKUP_GEN_OV:
+ *instance = SDL_POK_VDDSHV_WKUP_GEN_OV_ID;
+ break;
+ case ESM_ERR_SIG_VDD_CORE_OV:
+ *instance = SDL_POK_VDD_CORE_OV_ID;
+ break;
+ case ESM_ERR_SIG_VDDR_MCU_OV:
+ *instance = SDL_POK_VDDR_MCU_OV_ID;
+ break;
+ case ESM_ERR_SIG_VDD_CPU_OV:
+ *instance = SDL_POK_VDD_CPU_OV_ID;
+ break;
+ case ESM_ERR_SIG_VDDR_CORE_OV:
+ *instance = SDL_POK_VDDR_CORE_OV_ID;
+ break;
+ case ESM_ERR_SIG_VMON_EXT_OV:
+ default:
+ *instance = SDL_POK_VMON_EXT_OV_ID;
+ break;
+ }
+ return;
+}
+#else
+static void sdlGetInstance(SDL_POK_Inst *instance, uint32_t *esm_err_sig)
+{
+ switch (*esm_err_sig)
+ {
+ case WKUP_ESM_ERR_SIG_VDD_CORE_UV:
+ case WKUP_ESM_ERR_SIG_VDD_CORE_OV:
+ *instance = SDL_POK_VDD_CORE_ID;
+ break;
+ case WKUP_ESM_ERR_SIG_VDDR_CORE_UV:
+ case WKUP_ESM_ERR_SIG_VDDR_CORE_OV:
+ *instance = SDL_POK_VDDR_CORE_ID;
+ break;
+ case WKUP_ESM_ERR_SIG_VDD_CPU_UV:
+ case WKUP_ESM_ERR_SIG_VDD_CPU_OV:
+ *instance = SDL_POK_VDD_CPU_ID;
+ break;
+ case WKUP_ESM_ERR_SIG_VMON_EXT_UV:
+ case WKUP_ESM_ERR_SIG_VMON_EXT_OV:
+ *instance = SDL_POK_VMON_EXT_ID;
+ break;
+ case WKUP_ESM_ERR_SIG_VMON_EXT_MAIN_1P8_OV:
+ case WKUP_ESM_ERR_SIG_VMON_EXT_MAIN_1P8_UV:
+ *instance = SDL_POK_VMON_EXT_MAIN_1P8_ID;
+ break;
+ case WKUP_ESM_ERR_SIG_VMON_EXT_MAIN_3P3_OV:
+ case WKUP_ESM_ERR_SIG_VMON_EXT_MAIN_3P3_UV:
+ *instance = SDL_POK_VMON_EXT_MAIN_3P3_ID;
+ break;
+ case WKUP_ESM_ERR_SIG_VDD_MCU_OV:
+ *instance = SDL_POK_VDD_MCU_OV_ID;
+ break;
+ case WKUP_ESM_ERR_SIG_VDD_MCU_UV:
+ *instance = SDL_POR_POKLVB_UV_ID;
+ break;
+ case WKUP_ESM_ERR_SIG_VDDR_MCU_UV:
+ case WKUP_ESM_ERR_SIG_VDDR_MCU_OV:
+ *instance = SDL_POK_VDDR_MCU_ID;
+ break;
+ case WKUP_ESM_ERR_SIG_VDDSHV_WKUP_GEN_UV:
+ case WKUP_ESM_ERR_SIG_VDDSHV_WKUP_GEN_OV:
+ *instance = SDL_POK_VDDSHV_WKUP_GEN_ID;
+ break;
+ case WKUP_ESM_ERR_SIG_CAP_VDDS_MCU_GEN_UV:
+ case WKUP_ESM_ERR_SIG_CAP_VDDS_MCU_GEN_OV:
+ *instance = SDL_POK_CAP_VDDS_MCU_GEN_ID;
+ break;
+ case WKUP_ESM_ERR_SIG_VDDA_PMIC_IN_UV:
+ *instance = SDL_POK_VDDA_PMIC_IN_ID;
+ break;
+ case WKUP_ESM_ERR_SIG_VDDA_MCU_UV:
+ *instance = SDL_POR_POKHV_UV_ID;
+ break;
+ case WKUP_ESM_ERR_SIG_VDDA_MCU_OV:
+ *instance = SDL_POR_POKLVA_OV_ID;
+ break;
+ default:
+ *instance = (SDL_POK_Inst)(-1);
+ break;
+ }
+ return;
+}
+
+#endif
+/* Nothing past this point */
\ No newline at end of file
--
2.34.1
4. TOG Integration with PDK BootApp:
From 35d92b4dc06a6da27db320797c86079d8a9f5954 Mon Sep 17 00:00:00 2001
From: Josiitaa RL <j-rl@ti.com>
Date: Thu, 30 May 2024 12:35:41 +0530
Subject: [PATCH 3/3] TOG Integration with PDK BootApp
---
packages/ti/boot/sbl/build/boot_app.mk | 12 +
.../boot/sbl/example/boot_app/boot_app_main.c | 73 ++-
.../ti/boot/sbl/example/boot_app/tog/tog.c | 452 ++++++++++++++++++
.../ti/boot/sbl/example/boot_app/tog/tog.h | 60 +++
.../example/boot_app/tog/tog_test_utils.asm | 60 +++
.../sbl/example/boot_app/tog/tog_test_utils.h | 58 +++
6 files changed, 713 insertions(+), 2 deletions(-)
create mode 100644 packages/ti/boot/sbl/example/boot_app/tog/tog.c
create mode 100644 packages/ti/boot/sbl/example/boot_app/tog/tog.h
create mode 100644 packages/ti/boot/sbl/example/boot_app/tog/tog_test_utils.asm
create mode 100644 packages/ti/boot/sbl/example/boot_app/tog/tog_test_utils.h
diff --git a/packages/ti/boot/sbl/build/boot_app.mk b/packages/ti/boot/sbl/build/boot_app.mk
index 69856ae2..56aff76f 100644
--- a/packages/ti/boot/sbl/build/boot_app.mk
+++ b/packages/ti/boot/sbl/build/boot_app.mk
@@ -53,6 +53,7 @@ ifeq ($(BOOTMODE), mmcsd)
CFLAGS_LOCAL_COMMON += -DBIST_TASK_ENABLED
CFLAGS_LOCAL_COMMON += -DVTM_TASK_ENABLED
CFLAGS_LOCAL_COMMON += -DPOK_TASK_ENABLED
+ CFLAGS_LOCAL_COMMON += -DTOG_TASK_ENABLED
#CFLAGS_LOCAL_COMMON +=
INCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/bist
INCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/bist/soc/$(SOC)
@@ -60,6 +61,8 @@ ifeq ($(BOOTMODE), mmcsd)
INCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/vtm
INCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/pok
+
+ INCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/tog
# SDL Include Files
SDL_INSTALL_PATH=$(PDK_INSTALL_PATH)/../../sdl
INCDIR += $(SDL_INSTALL_PATH)/
@@ -67,15 +70,20 @@ ifeq ($(BOOTMODE), mmcsd)
INCDIR += $(SDL_INSTALL_PATH)/src/ip
INCDIR += $(SDL_INSTALL_PATH)/include
INCDIR += $(SDL_INSTALL_PATH)/include/soc/$(SOC)
+ INCDIR += $(SDL_INSTALL_PATH)/test/osal
+ INCDIR += $(SDL_INSTALL_PATH)/src/ip/r5
# SDL Source File Paths
SRCDIR += $(SDL_INSTALL_PATH)/test/osal/src
SRCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/bist
SRCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/bist/soc/$(SOC)
+ SRCDIR += $(SDL_INSTALL_PATH)/test/unity/src
SRCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/vtm
SRCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/pok
+
+ SRCDIR += $(PDK_SBL_COMP_PATH)/example/boot_app/tog
# SDL Integration
EXT_LIB_LIST_COMMON += $(SDL_INSTALL_PATH)/binary/osal/lib/$(SOC)/r5f/$(BUILD_PROFILE)/sdl_osal.$(LIBEXT)
EXT_LIB_LIST_COMMON += $(SDL_INSTALL_PATH)/binary/src/ip/lib/$(SOC)/r5f/$(BUILD_PROFILE)/sdl_ip.$(LIBEXT)
@@ -91,6 +99,10 @@ ifeq ($(BOOTMODE), mmcsd)
SRCS_COMMON += vtm.c vtm_example.c
SRCS_COMMON += pok.c pok_example.c
+
+ SRCS_COMMON += tog.c
+ SRCS_COMMON += unity.c
+ SRCS_ASM_COMMON += tog_test_utils.asm
endif
endif
ifeq ($(BOOTMODE), ospi)
diff --git a/packages/ti/boot/sbl/example/boot_app/boot_app_main.c b/packages/ti/boot/sbl/example/boot_app/boot_app_main.c
index d8311308..748c8c58 100644
--- a/packages/ti/boot/sbl/example/boot_app/boot_app_main.c
+++ b/packages/ti/boot/sbl/example/boot_app/boot_app_main.c
@@ -91,6 +91,9 @@
#if defined(POK_TASK_ENABLED)
#include "pok.h"
#endif
+#if defined(TOG_TASK_ENABLED)
+#include "tog.h"
+#endif
/* ========================================================================== */
/* Macros & Typedefs */
/* ========================================================================== */
@@ -101,12 +104,12 @@
#define BOOT_TASK_PRIORITY (2)
#if defined(BIST_TASK_ENABLED)
-#define BIST_TASK_PRIORITY (5)
+#define BIST_TASK_PRIORITY (6)
#define BIST_TASK_STACKSIZE (16U * 1024U)
#endif
#if defined(VTM_TASK_ENABLED)
-#define VTM_TASK_PRIORITY (4)
+#define VTM_TASK_PRIORITY (5)
#define VTM_TASK_STACKSIZE (10U * 1024U)
#endif
@@ -114,6 +117,11 @@
#define POK_TASK_PRIORITY (3)
#define POK_TASK_STACKSIZE (10U * 1024U)
#endif
+
+#if defined(TOG_TASK_ENABLED)
+#define TOG_TASK_PRIORITY (4)
+#define TOG_TASK_STACKSIZE (10U * 1024U)
+#endif
/* uncomment the following for debug logs */
// #define UART_PRINT_DEBUG
@@ -136,6 +144,9 @@ static void VtmApp_TaskFxn(void* a0, void* a1);
#if defined(POK_TASK_ENABLED)
static void PokApp_TaskFxn(void* a0, void* a1);
#endif
+#if defined(TOG_TASK_ENABLED)
+static void TogApp_TaskFxn(void* a0, void* a1);
+#endif
static uint32_t Boot_App();
static void BootApp_AppSetup();
static int32_t BootApp_RequestStageCores(uint8_t stageNum);
@@ -181,6 +192,13 @@ static uint64_t gtimePokAppStart, gtimePokAppFinish;
static SemaphoreP_Handle gPokTaskCompletedSem = NULL;
#endif
+#if defined(TOG_TASK_ENABLED)
+static uint8_t gTog_TaskStack[TOG_TASK_STACKSIZE] __attribute__((aligned(32)));
+TaskP_Handle gTogTask;
+static uint64_t gtimeTogAppStart, gtimeTogAppFinish;
+/* Semaphore to indicate TOG Task completion */
+static SemaphoreP_Handle gTogTaskCompletedSem = NULL;
+#endif
int32_t main(void)
{
Board_initCfg boardCfg;
@@ -288,6 +306,31 @@ int32_t main(void)
OS_stop();
}
#endif
+
+#if defined(TOG_TASK_ENABLED)
+ /* initializing the semaphores*/
+ SemaphoreP_Params TogsemParams;
+ SemaphoreP_Params_init(&TogsemParams);
+ gTogTaskCompletedSem = SemaphoreP_create(0, &TogsemParams);
+ if(NULL == gTogTaskCompletedSem)
+ {
+ UART_printf("\n Semaphore create failed\r\n");
+ }
+
+ /* Initialize the task params */
+ TaskP_Params TogTaskParams;
+ TaskP_Params_init(&TogTaskParams);
+ TogTaskParams.priority = TOG_TASK_PRIORITY;
+ TogTaskParams.stack = gTog_TaskStack;
+ TogTaskParams.stacksize = sizeof (gTog_TaskStack);
+
+ gTogTask = TaskP_create(&TogApp_TaskFxn, &TogTaskParams);
+ if (NULL == gTogTask)
+ {
+ UART_printf("\nTOG Task creation failed\r\n");
+ OS_stop();
+ }
+#endif
OS_start(); /* does not return */
return(0);
@@ -306,6 +349,10 @@ static void BootApp_TaskFxn(void* a0, void* a1)
#if defined(POK_TASK_ENABLED)
/* Wait for the POK task completion */
SemaphoreP_pend(gPokTaskCompletedSem, SemaphoreP_WAIT_FOREVER);
+#endif
+#if defined(TOG_TASK_ENABLED)
+ /* Wait for the TOG task completion */
+ SemaphoreP_pend(gTogTaskCompletedSem, SemaphoreP_WAIT_FOREVER);
#endif
gtimeBootAppStart = BootApp_GetTimeInMicroSec(CSL_armR5PmuReadCntr(CSL_ARM_R5_PMU_CYCLE_COUNTER_NUM));
@@ -380,6 +427,28 @@ static void PokApp_TaskFxn(void* a0, void* a1)
return;
}
#endif
+
+#if defined(TOG_TASK_ENABLED)
+static void TogApp_TaskFxn(void* a0, void* a1)
+{
+ /* Initialize the SDL osal */
+ SDL_TEST_osalInit();
+
+ gtimeTogAppStart = BootApp_GetTimeInMicroSec(CSL_armR5PmuReadCntr(CSL_ARM_R5_PMU_CYCLE_COUNTER_NUM));
+
+ tog_example_app();
+
+ gtimeTogAppFinish = BootApp_GetTimeInMicroSec(CSL_armR5PmuReadCntr(CSL_ARM_R5_PMU_CYCLE_COUNTER_NUM));
+
+ UART_printf("\nTOG Task started at %d usecs and finished at %d usecs\r\n", (uint32_t)gtimeTogAppStart, (uint32_t)gtimeTogAppFinish);
+
+ /* Post semaphore after TOG task completion so other tasks could start execution */
+ SemaphoreP_post(gTogTaskCompletedSem);
+
+ return;
+}
+#endif
+
uint32_t Boot_App()
{
uint32_t retVal;
diff --git a/packages/ti/boot/sbl/example/boot_app/tog/tog.c b/packages/ti/boot/sbl/example/boot_app/tog/tog.c
new file mode 100644
index 00000000..a189861d
--- /dev/null
+++ b/packages/ti/boot/sbl/example/boot_app/tog/tog.c
@@ -0,0 +1,452 @@
+/*
+ * TOG Usecases
+ *
+ * Timeout Gasket (TOG) Example Application
+ *
+ * Copyright (c) 2024 Texas Instruments Incorporated
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * \file tog_usecase.c
+ *
+ * \brief This file triggers input for the Timeout Gasket (TOG) example
+ */
+
+#include "tog.h"
+#include <ti/drv/uart/UART_stdio.h>
+#include <ti/drv/sciclient/sciclient.h>
+#include <test/r5f_startup/interrupt.h>
+#include <test/unity/src/unity.h>
+/* ========================================================================== */
+/* Function Declarations */
+/* ========================================================================== */
+void TOG_datAbortExceptionHandler(void *param);
+extern int32_t tog_minTimeout(uint32_t instanceIndex);
+/* ========================================================================== */
+/* Global Variables */
+/* ========================================================================== */
+const SDL_R5ExptnHandlers TOG_R5ExptnHandlers =
+{
+ .udefExptnHandler = NULL,
+ .swiExptnHandler = NULL,
+ .pabtExptnHandler = NULL,
+ .dabtExptnHandler = &TOG_datAbortExceptionHandler,
+ .irqExptnHandler = NULL,
+ .fiqExptnHandler = NULL,
+ .udefExptnHandlerArgs = ((void *)0u),
+ .swiExptnHandlerArgs = ((void *)0u),
+ .pabtExptnHandlerArgs = ((void *)0u),
+ .dabtExptnHandlerArgs = ((void *)0u),
+ .irqExptnHandlerArgs = ((void *)0u),
+};
+/* ========================================================================== */
+/* Macros */
+/* ========================================================================== */
+#if defined (SOC_J721E)
+ #include <include/soc/j721e/sdlr_soc_baseaddress.h>
+#endif
+#if defined (SOC_J7200)
+ #include <include/soc/j7200/sdlr_soc_baseaddress.h>
+#endif
+#if defined (SOC_J721S2)
+ #include <include/soc/j721s2/sdlr_soc_baseaddress.h>
+#endif
+#if defined (SOC_J784S4)
+ #include <include/soc/j784s4/sdlr_soc_baseaddress.h>
+#endif
+#define ESM_CFG_BASE (SDL_ESM0_CFG_BASE)
+#define TOG_INSTANCE_MCU_INFRA0_CFG 0
+
+__attribute((section(".text:TOG_test"))) int32_t tog_minTimeout(uint32_t instanceIndex);
+__attribute((section(".text:TOG_test"))) void TOG_injectMCUINFRATimeoutError(uint32_t instanceIndex);
+__attribute((section(".text:TOG_test"))) void TOG_injectESMError(uint32_t instanceIndex);
+
+__attribute((section(".text:ESMApp_Handlers"))) int32_t SDL_TOG_ESM_applicationCallbackFunction(SDL_ESM_Inst esmInst,
+ SDL_ESM_IntType esmIntrType, uint32_t grpChannel,
+ uint32_t index, uint32_t intSrc, void *arg);
+
+__attribute((section(".text:TOG_test"))) void TOG_eventHandler(uint32_t instanceIndex);
+
+
+#define TOG_TEST_TIMEOUTVAL 0x10000U
+static uint32_t arg;
+
+volatile bool handlerFlag __attribute__((section(".data:TOG_test"))) = false;
+
+SDL_ESM_config TOG_Test_esmInitConfig_MCU =
+{
+ .esmErrorConfig = {0u, 3u}, /* Self test error config */
+ .enableBitmap = {0xffffffffu, 0xff0fffffu, 0x7fffffffu, 0x00000007u,
+ },
+ /**< All events enable: except timer and self test events, and Main ESM output */
+ /* Temporarily disabling vim compare error as well*/
+ .priorityBitmap = {0xffffffffu, 0xff0fffffu, 0x7fffffffu, 0x00000007u,
+ },
+ /**< All events high priority: except timer, selftest error events, and Main ESM output */
+ .errorpinBitmap = {0xffffffffu, 0xff0fffffu, 0x7fffffffu, 0x00000007u,
+ },
+ /**< All events high priority: except timer, selftest error events, and Main ESM output */
+};
+
+int32_t SDL_TOG_ESM_applicationCallbackFunction(SDL_ESM_Inst esmInst,
+ SDL_ESM_IntType esmIntrType,
+ uint32_t grpChannel,
+ uint32_t index,
+ uint32_t intSrc,
+ void *arg)
+{
+ int32_t retVal = SDL_PASS;
+
+#if defined (SOC_J721E) || defined (SOC_J7200)
+ TOG_eventHandler(0);
+#elif defined (SOC_J721S2)
+ TOG_eventHandler(16);
+#elif defined (SOC_J784S4)
+ TOG_eventHandler(16);
+#endif
+ UART_printf("\n ESM Call back function called : instType 0x%x, intType 0x%x, " \
+ "grpChannel 0x%x, index 0x%x, intSrc 0x%x \n",
+ esmInst, esmIntrType, grpChannel, index, intSrc);
+ UART_printf(" Take action \n");
+
+ /* Any additional customer specific actions can be added here */
+
+ return retVal;
+}
+
+void TOG_eventHandler( uint32_t instanceIndex )
+{
+ int32_t status = SDL_PASS;
+ uint32_t pendInts;
+ uint32_t intCount;
+ SDL_TOG_errInfo errInfo;
+ SDL_TOG_config cfg;
+ SDL_TOG_Inst instance;
+ SDL_TOG_IntrSrc intSrc;
+ intSrc = (SDL_TOG_INTRSRC_UNEXPECTED_RESPONSE |
+ SDL_TOG_INTRSRC_TRANSACTION_TIMEOUT);
+
+ instance = instanceIndex;
+ cfg.cfgCtrl = SDL_TOG_CFG_TIMEOUT;
+
+ UART_printf(" \n TOG_eventHandler \n");
+ if (intSrc != 0U)
+ {
+ /* Read error info */
+ status = SDL_TOG_getErrInfo(instance, &errInfo);
+ TEST_ASSERT_EQUAL_INT32(SDL_PASS, status);
+ }
+
+ if (intSrc & SDL_TOG_INTRSRC_TRANSACTION_TIMEOUT)
+ {
+ /* Get Transaction timeout interrupt count */
+ if (status == SDL_PASS)
+ {
+ status = SDL_TOG_getIntrCount(instance, SDL_TOG_INTRSRC_TRANSACTION_TIMEOUT, &intCount);
+ TEST_ASSERT_EQUAL_INT32(SDL_PASS, status);
+ }
+
+ /* Clear Transaction timeout interrupt events */
+ if ((status == SDL_PASS) && (intCount != 0))
+ {
+ status = SDL_TOG_ackIntr(instance, SDL_TOG_INTRSRC_TRANSACTION_TIMEOUT, intCount);
+ TEST_ASSERT_EQUAL_INT32(SDL_PASS, status);
+ }
+ }
+
+ if (intSrc & SDL_TOG_INTRSRC_UNEXPECTED_RESPONSE)
+ {
+ /* Get Unexpected Response interrupt count */
+ if (status == SDL_PASS)
+ {
+ status = SDL_TOG_getIntrCount(instance, SDL_TOG_INTRSRC_UNEXPECTED_RESPONSE, &intCount);
+
+ TEST_ASSERT_EQUAL_INT32(SDL_PASS, status);
+ }
+
+ /* Clear Unexpected response interrupt events */
+ if ((status == SDL_PASS) && (intCount != 0))
+ {
+ status = SDL_TOG_ackIntr(instance, SDL_TOG_INTRSRC_UNEXPECTED_RESPONSE, intCount);
+ TEST_ASSERT_EQUAL_INT32(SDL_PASS, status);
+ }
+ }
+
+ /* Get Pending interrupt count */
+ if (status == SDL_PASS)
+ {
+ status = SDL_TOG_getIntrPending(instance, &pendInts );
+ TEST_ASSERT_EQUAL_INT32(SDL_PASS, status);
+ }
+
+ /* Clear Pending interrupt */
+ if (status == SDL_PASS)
+ {
+ status = SDL_TOG_clrIntrPending(instance, SDL_TOG_INTRSRC_TRANSACTION_TIMEOUT);
+ TEST_ASSERT_EQUAL_INT32(SDL_PASS, status);
+ }
+
+ if (status == SDL_PASS)
+ {
+ status = SDL_TOG_clrIntrPending(instance, SDL_TOG_INTRSRC_UNEXPECTED_RESPONSE);
+ TEST_ASSERT_EQUAL_INT32(SDL_PASS, status);
+ }
+
+ if (status == SDL_PASS)
+ {
+ handlerFlag = true;
+ /* Call SDL API to configure back Timeout Gasket */
+ cfg.timeoutVal = TOG_TEST_TIMEOUTVAL;
+ status = SDL_TOG_init(instance, &cfg);
+ TEST_ASSERT_EQUAL_INT32(SDL_PASS, status);
+
+ /* Stop the Timeout Gasket */
+ SDL_TOG_stop( instance );
+
+ /* Reset the Timeout gasket */
+ SDL_TOG_reset( instance );
+ }
+ return;
+}
+
+#if defined (SOC_J721E) || defined (SOC_J7200)
+
+void TOG_injectMCUINFRATimeoutError(uint32_t instanceIndex)
+{
+ SDL_TOG_Inst instance;
+ SDL_TOG_config cfg;
+ instance = instanceIndex;
+ cfg.cfgCtrl = SDL_TOG_CFG_TIMEOUT;
+ int32_t status;
+ volatile esmRevisionId_t esmRevisionId;
+
+ /* Injecting error can result in a Data abort, so disable temporarily */
+ disableABORT();
+
+ /* Call SDL API to set smaller timeout to trigger error */
+ cfg.timeoutVal = 1u;
+ status = SDL_TOG_init(instance, &cfg);
+ if (status != SDL_PASS)
+ {
+ UART_printf(" Inject SDL_TOG_init TimeoutVal Failed \n");
+ /* Assert */
+ }
+
+ /* Access Main ESM to trigger transaction through the Gasket */
+ (void)SDL_ESM_getRevisionId(ESM_CFG_BASE, (esmRevisionId_t *)&esmRevisionId);
+
+ /* Call SDL API to set configure back to original timeout value */
+ cfg.timeoutVal = TOG_TEST_TIMEOUTVAL;
+ status = SDL_TOG_init(instance, &cfg);
+ if (status != SDL_PASS)
+ {
+ UART_printf("\n Configure back SDL_TOG_init TimeoutVal Failed \n");
+ /* Assert */
+ }
+
+ /* Enable back Abort */
+ enableABORT();
+}
+#endif
+
+#if defined (SOC_J721S2) || defined (SOC_J784S4)
+
+#define END_POINT_ACCESS 0x00A90000U
+
+void TOG_injectESMError(uint32_t instanceIndex)
+{
+ SDL_TOG_Inst instance;
+ SDL_TOG_config cfg;
+ instance = instanceIndex;
+ cfg.cfgCtrl = SDL_TOG_CFG_TIMEOUT;
+ int32_t status;
+ /* Injecting error can result in a Data abort, so disable temporarily */
+ disableABORT();
+
+ /* Call SDL API to set smaller timeout to trigger error */
+ cfg.timeoutVal = 1u;
+ status = SDL_TOG_init(instance, &cfg);
+ if (status != SDL_PASS)
+ {
+ UART_printf(" Inject SDL_TOG_init TimeoutVal Failed \n");
+ /* Assert */
+ }
+
+ SDL_REG32_RD(END_POINT_ACCESS);
+
+ /* Call SDL API to set configure back to original timeout value */
+ cfg.timeoutVal = TOG_TEST_TIMEOUTVAL;
+ status = SDL_TOG_init(instance, &cfg);
+ if (status != SDL_PASS)
+ {
+ UART_printf(" Configure back SDL_TOG_init TimeoutVal Failed \n");
+ /* Assert */
+ }
+
+ /* Enable back Abort */
+ enableABORT();
+}
+
+#endif
+
+int32_t tog_minTimeout(uint32_t instanceIndex)
+{
+ SDL_TOG_Inst instance;
+ SDL_TOG_config cfg;
+ void *ptr = (void *)&arg;
+ int32_t status = SDL_PASS;
+ int32_t result = 0;
+ volatile uint32_t timeoutCount = 0;
+ instance = instanceIndex;
+ cfg.cfgCtrl = SDL_TOG_CFG_TIMEOUT;
+
+ /* Initialize done flag */
+ handlerFlag = false;
+
+ UART_printf("\n Demo for minimum value timeout \n");
+
+ /* Initialize MCU ESM module */
+ status = SDL_ESM_init(SDL_ESM_INST_MCU_ESM0, &TOG_Test_esmInitConfig_MCU, SDL_TOG_ESM_applicationCallbackFunction, ptr);
+ if (status != SDL_PASS) {
+ /* print error and quit */
+ UART_printf("TOG_App_init: Error initializing MCU ESM: result = %d\n", result);
+
+ result = -1;
+ } else {
+ UART_printf("\nECC_Test_init: Init MCU ESM complete \n");
+ }
+
+ if (result == 0)
+ {
+ /* Enable interrupts */
+ status = SDL_TOG_setIntrEnable(instance, SDL_TOG_INTRSRC_ALL, true);
+ if (status != SDL_PASS)
+ {
+ UART_printf(" SDL_TOG_setIntrEnable Failed \n");
+ result = -1;
+ } else {
+ UART_printf("\nSDL_TOG_setIntrEnable complete \n");
+ }
+
+ }
+
+ /** Step 2: Configure and enable Timeout Gasket */
+ if (result == 0)
+ {
+ /* Call SDL API to configure Timeout Gasket */
+ cfg.timeoutVal = TOG_TEST_TIMEOUTVAL;
+ status = SDL_TOG_init(instance, &cfg);
+ if (status != SDL_PASS)
+ {
+ UART_printf(" SDL_TOG_init timeout Failed \n");
+ result = -1;
+ } else {
+ UART_printf("\nSDL_TOG_init.timeout complete \n");
+ }
+ }
+
+ if (result == 0)
+ {
+ /* Call SDL API to enable Timeout Gasket */
+ status = SDL_TOG_start(instance);
+ if (status != SDL_PASS)
+ {
+ UART_printf(" SDL_TOG_start Failed \n");
+ result = -1;
+ } else {
+ UART_printf("\nSDL_TOG_start complete \n");
+ }
+ }
+
+ /* Step 3: Inject timeout error */
+ if (result == 0)
+ {
+#if defined (SOC_J721E) || defined (SOC_J7200)
+ TOG_injectMCUINFRATimeoutError(instance);
+#elif defined (SOC_J721S2) || defined (SOC_J784S4)
+ TOG_injectESMError(instance);
+#endif
+ }
+
+ /**--- Step 3: Wait for TOG Interrupt ---*/
+ if (result == 0)
+ {
+ /* Timeout if exceeds time */
+ while ((!handlerFlag)
+ && (timeoutCount < TOG_MAX_TEST_TIMEOUT_VALUE))
+ {
+ timeoutCount++;
+ }
+
+ if (!(handlerFlag))
+ {
+ SDL_TOG_stop( instance );
+ UART_printf(" TOG test timed out \n");
+ result = -1;
+ } else {
+ UART_printf("\nSDL_TOG_stop complete \n");
+ }
+ /* reset Done flag so we can run again */
+ handlerFlag = false;
+ }
+
+ return (result);
+}
+
+void TOG_datAbortExceptionHandler(void *param)
+{
+ /* This is a fake exception so return */
+}
+
+void tog_example_app(void)
+{
+ int32_t result = 0;
+
+ UART_printf("\nTOG Sample Example \r\n");
+ /* Register exception handler */
+ /* This is needed to handle data abort that can happen in the process of injecting the error */
+ Intc_RegisterExptnHandlers(&TOG_R5ExptnHandlers);
+ if (result == 0)
+ {
+#if defined (SOC_J721E) || defined (SOC_J7200)
+ result = tog_minTimeout(0);
+#elif defined (SOC_J721S2)
+ result = tog_minTimeout(16);
+#elif defined (SOC_J784S4)
+ result = tog_minTimeout(16);
+#endif
+ if (result != 0)
+ {
+ UART_printf(" \n TOG example failed \n");
+ }
+}
+
+ return;
+}
\ No newline at end of file
diff --git a/packages/ti/boot/sbl/example/boot_app/tog/tog.h b/packages/ti/boot/sbl/example/boot_app/tog/tog.h
new file mode 100644
index 00000000..885477ec
--- /dev/null
+++ b/packages/ti/boot/sbl/example/boot_app/tog/tog.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) Texas Instruments Incorporated 2024
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+ /**
+ * \file tog.h
+ *
+ * \brief TOG Example functions
+ *
+ * \details This file contains C prototype
+ *
+ **/
+
+#include <src/sdl/sdl_tog.h>
+#include <src/sdl/sdl_types.h>
+#include <sdl_esm.h>
+#include "tog_test_utils.h"
+#include <soc.h>
+
+#ifdef UNITY_INCLUDE_CONFIG_H
+#include <test/unity/src/unity.h>
+#include <test/unity/config/unity_config.h>
+#endif
+
+#define TOG_MAX_USECASE 2
+#define TOG_MAX_TEST_TIMEOUT_VALUE (10000000u)
+#define MCU_ESM_BASE (SDL_MCU_ESM0_CFG_BASE)
+
+typedef void (*TOG_injectFunction)(uint32_t instanceIndex);
+
+/* Nothing past this point */
\ No newline at end of file
diff --git a/packages/ti/boot/sbl/example/boot_app/tog/tog_test_utils.asm b/packages/ti/boot/sbl/example/boot_app/tog/tog_test_utils.asm
new file mode 100644
index 00000000..fc83245b
--- /dev/null
+++ b/packages/ti/boot/sbl/example/boot_app/tog/tog_test_utils.asm
@@ -0,0 +1,60 @@
+;******************************************************************************
+; @file tog_test_utils.asm
+;
+; @brief
+; Implementation file for the TOG utils assembly functions
+;
+; \par
+; ============================================================================
+; @n (C) Copyright 2024, Texas Instruments, Inc.
+;
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions
+; are met:
+;
+; Redistributions of source code must retain the above copyright
+; notice, this list of conditions and the following disclaimer.
+;
+; Redistributions in binary form must reproduce the above copyright
+; notice, this list of conditions and the following disclaimer in the
+; documentation and/or other materials provided with the
+; distribution.
+;
+; Neither the name of Texas Instruments Incorporated nor the names of
+; its contributors may be used to endorse or promote products derived
+; from this software without specific prior written permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;******************************************************************************
+
+ .text
+ .global enableABORT
+ .global disableABORT
+
+enableABORT:
+ PUSH {r0}
+ MRS r0, CPSR
+ BIC r0, r0, #(1<<5)
+ MSR CPSR_cxsf, r0
+ POP {r0}
+ BX LR
+
+disableABORT:
+ PUSH {r0}
+ MRS r0, CPSR
+ ORR r0, r0, #(1<<5)
+ MSR CPSR_cxsf, r0
+ POP {r0}
+ BX LR
+
+ .end
\ No newline at end of file
diff --git a/packages/ti/boot/sbl/example/boot_app/tog/tog_test_utils.h b/packages/ti/boot/sbl/example/boot_app/tog/tog_test_utils.h
new file mode 100644
index 00000000..988ad065
--- /dev/null
+++ b/packages/ti/boot/sbl/example/boot_app/tog/tog_test_utils.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) Texas Instruments Incorporated 2024
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+ /**
+ * \file tog_test_utils.h
+ *
+ * \brief Utility functions for TOG test
+ *
+ * \details This file contains C prototype of Assembly functions
+ **/
+#ifndef TOG_TEST_UTILS_H
+#define TOG_TEST_UTILS_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+void disableABORT(void);
+void enableABORT(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TOG_TEST_UTILS_H */
+
+/* Nothing past this point */
\ No newline at end of file
--
2.34.1
**NOTE: These patches are validated on J784s4 SDK 9.1 sequentially to enable all four modules. If you wish to enable any specific module, apply the changes manually. If any other SOC or a different version of the SDK is being used, please port the changes similarly. **
To boot to Linux through the PDK BootApp, follow the below mentioned steps after applying the patches shared above.
Generate lateapps by using the following commands
goto <RTOS SDK>/<PDK>/packages/ti/boot/sbl/example/boot_app/scripts
Run ./generate_lateapps.sh j784s4_evm
Multicore images(lateapps) will be generated in <PDK>/packages/ti/boot/sbl/example/boot_app/multicore_images/j784s4_evm/.
multicore_MCU2_0_MCU2_1_stage1.appimage corresponds to lateapp1, multicore_DSPs_MCU3_0_MCU3_1_MCU4_0_MCU4_1_stage2.appimage corresponds to lateapp2 and multicore_MPU1_0_stage3.appimage corresponds to lateapp3.
Copy sbl_mmcsd_img_mcu1_0_release.tiimage present in <PDK>/packages/ti/boot/sbl/binary/j784s4_evm/mmcsd/bin as tiboot3.bin to the boot partition of SD card
Copy tifs.bin present in <PDK>/packages/ti/drv/sciclient/soc/V6 to the boot partition of SD card.
goto <RTOS SDK>/<PDK>/packages/ti/build and build boot_app_mmcsd_linux by using the following command:
make BOARD=j784s4_evm CORE=mcu1_0 boot_app_mmcsd_linux -sj
Copy sbl_boot_app_mmcsd_linux_j784s4_evm_mcu1_0_freertos_TestApp_release.appimage present in <PDK>/packages/ti/boot/sbl/example/boot_app/binary/j784s4_evm/mmcsd as app to the boot partition of SD card.
Copy stage1 image as lateapp1, stage2 image as lateapp2 and stage3 image as lateapp3 to the boot partition of SD card.
Copy atf_optee.appimage, tidtb_linux.appimage, tikernelimage_linux.appimage present in<PDK>/packages/ti/boot/sbl/tools/BootApp_binaries/linux/j784s4_evm to the boot partition of SD card.
"Integration of BIST with the PDK Bootapp is now available as a part of the SDK 10.0 and onwards for J784s4"
Regards,
Josiitaa