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AM6442: QSPI boot mode questions

Manuel Philippin
Intellectual 1210 points
Part Number: AM6442

Tool/software:

Hello Sitara team,

in the TRM the QSPI bootloader frequency is decribed as 50MHz.

But I didn’t find if the PHY or TAP is used, except that TAP mode doesn’t support any loopback function. I guess the bootloader uses PHY mode, because via the BOOTMODE8 pin between internal or external loopback can be chosen.

Can you confirm this? Or is TAP mode used, as described in the following E2E post: 
https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1297910/lp-am243-qspi-flash-doesn-t-meet-timing/4929774?tisearch=e2e-sitesearch&keymatch=%252525252522boot%252525252520parameter%252525252520table%252525252522#4929774

Also in theSitara TRM and datasheet there are several loopback mode described:

  • Internal PHY loopback
  • Internal PAD loopback
  • External loopback

What is the difference between internal PHY loopback and internal PAD loopback?

Because in the Sitara datasheet it is described that SDR transfers in PHY mode are not supported when using the internal Pad Loopback and DQS clocking topologies.
Does it mean that external loopback must be enabled/used if QSPI SDR transfers shall be supported?
So the bootloader require external loopback, because it uses QSPI SDR transfer in PHY mode?

Could it be that the internal values of the timing values are for internal PAD loopback and NOT for internal PHY loopback?
Because in the register CTRLMMR_OSPI0_CLKSEL and the Bootmode8 pin I can only select between internal (I guess pad) and external loopback.
Or could the loopback be disabled and if so, how?
And if there are differences between internal PHY loopback and internal PAD loopback, what are the timing parameters for internal PAD loopback?  

Thanks a lot in advance!

Best regards
Manuel

  • 0
    TI__Guru* 80020 points

    Hi Manuel, please check the errata doc for some exceptions on OSPI boot mode.  The ROM only uses No Loopback (ie internal reference clock) TAP mode.  

    The different clocking topologies are described in section 6.10.5.14.  Think of the internal PAD loopback as the clock going out to the pin and being looped back from there.  The internal PHY loopback uses internal reference clock. 

    What are your requirements?  Do you intend to boot from QSPI?  What max frequency do you want to achieve?  Have you considered an OSPI or xSPI with DQS signal? 

    Regards,

    James