SK-AM62: GPMC NAND boot support Part2

Hello Koji Hirohashi

Thank you for the quey.

Koji Hirohashi said:

board information to connect GPMC NAND to SK-AM62.

Help me understand the information you need.

Regards,

Sreenivasa

Hi Sreenivasa,

I would like to test GPMC NAND working with SK-AM62.

I'm sure that you have tested with AM62, so I also want to test using you have done.

The best thing is, I already have written in previous question, you provide me something like a daughter board that can connect GPMC NAND to SK-AM62.

If you cannot accommodate the request, I would like to get circuit diagram when you tested GPMC NAND with AM62.

Best Regards,

Koji

Hello Koji Hirohashi

Thank you.

Please check below thread.

(+) AM6442: uboot code hanging because of GPMC register access - Processors forum - Processors - TI E2E support forums

Regards,

Sreenivasa

Hi Sreenivasa,

Thank you for your information.

In the thread, the daughter card schematic is shown to setup with AM64 and MT29F8G08ADAFAH4 of GPMC NAND.

Is the understanding correct that AM62 supports the same GPMC NAND with AM64, at least MT29F8G08ADAFAH4?

Best Regards,

Koji

Hello Koji Hirohashi

Thank you.

Please refer the below FAQ

(+) [FAQ] AM625-Q1 or AM620-Q1 Custom board hardware design – Collaterals to Get started - Processors forum - Processors - TI E2E support forums

Look for Nand daughter board info for reference.

This is an internal test board. 

Regards,

Sreenivasa

Hi Sreenivasa,

Thank you.

It seems that the daughter board supports to connect to AM62Q-LP.

But I'm using SK-AM62B-P1 and some required pins are not on PRU Connector.

Could you know the information to test GPMC NAND with SK-AM62B-P1?

Best Regards,

Koji

Hello Koji Hirohashi

Thank you.

i compared the PRU headers and i am not sure if the SK-AM62B-P1 supported GPMC nand interface over the PRU header..

Let me check internally and comeback.

Regards,

Sreenivasa

Hello Koji Hirohashi

Refer below query i asked the EVM expert and answer i received.

Customer is checking if we have a GPMC NAND daughter board that is compatible with SK-AM62B-P1. Any thoughts please.

No.  That board is missing some GPMC signals on headers that would be needed to support a GPMC NAND daughter board.

Regards,

Sreenivasa

Hi Sreenivasa,

Thank you for confirmation.

That is to say, there is not method to test GPMC NAND with SK-AM62B-P1, correct?

What is difference from AM62Q-LP-SKEVM to SK-AM62B-P1?

Best Regards,

Koji

Hello Koji Hirohashi,

Thank you. 

Koji Hirohashi said:

That is to say, there is not method to test GPMC NAND with SK-AM62B-P1, correct?

Correct.

 SK-AM62B-P1

13 mm x 13 mm, 0.5-mm pitch, 425-pin FCCSP
BGA (ALW)

 AM62Q-LP-SKEVM SK-AM62-LP
• 17.2 mm x 17.2 mm, 0.8-mm pitch, 441-pin
FCBGA (AMC)

Regards,

Sreenivasa

Hi Sreenivasa,

Is AM62Q-LP-SKEVM same with SK-AM62-LP?

I couldn't find AM62Q-LP-SKEVM information.

Best Regards,

Koji

Hello Koji Hirohashi,

Please refer to SK-AM62-LP

Koji Hirohashi said:

I couldn't find AM62Q-LP-SKEVM information.

Not sure if they called the board by this name previously.

Regards,

Sreenivasa

Hi Sreenivasa,

Thank you.

Let me ask one more question.

I found the following device tree: arch/arm64/boot/dts/ti/k3-am62-lp-sk-nand.dtso

I couldn't understand how to decide the one of nand0_0 node.

nand0_0: nand@0,0 {
              compatible = "ti,am64-nand";
              reg = <0 0 64>; /* device IO registers */
              interrupt-parent = <&gpmc0>;
              interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
                                 <1 IRQ_TYPE_NONE>; /* termcount */

What is meaning device IO registers?

Where I can confirm the parameter that should be set to reg?

Best Regards,

Koji

Hello Koji,

Thank you.

I need to reassign the query to a software expert.

Please share the development environment you are using for me the reassign.

Regards,

Sreenivasa

Hi Sreenivasa,

I'm using the following SDK:

PROCESSOR-SDK-AM62X 09.02.01.09

Best Regards,

Koji

Hello Koji,

Thank you.

Let me check internally and assign to the expert.

Regards,

Sreenivasa