Tool/software:
Hi,
I change debug serial from uart0 to uart6, I refer to the following links:
But sometimes U-Boot SPL fails to boot(once happen every 20 times). logs as followings:
U-Boot SPL 2021.01-svn3425 (Jun 26 2024 - 13:54:18 +0800)
SYSFW ABI: 3.1 (firmware rev 0x0008 '8.6.4--v08.06.04 (Chill Capybar')
SPL initial stack usage: 13424 bytes
Trying to boot from MMC1
Authentication passed
Authentication passed
Authentication passed
Authentication passed
ti_sci system-controller@44043000: ti_sci_get_response: Message receive failed. ret = -110
ti_sci system-controller@44043000: Message not acknowledgedAuthentication failed!
### ERROR ### Please RESET the board ###
It seem that get clk fail.
I made some modifications as the following patch(UART6 Tx:A19 Rx:V25, so I disable main_uart1 in u-boot, because main_uart1 occupied pin A19 ):
Index: AM62x/Kernel/Linux-5.10.168/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
===================================================================
--- AM62x/Kernel/Linux-5.10.168/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi (revision 3424)
+++ AM62x/Kernel/Linux-5.10.168/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi (revision 3425)
@@ -7,7 +7,7 @@
/ {
aliases {
- serial2 = &main_uart0;
+ serial2 = &main_uart6;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
mmc2 = &sdhci2;
@@ -20,7 +20,7 @@
chosen {
stdout-path = "serial2:115200n8";
- bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
+ bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02860000";
};
memory@80000000 {
@@ -181,10 +181,10 @@
};
&main_pmx0 {
- main_uart0_pins_default: main-uart0-pins-default {
+ main_uart6_pins_default: main-uart6-pins-default {
pinctrl-single,pins = <
- AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
- AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
+ AM62X_IOPAD(0x09c, PIN_INPUT, 3) /* (V25) UART6_RXD */
+ AM62X_IOPAD(0x198, PIN_OUTPUT, 3) /* (A19) UART6_TXD */
>;
};
@@ -312,8 +312,7 @@
};
&main_uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_uart0_pins_default>;
+ status = "disabled";
};
&main_uart1 {
@@ -337,7 +336,8 @@
};
&main_uart6 {
- status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart6_pins_default>;
};
&mcu_i2c0 {
Index: AM62x/Kernel/Linux-5.10.168/arch/arm64/boot/dts/ti/tl62x-evm.dts
===================================================================
--- AM62x/Kernel/Linux-5.10.168/arch/arm64/boot/dts/ti/tl62x-evm.dts (revision 3424)
+++ AM62x/Kernel/Linux-5.10.168/arch/arm64/boot/dts/ti/tl62x-evm.dts (revision 3425)
@@ -25,7 +25,7 @@
serial4 = &main_uart2;
serial5 = &main_uart4;
serial6 = &main_uart5;
- serial7 = &main_uart6;
+ serial7 = &main_uart0;
serial8 = &mcu_uart0;
serial9 = &main_uart3;
};
@@ -288,6 +288,12 @@
AM62X_IOPAD(0x0008, PIN_INPUT, 7) /* (J24) OSPI0_DQS.GPIO0_2 */
>;
};
+ main_uart0_pins_default: main-uart0-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
+ AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
+ >;
+ };
main_uart1_pins_default: main-uart1-pins-default {
pinctrl-single,pins = <
@@ -324,13 +330,6 @@
>;
};
- main_uart6_pins_default: main-uart6-pins-default {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x009C, PIN_INPUT, 3) /* (V25) UART6_RXD GPIO0_38 */
- AM62X_IOPAD(0x0198, PIN_OUTPUT, 3) /* (A19) UART6_TXD GPIO1_8 */
- >;
- };
-
main_ehrpwm1_pins_default: main_ehrpwm1_pins_default {
pinctrl-single,pins = <
AM62X_IOPAD(0x019c, PIN_OUTPUT, 6) /* (B18) MCASP0_AXR1.EHRPWM1_A */
@@ -534,6 +533,11 @@
};
};
+&main_uart0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart0_pins_default>;
+};
&main_uart1 {
status = "okay";
@@ -565,12 +569,6 @@
pinctrl-0 = <&main_uart5_pins_default>;
};
-&main_uart6 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&main_uart6_pins_default>;
-};
-
&lcd0 {
panel-timing {
clock-frequency = <33000000>;
@@ -614,7 +612,7 @@
ti,pindir-d0-out-d1-in;
spidev0: spi@0 {
reg = <0>;
- compatible = "spidev";
+ compatible = "rohm,dh2228fv";
spi-max-frequency = <2000000>;
};
};
Index: AM62x/U-Boot-2021.01/arch/arm/dts/k3-am62x-r5-sk-common.dtsi
===================================================================
--- AM62x/U-Boot-2021.01/arch/arm/dts/k3-am62x-r5-sk-common.dtsi (revision 3424)
+++ AM62x/U-Boot-2021.01/arch/arm/dts/k3-am62x-r5-sk-common.dtsi (revision 3425)
@@ -13,7 +13,7 @@
};
chosen {
- stdout-path = "serial2:115200n8";
+ stdout-path = "serial2:115200n8"; // change uart0 to uart6
tick-timer = &timer1;
};
@@ -156,7 +156,7 @@
&main_uart1 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>;
- status = "okay";
+ status = "disable";
u-boot,dm-spl;
};
Index: AM62x/U-Boot-2021.01/arch/arm/dts/k3-am62x-sk-common-u-boot.dtsi
===================================================================
--- AM62x/U-Boot-2021.01/arch/arm/dts/k3-am62x-sk-common-u-boot.dtsi (revision 3424)
+++ AM62x/U-Boot-2021.01/arch/arm/dts/k3-am62x-sk-common-u-boot.dtsi (revision 3425)
@@ -68,11 +68,11 @@
u-boot,dm-spl;
};
-&main_uart0 {
+&main_uart6 {
u-boot,dm-spl;
};
-&main_uart0_pins_default {
+&main_uart6_pins_default {
u-boot,dm-spl;
};
Index: AM62x/U-Boot-2021.01/arch/arm/dts/k3-am62x-sk-common.dtsi
===================================================================
--- AM62x/U-Boot-2021.01/arch/arm/dts/k3-am62x-sk-common.dtsi (revision 3424)
+++ AM62x/U-Boot-2021.01/arch/arm/dts/k3-am62x-sk-common.dtsi (revision 3425)
@@ -14,7 +14,7 @@
/ {
aliases {
- serial2 = &main_uart0;
+ serial2 = &main_uart6;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
mmc2 = &sdhci2;
@@ -26,7 +26,7 @@
chosen {
stdout-path = "serial2:115200n8";
- bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
+ bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02860000";
};
memory@80000000 {
@@ -163,10 +163,10 @@
>;
};
- main_uart0_pins_default: main-uart0-pins-default {
+ main_uart6_pins_default: main-uart6-pins-default {
pinctrl-single,pins = <
- AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
- AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
+ AM62X_IOPAD(0x09c, PIN_INPUT, 3) /* (V25) UART6_RXD */
+ AM62X_IOPAD(0x198, PIN_OUTPUT, 3) /* (A19) UART6_TXD */
>;
};
@@ -310,13 +310,12 @@
};
&main_uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_uart0_pins_default>;
+ status = "disabled";
};
&main_uart1 {
/* Main UART1 is used by TIFS firmware */
- status = "reserved";
+ status = "disabled";
};
&main_uart2 {
@@ -336,7 +335,8 @@
};
&main_uart6 {
- status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart6_pins_default>;
};
&mcu_i2c0 {
Index: AM62x/U-Boot-2021.01/arch/arm/mach-k3/am62x/clk-data.c
===================================================================
--- AM62x/U-Boot-2021.01/arch/arm/mach-k3/am62x/clk-data.c (revision 3424)
+++ AM62x/U-Boot-2021.01/arch/arm/mach-k3/am62x/clk-data.c (revision 3425)
@@ -20,6 +20,16 @@
NULL,
};
+static const char * const main_emmcsd0_io_clklb_sel_out0_parents[] = {
+ "board_0_mmc0_clklb_out",
+ "board_0_mmc0_clk_out",
+};
+
+static const char * const main_emmcsd1_io_clklb_sel_out0_parents[] = {
+ "board_0_mmc1_clklb_out",
+ "board_0_mmc1_clk_out",
+};
+
static const char * const main_ospi_loopback_clk_sel_out0_parents[] = {
"board_0_ospi0_dqs_out",
"board_0_ospi0_lbclko_out",
@@ -78,11 +88,6 @@
"hsdiv4_16fft_main_2_hsdivout2_clk",
};
-static const char * const main_gpmc_fclk_sel_out0_parents[] = {
- "hsdiv4_16fft_main_0_hsdivout3_clk",
- "postdiv4_16ff_main_2_hsdivout7_clk",
-};
-
static const char * const main_gtcclk_sel_out0_parents[] = {
"postdiv4_16ff_main_2_hsdivout5_clk",
"postdiv4_16ff_main_0_hsdivout6_clk",
@@ -115,8 +120,8 @@
"hsdiv4_16fft_mcu_0_hsdivout0_clk",
};
-static const char * const main_usart0_fclk_sel_out0_parents[] = {
- "usart_programmable_clock_divider_out0",
+static const char * const main_usart6_fclk_sel_out0_parents[] = {
+ "usart_programmable_clock_divider_out6",
"hsdiv4_16fft_main_1_hsdivout1_clk",
};
@@ -132,6 +137,10 @@
CLK_FIXED_RATE("board_0_ext_refclk1_out", 0, 0),
CLK_FIXED_RATE("board_0_i2c0_scl_out", 0, 0),
CLK_FIXED_RATE("board_0_mcu_ext_refclk0_out", 0, 0),
+ CLK_FIXED_RATE("board_0_mmc0_clklb_out", 0, 0),
+ CLK_FIXED_RATE("board_0_mmc0_clk_out", 0, 0),
+ CLK_FIXED_RATE("board_0_mmc1_clklb_out", 0, 0),
+ CLK_FIXED_RATE("board_0_mmc1_clk_out", 0, 0),
CLK_FIXED_RATE("board_0_ospi0_dqs_out", 0, 0),
CLK_FIXED_RATE("board_0_ospi0_lbclko_out", 0, 0),
CLK_FIXED_RATE("board_0_rgmii1_rxc_out", 0, 0),
@@ -167,9 +176,10 @@
CLK_DIV("postdiv4_16ff_main_0_hsdivout6_clk", "pllfracf2_ssmod_16fft_main_0_foutpostdiv_clk", 0x680098, 0, 7, 0, 0),
CLK_DIV("postdiv4_16ff_main_0_hsdivout8_clk", "pllfracf2_ssmod_16fft_main_0_foutpostdiv_clk", 0x6800a0, 0, 7, 0, 0),
CLK_DIV("postdiv4_16ff_main_2_hsdivout5_clk", "pllfracf2_ssmod_16fft_main_2_foutpostdiv_clk", 0x682094, 0, 7, 0, 0),
- CLK_DIV("postdiv4_16ff_main_2_hsdivout7_clk", "pllfracf2_ssmod_16fft_main_2_foutpostdiv_clk", 0x68209c, 0, 7, 0, 0),
CLK_DIV("postdiv4_16ff_main_2_hsdivout8_clk", "pllfracf2_ssmod_16fft_main_2_foutpostdiv_clk", 0x6820a0, 0, 7, 0, 0),
CLK_DIV("postdiv4_16ff_main_2_hsdivout9_clk", "pllfracf2_ssmod_16fft_main_2_foutpostdiv_clk", 0x6820a4, 0, 7, 0, 0),
+ CLK_MUX("main_emmcsd0_io_clklb_sel_out0", main_emmcsd0_io_clklb_sel_out0_parents, 2, 0x108160, 16, 1, 0),
+ CLK_MUX("main_emmcsd1_io_clklb_sel_out0", main_emmcsd1_io_clklb_sel_out0_parents, 2, 0x108168, 16, 1, 0),
CLK_MUX("main_ospi_loopback_clk_sel_out0", main_ospi_loopback_clk_sel_out0_parents, 2, 0x108500, 4, 1, 0),
CLK_MUX("main_usb0_refclk_sel_out0", main_usb0_refclk_sel_out0_parents, 2, 0x43008190, 0, 1, 0),
CLK_MUX("main_usb1_refclk_sel_out0", main_usb1_refclk_sel_out0_parents, 2, 0x43008194, 0, 1, 0),
@@ -196,13 +206,12 @@
CLK_MUX("main_cp_gemac_cpts_clk_sel_out0", main_cp_gemac_cpts_clk_sel_out0_parents, 8, 0x108140, 0, 3, 0),
CLK_MUX("main_emmcsd0_refclk_sel_out0", main_emmcsd0_refclk_sel_out0_parents, 2, 0x108160, 0, 1, 0),
CLK_MUX("main_emmcsd1_refclk_sel_out0", main_emmcsd1_refclk_sel_out0_parents, 2, 0x108168, 0, 1, 0),
- CLK_MUX("main_gpmc_fclk_sel_out0", main_gpmc_fclk_sel_out0_parents, 2, 0x108180, 0, 1, 0),
CLK_MUX("main_gtcclk_sel_out0", main_gtcclk_sel_out0_parents, 8, 0x43008030, 0, 3, 0),
CLK_MUX("main_ospi_ref_clk_sel_out0", main_ospi_ref_clk_sel_out0_parents, 2, 0x108500, 0, 1, 0),
- CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out0", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x108240, 0, 2, 0, 0, 48000000),
+ CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out6", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x108258, 0, 2, 0, 0, 48000000),
CLK_MUX("wkup_clkout_sel_out0", wkup_clkout_sel_out0_parents, 8, 0x43008020, 0, 3, 0),
CLK_MUX("wkup_clksel_out0", wkup_clksel_out0_parents, 2, 0x43008010, 0, 1, 0),
- CLK_MUX("main_usart0_fclk_sel_out0", main_usart0_fclk_sel_out0_parents, 2, 0x108280, 0, 1, 0),
+ CLK_MUX("main_usart6_fclk_sel_out0", main_usart6_fclk_sel_out0_parents, 2, 0x108298, 0, 1, 0),
CLK_DIV("hsdiv4_16fft_mcu_0_hsdivout1_clk", "pllfracf2_ssmod_16fft_mcu_0_foutvcop_clk", 0x4040084, 0, 7, 0, 0),
CLK_FIXED_RATE("mshsi2c_wkup_0_porscl", 0, 0),
CLK_DIV("sam62_pll_ctrl_wrap_main_0_chip_div24_clk_clk", "sam62_pll_ctrl_wrap_main_0_sysclkout_clk", 0x41011c, 0, 5, 0, 0),
@@ -246,11 +255,16 @@
DEV_CLK(16, 10, "gluelogic_rcosc_clkout"),
DEV_CLK(16, 11, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(16, 12, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
- DEV_CLK(54, 0, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
+ DEV_CLK(57, 0, "main_emmcsd0_io_clklb_sel_out0"),
+ DEV_CLK(57, 1, "board_0_mmc0_clklb_out"),
+ DEV_CLK(57, 2, "board_0_mmc0_clk_out"),
DEV_CLK(57, 5, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(57, 6, "main_emmcsd0_refclk_sel_out0"),
DEV_CLK(57, 7, "postdiv4_16ff_main_0_hsdivout5_clk"),
DEV_CLK(57, 8, "hsdiv4_16fft_main_2_hsdivout2_clk"),
+ DEV_CLK(58, 0, "main_emmcsd1_io_clklb_sel_out0"),
+ DEV_CLK(58, 1, "board_0_mmc1_clklb_out"),
+ DEV_CLK(58, 2, "board_0_mmc1_clk_out"),
DEV_CLK(58, 5, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(58, 6, "main_emmcsd1_refclk_sel_out0"),
DEV_CLK(58, 7, "postdiv4_16ff_main_0_hsdivout5_clk"),
@@ -276,10 +290,6 @@
DEV_CLK(75, 8, "hsdiv4_16fft_main_0_hsdivout1_clk"),
DEV_CLK(75, 9, "postdiv1_16fft_main_1_hsdivout5_clk"),
DEV_CLK(77, 0, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
- DEV_CLK(80, 0, "main_gpmc_fclk_sel_out0"),
- DEV_CLK(80, 1, "hsdiv4_16fft_main_0_hsdivout3_clk"),
- DEV_CLK(80, 2, "postdiv4_16ff_main_2_hsdivout7_clk"),
- DEV_CLK(80, 5, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(95, 0, "gluelogic_rcosc_clkout"),
DEV_CLK(95, 1, "gluelogic_hfosc0_clkout"),
DEV_CLK(95, 2, "wkup_clksel_out0"),
@@ -297,10 +307,6 @@
DEV_CLK(136, 0, "hsdiv0_16fft_main_8_hsdivout0_clk"),
DEV_CLK(140, 0, "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk"),
DEV_CLK(140, 1, "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk"),
- DEV_CLK(146, 0, "main_usart0_fclk_sel_out0"),
- DEV_CLK(146, 1, "usart_programmable_clock_divider_out0"),
- DEV_CLK(146, 2, "hsdiv4_16fft_main_1_hsdivout1_clk"),
- DEV_CLK(146, 5, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(157, 20, "clkout0_ctrl_out0"),
DEV_CLK(157, 21, "hsdiv4_16fft_main_2_hsdivout1_clk"),
DEV_CLK(157, 22, "hsdiv4_16fft_main_2_hsdivout1_clk"),
@@ -325,6 +331,10 @@
DEV_CLK(157, 164, "clk_32k_rc_sel_out0"),
DEV_CLK(157, 165, "gluelogic_rcosc_clkout"),
DEV_CLK(157, 166, "gluelogic_hfosc0_clkout"),
+ DEV_CLK(158, 0, "main_usart6_fclk_sel_out0"),
+ DEV_CLK(158, 1, "usart_programmable_clock_divider_out6"),
+ DEV_CLK(158, 2, "hsdiv4_16fft_main_1_hsdivout1_clk"),
+ DEV_CLK(158, 5, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(161, 0, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(161, 1, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(161, 2, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
@@ -350,7 +360,7 @@
const struct ti_k3_clk_platdata am62x_clk_platdata = {
.clk_list = clk_list,
- .clk_list_cnt = 86,
+ .clk_list_cnt = ARRAY_SIZE(clk_list),
.soc_dev_clk_data = soc_dev_clk_data,
- .soc_dev_clk_data_cnt = 136,
+ .soc_dev_clk_data_cnt = ARRAY_SIZE(soc_dev_clk_data),
};
Index: AM62x/U-Boot-2021.01/arch/arm/mach-k3/am62x/dev-data.c
===================================================================
--- AM62x/U-Boot-2021.01/arch/arm/mach-k3/am62x/dev-data.c (revision 3424)
+++ AM62x/U-Boot-2021.01/arch/arm/mach-k3/am62x/dev-data.c (revision 3425)
@@ -25,22 +25,21 @@
static struct ti_lpsc soc_lpsc_list[] = {
[0] = PSC_LPSC(0, &soc_psc_list[1], &soc_pd_list[0], NULL),
- [1] = PSC_LPSC(9, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[12]),
+ [1] = PSC_LPSC(9, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]),
[2] = PSC_LPSC(10, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[1]),
[3] = PSC_LPSC(11, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[2]),
- [4] = PSC_LPSC(12, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[9]),
- [5] = PSC_LPSC(13, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[10]),
- [6] = PSC_LPSC(15, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[12]),
- [7] = PSC_LPSC(20, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[12]),
- [8] = PSC_LPSC(21, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[12]),
- [9] = PSC_LPSC(23, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[12]),
- [10] = PSC_LPSC(24, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[12]),
- [11] = PSC_LPSC(28, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[12]),
- [12] = PSC_LPSC(34, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[12]),
- [13] = PSC_LPSC(41, &soc_psc_list[1], &soc_pd_list[1], &soc_lpsc_list[12]),
- [14] = PSC_LPSC(42, &soc_psc_list[1], &soc_pd_list[2], &soc_lpsc_list[12]),
- [15] = PSC_LPSC(45, &soc_psc_list[1], &soc_pd_list[3], &soc_lpsc_list[14]),
- [16] = PSC_LPSC(46, &soc_psc_list[1], &soc_pd_list[4], &soc_lpsc_list[14]),
+ [4] = PSC_LPSC(12, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[8]),
+ [5] = PSC_LPSC(13, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[9]),
+ [6] = PSC_LPSC(20, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]),
+ [7] = PSC_LPSC(21, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]),
+ [8] = PSC_LPSC(23, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]),
+ [9] = PSC_LPSC(24, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]),
+ [10] = PSC_LPSC(28, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]),
+ [11] = PSC_LPSC(34, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]),
+ [12] = PSC_LPSC(41, &soc_psc_list[1], &soc_pd_list[1], &soc_lpsc_list[11]),
+ [13] = PSC_LPSC(42, &soc_psc_list[1], &soc_pd_list[2], &soc_lpsc_list[11]),
+ [14] = PSC_LPSC(45, &soc_psc_list[1], &soc_pd_list[3], &soc_lpsc_list[13]),
+ [15] = PSC_LPSC(46, &soc_psc_list[1], &soc_pd_list[4], &soc_lpsc_list[13]),
};
static struct ti_dev soc_dev_list[] = {
@@ -54,19 +53,17 @@
PSC_DEV(55, &soc_lpsc_list[3]),
PSC_DEV(178, &soc_lpsc_list[4]),
PSC_DEV(179, &soc_lpsc_list[5]),
- PSC_DEV(54, &soc_lpsc_list[6]),
- PSC_DEV(80, &soc_lpsc_list[6]),
- PSC_DEV(57, &soc_lpsc_list[7]),
- PSC_DEV(58, &soc_lpsc_list[8]),
- PSC_DEV(161, &soc_lpsc_list[9]),
- PSC_DEV(162, &soc_lpsc_list[10]),
- PSC_DEV(75, &soc_lpsc_list[11]),
- PSC_DEV(102, &soc_lpsc_list[12]),
- PSC_DEV(146, &soc_lpsc_list[12]),
- PSC_DEV(13, &soc_lpsc_list[13]),
- PSC_DEV(166, &soc_lpsc_list[14]),
- PSC_DEV(135, &soc_lpsc_list[15]),
- PSC_DEV(136, &soc_lpsc_list[16]),
+ PSC_DEV(57, &soc_lpsc_list[6]),
+ PSC_DEV(58, &soc_lpsc_list[7]),
+ PSC_DEV(161, &soc_lpsc_list[8]),
+ PSC_DEV(162, &soc_lpsc_list[9]),
+ PSC_DEV(75, &soc_lpsc_list[10]),
+ PSC_DEV(102, &soc_lpsc_list[11]),
+ PSC_DEV(158, &soc_lpsc_list[11]),
+ PSC_DEV(13, &soc_lpsc_list[12]),
+ PSC_DEV(166, &soc_lpsc_list[13]),
+ PSC_DEV(135, &soc_lpsc_list[14]),
+ PSC_DEV(136, &soc_lpsc_list[15]),
};
const struct ti_k3_pd_platdata am62x_pd_platdata = {
@@ -74,8 +71,8 @@
.pd = soc_pd_list,
.lpsc = soc_lpsc_list,
.devs = soc_dev_list,
- .num_psc = 2,
- .num_pd = 5,
- .num_lpsc = 17,
- .num_devs = 23,
+ .num_psc = ARRAY_SIZE(soc_psc_list),
+ .num_pd = ARRAY_SIZE(soc_pd_list),
+ .num_lpsc = ARRAY_SIZE(soc_lpsc_list),
+ .num_devs = ARRAY_SIZE(soc_dev_list),
};
Index: AM62x/U-Boot-2021.01/include/configs/am62x_evm.h
===================================================================
--- AM62x/U-Boot-2021.01/include/configs/am62x_evm.h (revision 3424)
+++ AM62x/U-Boot-2021.01/include/configs/am62x_evm.h (revision 3425)
@@ -133,7 +133,7 @@
"name_kern=Image\0" \
"console=ttyS2,115200n8\0" \
"args_all=setenv optargs ${optargs} " \
- "earlycon=ns16550a,mmio32,0x02800000 ${mtdparts}\0" \
+ "earlycon=ns16550a,mmio32,0x02860000 ${mtdparts}\0" \
"run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
/* U-Boot MMC-specific configuration */
I copy teh files dev-data.c and clk-data.c link https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1248434/sk-am62-wanting-to-change-serial-console-from-uart0-to-uart6/4723105?tisearch=e2e-sitesearch&keymatch=AM625%2520change%2520debug%2520uart%2520from%2520uart0%2520to%2520uart6#4723105 5488.dev-data.c and 2474.clk-data.c respectively. Moreover, there is always logs as followings:
U-Boot SPL 2021.01-svn3425 (Jun 26 2024 - 13:54:18 +0800)
SYSFW ABI: 3.1 (firmware rev 0x0008 '8.6.4--v08.06.04 (Chill Capybar')
SPL initial stack usage: 13424 bytes
Trying to boot from MMC1
Authentication passed
Authentication passed
Authentication passed
Authentication passed
Authentication passed
Loading Environment from MMC... MMC: block number 0x3500 exceeds max(0x2000)
*** Warning - !read failed, using default environment
init_env from device 9 not supported!
Starting ATF on ARM64 core...
U-Boot SPL 2021.01-svn3425 (Jun 26 2024 - 13:49:00 +0800)
SYSFW ABI: 3.1 (firmware rev 0x0008 '8.6.4--v08.06.04 (Chill Capybar')
Trying to boot from MMC1
Warning: Did not detect image signing certificate. Skipping authentication to prevent boot failure. This will fail on Security Enforcing(HS-SE) devices
Warning: Did not detect image signing certificate. Skipping authentication to prevent boot failure. This will fail on Security Enforcing(HS-SE) devices
U-Boot 2021.01-svn3425 (Jun 26 2024 - 13:49:00 +0800)
SoC: AM62X SR1.0 HS-FS
Model: Texas Instruments AM625 SK
DRAM: 1 GiB
MMC: mmc@fa10000: 0, mmc@fa00000: 1, mmc@fa20000: 2
Loading Environment from MMC... *** Warning - bad CRC, using default environment
Regards!
Johnny Liu
