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Original question:

TDA4VH-Q1: sdk8.6-cpsw9g-rx-error

TDA4VM: TDA4VM SDK8.6 CPSW9G is not functioning properly, unable to receive data, and the PC is unable to ping tda4vm.

Arthur Li
Prodigy 50 points
Part Number: TDA4VM
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Currently, we are facing an issue with the CPSW9G network not functioning correctly on our customized version of tda4vm, which is based on the SDK 8.6 port. The CPSW9G's RTMII3 interface is connected to an external switch using a mac2mac connection.

Here are the detailed configurations:

  1. Port Configuration:
    We have configured PORT1, PORT8, PORT3, and PORT4 to operate in RGMII mode with NO-PHY, fixed speed, and full-duplex settings.

    The relevant configuration snippet looks like this:

  2. Pin Mux Configuration:
    The pin mux configuration has been set up using the sysconfig tool, based on the pdk_jacinto_08_06_01_03/packages/ti/board/src/j721e_evm/J721E_pinmux_data_gesi_cpsw9g.c

    The observed issue is that the virt-switch port network interface on the A72 core is not receiving any data, and a PC cannot ping the A72 core successfully.

  • 0
    TI__Guru 63190 points

    Hi,

    Can you please confirm that RGMII delays are enabled or not?

    By default CPSW side RGMII Tx delay is not enabled. It suppose to enable from PHY or schematic traces.?

    May I know you are using EthFw application or enet example?

    Also, please share the logs with us.

    Best Regards,
    Sudheer

  • 0 in reply to Doredla Sudheer Kumar
    Prodigy 50 points

    Hi Sudheer，

    We have configured the RGMII delay on the opposite end,  the network is still not reachable. However, after the system has been running for a period of time, approximately 2 minutes, the network may become reachable.

    I use ETHFW on MCU2-0.   

    I want to know, in order to fix this network issue, besides the rgmii tx delay, what other factors should I pay attention to?

     

    tda4m_sdk8.6._mcu_.log

  • 0 in reply to Arthur Li
    TI__Guru 63190 points

    Hi,

    Arthur Li said:
    We have configured the RGMII delay on the opposite end,  the network is still not reachable. However, after the system has been running for a period of time, approximately 2 minutes, the network may become reachable

    What do you mean by Network is reachable. is ping success after 2 minutes.

    I could see from Logs Port is Link Up as soon as configured in one time.
    Where as Port-4, Port-8 are link up in two times, and prints are also not proper, Please refer to below.


    After Link Up message observed EthFw init.

    Can you please check your sequence.

    Best Regards,
    Sudheer

  • 0 in reply to Doredla Sudheer Kumar
    Prodigy 50 points
    Hi Sudheer，
         Sudheer said:
         What do you mean by Network is reachable. is ping success after 2 minutes.   
    Yes , the network ping was successful after 2 minutes.
     
       Sudheer said:
        Where as Port-4, Port-8 are link up in two times, and prints are also not proper, Please refer to below.
    It seems there's no issue with opening Port 4 and Port 8 twice, right?
    I didn't spot any problem in the diagram you provided. Could you please give me more details?  I've removed the 'mac only' interface and configured it accordingly on sdk8.2, and it's working properly.
    Additionally, we have encountered an issue. Let's discuss the delay of RGMII PORT3. We had configured the delay value on the opposite side, which worked fine on SDK 8.2. Currently, after upgrading the SDK to version 8.6, the original delay no longer works, and we need to adapt it to a new value. What is the reason behind this? Has there been a change in the driver that CPSW 9G uses to control RGMII PORT3?
     
  • 0 in reply to Arthur Li
    TI__Guru 63190 points

    Hi,

    Arthur Li said:
    Additionally, we have encountered an issue. Let's discuss the delay of RGMII PORT3. We had configured the delay value on the opposite side, which worked fine on SDK 8.2. Currently, after upgrading the SDK to version 8.6, the original delay no longer works, and we need to adapt it to a new value. What is the reason behind this? Has there been a change in the driver that CPSW 9G uses to control RGMII PORT3?

    Related to RGMII no change. where as MDIO is configured in Manual mode in 8.6 due to H/W Errata.

    are you doing any MDIO transactions for PHY configuration? If not it will not have any impact.

    Best Regards,
    Sudheer