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AM62A7-Q1: Watchdog testing

Part Number: AM62A7-Q1

Tool/software:

I have modified the device tree for release 9.2 with the following patches:

From: Judith Mendez <jm@ti.com>
Subject: [PATCH] watchdog: rti_wdt: Set min_hw_heartbeat_ms to accommodate 5% safety margin
Date: Wed, 3 Apr 2024 16:24:26 -0500

On AM62x, the watchdog is pet before the valid window
is open. Fix min_hw_heartbeat and accommodate a 5% safety
margin with the exception of open window size < 10%,
which shall use <5% due to the smaller open window size.

Signed-off-by: Judith Mendez <jm@ti.com>
---
 drivers/watchdog/rti_wdt.c | 24 +++++++++++++-----------
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/drivers/watchdog/rti_wdt.c b/drivers/watchdog/rti_wdt.c
index 8e1be7ba0103..0b16ada659cc 100644
--- a/drivers/watchdog/rti_wdt.c
+++ b/drivers/watchdog/rti_wdt.c
@@ -92,7 +92,7 @@ static int rti_wdt_start(struct watchdog_device *wdd)
         * to be 50% or less than that; we obviouly want to configure the open
         * window as large as possible so we select the 50% option.
         */
-       wdd->min_hw_heartbeat_ms = 500 * wdd->timeout;
+       wdd->min_hw_heartbeat_ms = 550 * wdd->timeout;

        /* Generate NMI when wdt expires */
        writel_relaxed(RTIWWDRX_NMI, wdt->base + RTIWWDRXCTRL);
@@ -126,31 +126,33 @@ static int rti_wdt_setup_hw_hb(struct watchdog_device *wdd, u32 wsize)
         * be petted during the open window; not too early or not too late.
         * The HW configuration options only allow for the open window size
         * to be 50% or less than that.
+        * To avoid any glitches, we accommodate 5% safety margin, with the
+        * exception of open window size < 10%.
         */
        switch (wsize) {
        case RTIWWDSIZE_50P:
-               /* 50% open window => 50% min heartbeat */
-               wdd->min_hw_heartbeat_ms = 500 * heartbeat;
+               /* 50% open window => 55% min heartbeat */
+               wdd->min_hw_heartbeat_ms = 550 * heartbeat;
                break;

        case RTIWWDSIZE_25P:
-               /* 25% open window => 75% min heartbeat */
-               wdd->min_hw_heartbeat_ms = 750 * heartbeat;
+               /* 25% open window => 80% min heartbeat */
+               wdd->min_hw_heartbeat_ms = 800 * heartbeat;
                break;

        case RTIWWDSIZE_12P5:
-               /* 12.5% open window => 87.5% min heartbeat */
-               wdd->min_hw_heartbeat_ms = 875 * heartbeat;
+               /* 12.5% open window => 92.5% min heartbeat */
+               wdd->min_hw_heartbeat_ms = 925 * heartbeat;
                break;

        case RTIWWDSIZE_6P25:
-               /* 6.5% open window => 93.5% min heartbeat */
-               wdd->min_hw_heartbeat_ms = 935 * heartbeat;
+               /* 6.5% open window => 96.5% min heartbeat */
+               wdd->min_hw_heartbeat_ms = 965 * heartbeat;
                break;

        case RTIWWDSIZE_3P125:
-               /* 3.125% open window => 96.9% min heartbeat */
-               wdd->min_hw_heartbeat_ms = 969 * heartbeat;
+               /* 3.125% open window => 97.9% min heartbeat */
+               wdd->min_hw_heartbeat_ms = 979 * heartbeat;
                break;

        default:
--
2.43.2


From 64aa78a25bbfbbd037d1f756e0a6cee0bc6c876f Mon Sep 17 00:00:00 2001
From: Bas Vermeulen <sebastiaan.vermeulen@bench.com>
Date: Wed, 17 Jul 2024 12:26:21 +0200
Subject: [PATCH] arm64: boot: dts: ti: am62a: add main_esm and main_rti* nodes

Add watchdog and esm node for am62a
---
 arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 52 +++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index 1b3b492c7086..ab5c479f7851 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -248,6 +248,13 @@ main_pmx0: pinctrl@f4000 {
                #interrupt-cells = <1>;
        };

+       main_esm: esm@420000 {
+               compatible = "ti,j721e-esm";
+               reg = <0x0 0x420000 0x0 0x1000>;
+               ti,esm-pins = <192>, <193>, <195>, <209>, <210>, <204>;
+               bootph-pre-ram;
+       };
+
        main_timer0: timer@2400000 {
                compatible = "ti,am654-timer";
                reg = <0x00 0x2400000 0x00 0x400>;
@@ -819,6 +826,51 @@ main_mcan0: can@20701000 {
                status = "disabled";
        };

+       main_rti0: watchdog@e000000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x00 0x0e000000 0x00 0x100>;
+               clocks = <&k3_clks 125 0>;
+               power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
+               assigned-clocks = <&k3_clks 125 0>;
+               assigned-clock-parents = <&k3_clks 125 2>;
+       };
+
+       main_rti1: watchdog@e010000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x00 0x0e010000 0x00 0x100>;
+               clocks = <&k3_clks 126 0>;
+               power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
+               assigned-clocks = <&k3_clks 126 0>;
+               assigned-clock-parents = <&k3_clks 126 2>;
+       };
+
+       main_rti2: watchdog@e020000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x00 0x0e020000 0x00 0x100>;
+               clocks = <&k3_clks 127 0>;
+               power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
+               assigned-clocks = <&k3_clks 127 0>;
+               assigned-clock-parents = <&k3_clks 127 2>;
+       };
+
+       main_rti3: watchdog@e030000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x00 0x0e030000 0x00 0x100>;
+               clocks = <&k3_clks 128 0>;
+               power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
+               assigned-clocks = <&k3_clks 128 0>;
+               assigned-clock-parents = <&k3_clks 128 2>;
+       };
+
+       main_rti4: watchdog@e040000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x00 0x0e040000 0x00 0x100>;
+               clocks = <&k3_clks 205 0>;
+               power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
+               assigned-clocks = <&k3_clks 205 0>;
+               assigned-clock-parents = <&k3_clks 205 2>;
+       };
+
        epwm0: pwm@23000000 {
                compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
                #pwm-cells = <3>;
--
2.34.1

This adds the main_esm node (with ti,esm-pins from the E2E thread on here), and adds 5 watchdog nodes.

When I do a cat /dev/watchdog, since the kernel is compiled with nowayout, the board should reboot after the watchdog times out.

Unfortunately, it does not.

My questions:
- Am I using the correct ti,esm-pins for main_esm combined with the AM62A?
- Are the watchdog devices correct in the device tree patch? (Taken from ti-6.6.y, as referenced in another watchdog thread)
- Should I get the reboot I am expecting if I open /dev/watchdog0 and close it again (provided nowayout is set).

Any help would be appreciated, and I am available to test.

Regards,

Bas Vermeulen

  • Hello Bas,

    We recently discovered that the ESM inputs need to be updated in the uboot & kernel devicetree files. Please see these threads:
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1368655/am62a7-enabling-the-watchdog-and-testing

    and 
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1370422/am62p-am62p/5268347#5268347

    If you get your code working I would appreciate it if you posted your changes. Let us know if you have followup questions!

    Regards,

    Nick

  • I used the esm inputs from those threads to generate the patch I used. Do I need to set up the ESM in u-boot, or will it work if I only set that in the kernel device tree?

  • Hello Bas,

    I think that the ESM needs to be configured properly in the u-boot file as well.

    Regards,

    Nick

  • Hi Nick,

    I modified u-boot-ti with the following patch (both the R5 u-boot and the A53 u-boot):

    From f6204763447e7607c30fa810f787e3564727a409 Mon Sep 17 00:00:00 2001
    From: Bas Vermeulen <sebastiaan.vermeulen@bench.com>
    Date: Fri, 19 Jul 2024 10:09:39 +0200
    Subject: [PATCH] arch: arm: dts: k3-am62a-main.dtsi: add esm, main_timer* and
     main_rti* nodes
    
    ---
     arch/arm/dts/k3-am62a-main.dtsi | 148 ++++++++++++++++++++++++++++++++
     1 file changed, 148 insertions(+)
    
    diff --git a/arch/arm/dts/k3-am62a-main.dtsi b/arch/arm/dts/k3-am62a-main.dtsi
    index 41aec3a82e..f9a6559453 100644
    --- a/arch/arm/dts/k3-am62a-main.dtsi
    +++ b/arch/arm/dts/k3-am62a-main.dtsi
    @@ -171,6 +171,109 @@
                    pinctrl-single,function-mask = <0xffffffff>;
            };
    
    +       main_esm: esm@420000 {
    +               compatible = "ti,j721e-esm";
    +               reg = <0x0 0x420000 0x0 0x1000>;
    +               ti,esm-pins = <192>, <193>, <195>, <209>, <210>, <204>;
    +               bootph-pre-ram;
    +       };
    +
    +       main_timer0: timer@2400000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2400000 0x00 0x400>;
    +               interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 36 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 36 2>;
    +               assigned-clock-parents = <&k3_clks 36 3>;
    +               power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
    +       main_timer1: timer@2410000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2410000 0x00 0x400>;
    +               interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 37 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 37 2>;
    +               assigned-clock-parents = <&k3_clks 37 3>;
    +               power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
    +       main_timer2: timer@2420000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2420000 0x00 0x400>;
    +               interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 38 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 38 2>;
    +               assigned-clock-parents = <&k3_clks 38 3>;
    +               power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
    +       main_timer3: timer@2430000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2430000 0x00 0x400>;
    +               interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 39 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 39 2>;
    +               assigned-clock-parents = <&k3_clks 39 3>;
    +               power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
    +       main_timer4: timer@2440000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2440000 0x00 0x400>;
    +               interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 40 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 40 2>;
    +               assigned-clock-parents = <&k3_clks 40 3>;
    +               power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
    +       main_timer5: timer@2450000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2450000 0x00 0x400>;
    +               interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 41 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 41 2>;
    +               assigned-clock-parents = <&k3_clks 41 3>;
    +               power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
    +       main_timer6: timer@2460000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2460000 0x00 0x400>;
    +               interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 42 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 42 2>;
    +               assigned-clock-parents = <&k3_clks 42 3>;
    +               power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
    +       main_timer7: timer@2470000 {
    +               compatible = "ti,am654-timer";
    +               reg = <0x00 0x2470000 0x00 0x400>;
    +               interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 43 2>;
    +               clock-names = "fck";
    +               assigned-clocks = <&k3_clks 43 2>;
    +               assigned-clock-parents = <&k3_clks 43 3>;
    +               power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
    +               ti,timer-pwm;
    +       };
    +
            main_uart0: serial@2800000 {
                    compatible = "ti,am64-uart", "ti,am654-uart";
                    reg = <0x00 0x02800000 0x00 0x100>;
    @@ -536,6 +639,51 @@
                    ti,mbox-num-fifos = <16>;
            };
    
    +       main_rti0: watchdog@e000000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e000000 0x00 0x100>;
    +               clocks = <&k3_clks 125 0>;
    +               power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 125 0>;
    +               assigned-clock-parents = <&k3_clks 125 2>;
    +       };
    +
    +       main_rti1: watchdog@e010000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e010000 0x00 0x100>;
    +               clocks = <&k3_clks 126 0>;
    +               power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 126 0>;
    +               assigned-clock-parents = <&k3_clks 126 2>;
    +       };
    +
    +       main_rti2: watchdog@e020000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e020000 0x00 0x100>;
    +               clocks = <&k3_clks 127 0>;
    +               power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 127 0>;
    +               assigned-clock-parents = <&k3_clks 127 2>;
    +       };
    +
    +       main_rti3: watchdog@e030000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e030000 0x00 0x100>;
    +               clocks = <&k3_clks 128 0>;
    +               power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 128 0>;
    +               assigned-clock-parents = <&k3_clks 128 2>;
    +       };
    +
    +       main_rti4: watchdog@e040000 {
    +               compatible = "ti,j7-rti-wdt";
    +               reg = <0x00 0x0e040000 0x00 0x100>;
    +               clocks = <&k3_clks 205 0>;
    +               power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
    +               assigned-clocks = <&k3_clks 205 0>;
    +               assigned-clock-parents = <&k3_clks 205 2>;
    +       };
    +
            c7x_0: dsp@7e000000 {
                    compatible = "ti,am62a-c7xv-dsp";
                    reg = <0x00 0x7e000000 0x00 0x00100000>;
    --
    2.34.1
    

    I also noticed that the ESM isn't enabled in u-boot configuration (CONFIG_ESM_K3 is not set), and rectified this with the following configuration snippet:

    # Compiler: gcc (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0
    CONFIG_ESM_K3=y

    Unfortunately with that enabled (for both k3-r5 and a53), my board stopped booting (no output on the serial port). If CONFIG_ESM_K3 is the cause of that, then the ESM configuration in the u-boot device tree shouldn't be necessary, as the device isn't enabled/used.

    Regards,

    Bas Vermeulen

  • Adding the patch to the k3r5 version of u-boot results in being unable to boot. Adding it to the normal (A53) u-boot works, but I am still unable to get the board to reboot because of a watchdog timer elapsing.

  • I've modified k3-am62a7-r5-sk.dts instead of k3-am62a-main.dtsi, and that results in a working tiboot3.bin and/or tispl.bin.

    diff --git a/arch/arm/dts/k3-am62a7-r5-sk.dts b/arch/arm/dts/k3-am62a7-r5-sk.dts
    index 3c63b99f17..86f69367ec 100644
    --- a/arch/arm/dts/k3-am62a7-r5-sk.dts
    +++ b/arch/arm/dts/k3-am62a7-r5-sk.dts
    @@ -113,7 +113,7 @@
            main_esm: esm@420000 {
                    compatible = "ti,j721e-esm";
                    reg = <0x0 0x420000 0x0 0x1000>;
    -               ti,esm-pins = <69>, <160>, <161>, <162>, <163>, <177>, <178>;
    +               ti,esm-pins = <192>, <193>, <195>, <209>, <210>, <204>;
                    bootph-pre-ram;
            };
     };

    When I try the watchdog, it's still not rebooting when the counter rolls over (but the status says it's been triggered).

    I've dumped the RTI registers:

    RTI_GCTRL (0x0e000000) =  0x00000000
    RTI_TBCTRL (0x0e000004) =  0x00000000
    RTI_CAPCTRL (0x0e000008) =  0x00000000
    RTI_COMPCTRL (0x0e00000c) =  0x00000000
    RTI_FRC0 (0x0e000010) =  0x00000000
    RTI_UC0 (0x0e000014) =  0x00000000
    RTI_CPUC0 (0x0e000018) =  0x00000000
    RTI_CAFRC0 (0x0e000020) =  0x00000000
    RTI_CAUC0 (0x0e000024) =  0x00000000
    RTI_FRC1 (0x0e000030) =  0x00000000
    RTI_UC1 (0x0e000034) =  0x00000000
    RTI_CPUC1 (0x0e000038) =  0x00000000
    RTI_CAFRC1 (�0x0e000420) =  0x00000200
    RTI_CAUC1 (0x0e000044) =  0x00000000
    RTI_COMP0 (0x0e000050) =  0x00000000
    RTI_UDCP0 (0x0e000054) =  0x00000000
    RTI_COMP1 (0x0e000058) =  0x00000000
    RTI_UDCP1 (0x0e00005c) =  0x00000000
    RTI_COMP2 (0x0e000060) =  0x00000000
    RTI_UDCP2 (0x0e000064) =  0x00000000
    RTI_COMP3 (0x0e000068) =  0x00000000
    RTI_UDCP3 (0x0e00006c) =  0x00000000
    RTI_TBLCOMP (0x0e000070) =  0x00000000
    RTI_TBHCOMP (0x0e000074) =  0x00000000
    RTI_SETINT (0x0e000080) =  0x00000000
    RTI_CLEARINT (0x0e000084) =  0x00000000
    RTI_INTFLAG (0x0e000088) =  0x00000000
    RTI_DWDCTRL (0x0e000090) =  0xA98559DA
    RTI_DWDPRLD (0x0e000094) =  0x000000F0
    RTI_WDSTATUS (0x0e000098) =  0x0000003A
    RTI_WDKEY (0x0e00009c) =  0x0000A35C
    RTI_DWDCNTR (0x0e0000a0) =  0x019BC412
    RTI_WWDRXNCTRL (0x0e0000a4) =  0x0000000A
    RTI_WWDSIZECTRL (0x0e0000a8) =  0x00000050
    RTI_INTCLRENABLE (0x0e0000ac) =  0x05050505
    RTI_COMP0CLR (0x0e0000b0) =  0x00000000
    RTI_COMP1CLR (0x0e0000b4) =  0x00000000
    RTI_COMP2CLR (0x0e0000b8) =  0x00000000
    RTI_COMP3CLR (0x0e0000bc) =  0x00000000

    RTI_DWDCNTR counts down to 0 and then rolls over.

    I've also dumped the ESM registers:

    ESM_INFO (0x420004) =  0x80000107
    ESM_EN (0x420008) =  0x00000000
    ESM_SFT_RST (0x42000c) =  0x00000000
    ESM_ERR_RAW (0x420010) =  0x00000000
    ESM_ERR_STS (0x420014) =  0x00000000
    ESM_ERR_EN_SET (0x420018) =  0x00000000
    ESM_ERR_EN_CLR (0x42001c) =  0x00000000
    ESM_LOW_PRI (0x420020) =  0xFFFFFFFF
    ESM_HI_PRI (0x420024) =  0xFFFFFFFF
    ESM_LOW (0x420028) =  0x00000000
    ESM_HI (0x42002c) =  0x00000000
    ESM_EOI (0x420030) =  0x00000000
    ESM_PIN_CTRL (0x420040) =  0x00000000
    ESM_PIN_STS (0x420044) =  0x00000001
    ESM_PIN_CNTR (0x420048) =  0x00030D40
    ESM_PIN_CNTR_PRE (0x42004c) =  0x00030D40
    ESM_PWMH_PIN_CNTR (0x420050) =  0x000186A0
    ESM_PWMH_PIN_CNTR_PRE (0x420054) =  0x000186A0
    ESM_PWML_PIN_CNTR (0x420058) =  0x000186A0
    ESM_PWML_PIN_CNTR_PRE (0x42005c) =  0x000186A0
    ESM_ERR_GRP_RAW_0 (0x420400) =  0x00060080
    ESM_ERR_GRP_STS_0 (0x420404) =  0x00000000
    ESM_ERR_GRP_INTR_EN_SET_0 (0x420408) =  0x00000000
    ESM_ERR_GRP_INTR_EN_CLR_0 (0x42040c) =  0x00000000
    ESM_ERR_GRP_INT_PRIO_0 (0x420410) =  0x00000000
    ESM_ERR_GRP_PIN_EN_SET_0 (0x420414) =  0x00000000
    ESM_ERR_GRP_PIN_EN_CLR_0 (0x420418) =  0x00000000
    ESM_ERR_GRP_RAW_1 (0x420420) =  0x00000000
    ESM_ERR_GRP_STS_1 (0x420424) =  0x00000000
    ESM_ERR_GRP_INTR_EN_SET_1 (0x420428) =  0x00000000
    ESM_ERR_GRP_INTR_EN_CLR_1 (0x42042c) =  0x00000000
    ESM_ERR_GRP_INT_PRIO_1 (0x420430) =  0x00000000
    ESM_ERR_GRP_PIN_EN_SET_1 (0x420434) =  0x00000000
    ESM_ERR_GRP_PIN_EN_CLR_1 (0x420438) =  0x00000000
    ESM_ERR_GRP_RAW_2 (0x420440) =  0x00000000
    ESM_ERR_GRP_STS_2 (0x420444) =  0x00000000
    ESM_ERR_GRP_INTR_EN_SET_2 (0x420448) =  0x00000000
    ESM_ERR_GRP_INTR_EN_CLR_2 (0x42044c) =  0x00000000
    ESM_ERR_GRP_INT_PRIO_2 (0x420450) =  0x00000000
    ESM_ERR_GRP_PIN_EN_SET_2 (0x420454) =  0x00000000
    ESM_ERR_GRP_PIN_EN_CLR_2 (0x420458) =  0x00000000
    ESM_ERR_GRP_RAW_3 (0x420460) =  0x00000000
    ESM_ERR_GRP_STS_3 (0x420464) =  0x00000000
    ESM_ERR_GRP_INTR_EN_SET_3 (0x420468) =  0x00000000
    ESM_ERR_GRP_INTR_EN_CLR_3 (0x42046c) =  0x00000000
    ESM_ERR_GRP_INT_PRIO_3 (0x420470) =  0x00000000
    ESM_ERR_GRP_PIN_EN_SET_3 (0x420474) =  0x00000000
    ESM_ERR_GRP_PIN_EN_CLR_3 (0x420478) =  0x00000000
    ESM_ERR_GRP_RAW_4 (0x420480) =  0x0000007F
    ESM_ERR_GRP_STS_4 (0x420484) =  0x00000000
    ESM_ERR_GRP_INTR_EN_SET_4 (0x420488) =  0x00000000
    ESM_ERR_GRP_INTR_EN_CLR_4 (0x42048c) =  0x00000000
    ESM_ERR_GRP_INT_PRIO_4 (0x420490) =  0x00000000
    ESM_ERR_GRP_PIN_EN_SET_4 (0x420494) =  0x00000000
    ESM_ERR_GRP_PIN_EN_CLR_4 (0x420498) =  0x00000000
    ESM_ERR_GRP_RAW_5 (0x4204a0) =  0x00000000
    ESM_ERR_GRP_STS_5 (0x4204a4) =  0x00000000
    ESM_ERR_GRP_INTR_EN_SET_5 (0x4204a8) =  0x00000000
    ESM_ERR_GRP_INTR_EN_CLR_5 (0x4204ac) =  0x00000000
    ESM_ERR_GRP_INT_PRIO_5 (0x4204b0) =  0x00000000
    ESM_ERR_GRP_PIN_EN_SET_5 (0x4204b4) =  0x00000000
    ESM_ERR_GRP_PIN_EN_CLR_5 (0x4204b8) =  0x00000000
    ESM_ERR_GRP_RAW_6 (0x4204c0) =  0x00000001
    ESM_ERR_GRP_STS_6 (0x4204c4) =  0x00000000
    ESM_ERR_GRP_INTR_EN_SET_6 (0x4204c8) =  0x00000000
    ESM_ERR_GRP_INTR_EN_CLR_6 (0x4204cc) =  0x00000000
    ESM_ERR_GRP_INT_PRIO_6 (0x4204d0) =  0x00000000
    ESM_ERR_GRP_PIN_EN_SET_6 (0x4204d4) =  0x00000000
    ESM_ERR_GRP_PIN_EN_CLR_6 (0x4204d8) =  0x00000000

    Are those values as expected? I've enabled the correct esm-pins, but I'm not sure if the ESM module is working as expected.

    Regards,

    Bas Vermeulen

  • Hello Bas,

    Thanks for the detailed posts. I ran out of time to review your information today, but I will set aside some time tomorrow (Tuesday) to review and get back to you.

    Regards,

    Nick

  • Hello Nick,

    I *think* the problem is that CONFIG_ESM_K3 isn't enabled. Unfortunately, I can't check that until thursday, since if it goes wrong I can't boot my board, and I'm working remotely today and tomorrow. I'll see if I can test that on thursday.

    Regards,

    Bas Vermeulen

  • That might be a contributing factor.

    Another thing that could simplify things: are you building on the patches that were already pushed? (and have some incorrect information?)

    e.g., for the Linux devicetree, I see
    https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/commit/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi?h=ti-linux-6.6.y-cicd&id=f1dfd180ab49fb797cf5b1f51e2988d7db45445a (which has the wrong ESM numbers)

    and 

    https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/commit/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi?h=ti-linux-6.6.y-cicd&id=804702e4c2aa5eae4611e9389833631a6b22e913 

    I haven't checked to see if these are part of a patch set that gives us the broader picture of all changes, including potential kernel configs.

    Regards,

    Nick

  • I didn't use the patches themselves, but that's where I got the content, yes.

    But I don't think the esm node in the linux device tree does anything, because there is no driver for it present in the kernel (at all, if you grep for the compatible string, all you get is a couple device trees).

    So the ESM is set up in the k3r5 version of u-boot, and I need to get that up and running before I have a chance to get the watchdog reset working. The CONFIG_ESM_K3 is also a part of the u-boot configuration, not the kernel config.

  • Hello Bas,

    Apologies for the delayed responses here. Our developer has started looking into the watchdog issue on this end as well, so I'll be conducting a code review tomorrow and provide another update then.

    Regards,

    Nick

  • Hello Bas,

    Please refer to this post for all the patches I think you should need in order to enable watchdog on SDK 9.2. Let me know if it works out for you:
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1368655/am62a7-enabling-the-watchdog-and-testing/5346377#5346377

    Regards,

    Nick

  • Hi Nick,

    I looked into the post that you suggested, and saw that you weren't able to get it working yet.

    Some points from my side:

    • The ESM configuration in the kernel doesn't actually do anything, as there is no driver in the kernel that gets enabled by the compatible string in that section. Adding the ESM node is nice to have for completeness, but isn't actually used. A driver would have to be written for this to change.

    I've added the ESM node, and enabled CONFIG_ESM_K3 in the k3r5 u-boot configuration, and get the following output from u-boot:

    U-Boot SPL 2023.04-gcad9d36eb9 (Mar 07 2024 - 13:49:21 +0000)
    SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.1--v09.02.01 (Kool Koala)')
    esm main init failed: -96
    esm mcu init failed: -96
    am62a_init: board_init_f done
    SPL initial stack usage: 17072 bytes
    am62a_init: spl_boot_device: devstat = 0x4b bootmedia = 0x9 bootindex = 0
    Trying to boot from MMC1
    am62a_init: spl_boot_device: devstat = 0x4b bootmedia = 0x9 bootindex = 0
    Authentication passed
    am62a_init: spl_boot_device: devstat = 0x4b bootmedia = 0x9 bootindex = 0
    Authentication passed
    am62a_init: spl_boot_device: devstat = 0x4b bootmedia = 0x9 bootindex = 0
    Authentication passed
    am62a_init: spl_boot_device: devstat = 0x4b bootmedia = 0x9 bootindex = 0
    Authentication passed
    am62a_init: spl_boot_device: devstat = 0x4b bootmedia = 0x9 bootindex = 0
    Authentication passed
    Starting ATF on ARM64 core...

    I've looked into the error code, and it seems to complain that the ESM node can't be found. Can you tell me what u-boot this is? It looks like it's the DM R5, as that's where I've enabled CONFIG_ESM_K3. I've also added the ESM node to the device tree that ought to be used there, but I'm not 100% sure on that.

    Is there a way to check this?

    On another note, when do you expect SDK 10.0 to be released?

  • Hello Bas,

    I am sending your thread to another team member to comment on the question about debugging the "esm failed" message.

    AM62Ax SDK 10.0 should be coming soon (SDK 10.0 for most other devices was released at the end of last week), but I cannot say exactly when. 

    I JUST learned that the AM62Ax SDK 10.0 release actually sneakily came out on Monday. It's the end of the workday so I'm out of time for today, but I'll try modifying SDK 10.0 as documented here and see if I can get watchdog working:
    https://software-dl.ti.com/processor-sdk-linux/esd/AM62AX/10_00_00/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/Watchdog.html#fixes-for-10-0-sdk 

    Regards,

    Nick

  • Hi,

    The config option CONFIG_ESM_K3 is enabled by default in the SDK and I don't seem to face any issues like mentioned above.

    Ideally, please check the latest SDK release, and let me know if you still face any issues.

    Regards,
    Aparna

  • Hello Bas,

    Ok, I am grabbing your thread back for now. Turns out that watchdog IS working on SDK 10.0 with the changes documented above, I just didn't realize that I needed to rename the tiboot3.bin file, so my changes were not actually getting applied during boot: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1368655/am62a7-enabling-the-watchdog-and-testing/5378638#5378638

    I was definitely making the same mistake when building on SDK 9.x, so I'm not sure yet whether things were actually working on SDK 9.x, and I was just not booting with the updated tiboot3.bin, or if they still weren't working.

    Regards,

    Nick

  • Hello Nick,

    I'm juggling several tasks at the moment, and this is lower on my priority list. I'll get back to this soon.

    We should be moving to a Phytec BSP based on SDK 10.0 somewhere end of September/beginning of October at which point this ought to  work out of the box (with the changes in the release notes).

    Regards,

    Bas Vermeulen

  • Hello Bas,

    Ok good, hopefully that fixes this particular issue (as long as Phytec grabs all the associated patches on ti-linux-kernel. I think (but am not certain) that the patches were upstreamed to a later kernel than 6.6, so I would not expect to see them on mainline kernel 6.6.

    Regards,

    Nick