Other Parts Discussed in Thread: DRA821, TIDEP-01022, TDA4VL, TDA4VH, DRA829, AM67
Tool/software:
Hi Team,
We are working on DRA821U CPU with Linux SDK_09.02. We are using serdes lanes0,1 as PCIe root complex, so we need to configure the serdes clock pins as output.
Kindly share the necessary changes to achieve this.
Regards,
Nikhil K