[FAQ] TDA4VM: How do I use GPIO interrupts in PDK and how are they routed?

Here are some details and information regarding GPIO interrupts and interrupt routing for J7 devices and in RTOS PDK.

For the J7 devices, all the GPIO pins are grouped into sets of 16 pins per bank with 9 banks per each GPIO module. These pins have a straight map to their bank just like the following:

• Bank 0 = GPIO[0:15]
• Bank 1 = GPIO[16:31]
• Bank 2 = GPIO[32:47]
• etc.

For example, a banked interrupt on pin GPIO0_18 would trigger an interrupt on GPIO_BANK1. Additionally, the bank must be enabled by using the BINTEN register, so to enable GPIO_BANK2 we would need to set BINTEN[2] to 1 (BINTEN = 0x2). However, some banks and pins may be reserved or not pinned out on the device. For example for TDA4VM, banks [6:8] are not used for WKUP_GPIOu as pins [84:143] are not pinned out. It is important to note that when a banked interrupt is triggered, it will be triggered for the whole bank.

RTOS PDK running on Main and MCU R5 cores have support for banked interrupts as well as line interrupts. However, Linux running A72 only has support for banked interrupts within our TI SDK. Due to this, it is important to ensure you do NOT use the same banked interrupt for multiple cores or else you may see false interrupts occur. For example, using interrupts on GPIO0_0 for MCU R5 and GPIO0_1 for Main R5 will cause false interrupts as any interrupt on GPIO0_0 will trigger the entire GPIO_BANK0. Similarly, this can happen with A72 and MCU R5 as well.

The INTSTAT register can be used to determine whether or not an interrupt has occurred with 1 if an interrupt occurred and 0 if an interrupt has not occurred since the bit was last cleared. INTSTAT01 will reflect the pin where an interrupt has occurred where INTSTAT01[0:15] refer to bank 0 and INTSTAT01[16:31] refer to bank 1. For example, an interrupt on GPIO0_18 would set INTSTAT01=0x40000.

All interrupt routing is done through the WKUP_GPIOMUX_INTRTR and GPIOMUX_INTRTR which are dedicated mux routers. The routers have a number of input sources (ex. WKUP_GPIOMUX_INTRTR0_IN_x) that can be routed to an smaller number of interrupt output lines (ex. WKUP_GPIOMUX_INTRTR0_OUTP_x). In terms of TDA4VM, there are 84 input lines (WKUP_GPIOMUX_INTRTR0_IN_[0:83]) that are all sourced from respective various GPIO triggers (WKUP_GPIOu_[0:83]). Recall this is due to WKUP_GPIOu_[84:143] not being pinned out and therefore banks [6:8] are not used either. From banks [0:5], there are an additional 12 input lines sourced from each WKUP_GPIO0 and WKUP_GPIO1. The input lines 103 through 108 (WKUP_GPIOMUX_INTRTR0_IN_[103:108]) are the GPIO Bank Interrupts (1 interrupt per bank) from WKUP_GPIO0 and 112 through 117 (WKUP_GPIOMUX_INTRTR0_IN_[112:117]) for WKUP_GPIO1, with the other input lines reserved/unused.  For example, an interrupt on WKUP_GPIO0_60 you can either utilize WKUP_GPIOMUX_INTRTR0_IN_60 as a line interrupt or WKUP_GPIOMUX_INTRTR0_IN_106 as a bank interrupt. Then the input line can be routed to 32 interrupt output lines (WKUP_GPIOMUX_INTRTR0_OUTP_x) using a mux control register (WKUP_GPIOMUX_INTRTR0_MUXCNTL_n[0:6], n=0 to31). Finally, the output lines are routed to different processor cores as shown in the figure below. Further information about interrupt management and TISCI can be found here.