Tool/software:
Hi Support-Team,
I realized that when I'm connected e.g. to C66xdsp_1 having set-up a RAT that this is used by the CCS Memory Browser (View->Memory Browser).
But I also realized (strongly assume) that the CPU is "covered" by a Firewall (no write access) whereas the CCS Memory Browser isn't (memory modifications possible).
(TDA4VM: Write to 00A0 0004h from C66xx_0 not possible - Processors forum - Processors - TI E2E support forums)
Is there a document / explanation how the CCS (in general) handles "access" ?
Thanks in advance, Wolfgang
P.S.: Confused as there's Memory "local" to a core & memory not accessable by one core, how this is done "from outside" DAP port.