TDA4VM: Write to 00A0 0004h from C66xx_0 not possible

Part Number: TDA4VM

Tool/software:

Hi,

Tried to modify 00A0 0004h from C66xx_0.
Direct via:

*(unsigned int*)(0x00A00004) = 0x00010100;

(does not work)

and also via RAT:

HW_WR_REG32(0x60000004,0x12345678);

(does not work)

But: With RAT I can read the PID at 0x00A00000 to be 0x66948100.

I can modifiy the Address-Space (0x60000004) in Memory Browser of CCS !

I can read the modification made directly in Memory Browser of CCS with

Wolfgang = *(volatile unsigned int*)(0x60000004);

But I can't change the value from the CPU!

Any hints appreciated!

            Wolfgang

P.S.: RAT defined:

CSL_RatTranslationCfgInfo translationCfg4Test3PurposeOnly;
CSL_ratRegs* pGTCRatRegs4Test3PurposeOnly = reinterpret_cast<CSL_ratRegs*>(CSL_C66_COREPAC_C66_RATCFG_BASE);
translationCfg4Test3PurposeOnly.sizeInBytes = 0x200; 
translationCfg4Test3PurposeOnly.baseAddress = 0x60000000;
translationCfg4Test3PurposeOnly.translatedAddress = 0x00A00000; // GPIOMUX_INTRTR0_INTR_ROUTER_CFG
CSL_ratConfigRegionTranslation(pGTCRatRegs4Test3PurposeOnly, 4, &translationCfg4Test3PurposeOnly);

P.P.S.: I checked TSR and found CXM: 0 - hence, my code runs in "Supervisor mode".

P.P.P.S.: I'm aware that not all bits can be written at that target. Hence, above "0x12345678" will not be written.

  • Hello,

    Could I get some clarifications on what you are trying to achieve? From my understanding you are trying to write to an address within the A72 compute cluster space from the C66x core? 

    Based on the information you have provided I do have a few follow ups - 

    I can modifiy the Address-Space (0x60000004) in Memory Browser of CCS !

    Are you doing this from the C66x core or from the DAP port? 

    translationCfg4Test3PurposeOnly.translatedAddress = 0x00A00000; // GPIOMUX_INTRTR0_INTR_ROUTER_CFG

    Do note that this 0x00A00000 address maps to the ARMSS_RAT_REGION0 in the R5F memory map - not C66x

    Best,

    Asha

  • Hello Asha,

    Thanks for your reply. This is exactly the kind of hints I need as I seem not to understand the datasheets.

    1.) I wanted to route an Interrupt from a GPIO to the C66x core wholly from within code of the C66x core.
    To achieve that I thought I would need to program (and more) 
    a Register called 
    9.3.3.2.2 GPIOMUX_INTRTR0_MUXCNTL_n Register" within SPRUIL1B at address 00A0 0004h
    These register controls a multiplexer to control the "route" of a GPIO-Interrupt. According to SPRUIL1B it is in address 00A0 0004h (and up).

    2.) I realized that the Register has "magically vanished" in SPRUIL1C, which lead to the question:
    TDA4VM: GPIOMUX_INTRTR0_MUXCNTL vanished from SPRUIL1B (9.9.9.2.2) to SPRUIL1C. Intended or mistake? - Processors forum - Processors - TI E2E support forums

    3.) but still in SPRUIL1C the region GPIOMUX_INTRTR0_INTR_ROUTER_CFG starting at 0x00 00A0 0000 - 0x00 00A0 07FF (2kB) (page 126 SPRUILC - see picture other thread).

    4.) Focused on this "target" I failed to understand what is "hindering" me to reach the target.
    To be honest I still didn't understand your point (Data a ARMSS_RAT_REGION0 is also there...).

    5.) I'm connected to the TDA4 with a Blackhawk XDS560v2-USB System Trace Emulator.
    Hence, I assume the Memory Browser of CCS uses the Debug Access Port. (no other way, connected only to C66xx_0, CPU @int main(void) and/or halted)

    6.) When I configure the RAT within the C66xx_0 code I can "see" the 2kB Region in MEMORY BROWSER! I can see the PID and if I write something into the Memory using the Memory Browser (e.g. 0x12345678) it is truncated to the "allowed bits" according to the datasheet. Both let's me assume that I have access to where I want to have...

    7.) As above mentioned if I want to write to this location using RAT nothing can be seen within the memory browser.
    But I can read all the modifications I make using the memory browser from running code. This is what is a miracle to me...

    Any further hints/explanations greatly appreciated!

    Regards, Wolfgang

  • Hi Wolfgang,

    Okay, thank you for that context and linking your related thread. Let me confer with my colleagues on this and I'll get back to you on 7/17.

    Best,

    Asha