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Original question:

PROCESSOR-SDK-AM62X: DDR Tuning tools, issues with SDK not containing them. instruction unclear

PROCESSOR-SDK-AM62X: TEye failed to load using UART mode on 62x-evm. prebuilts load but not the TEye app

Jesse Kolstad
Prodigy 60 points
Part Number: PROCESSOR-SDK-AM62X
Other Parts Discussed in Thread: AM625

Tool/software:

these run fine no error or issue reported and i have output files:
node out2rprc/elf2rprc.js out2rprc/AM62X_TEye_A53_read.out
node multicoreImageGen/multicoreImageGen.js --devID 55 --out AM62X_TEye_A53_read_unsigned.appimage out2rprc/AM62X_TEye_A53_read.rprc@0

this loads the prebuilts fine but fails to load the part i made (AM62X_TEye_A53_read_unsigned.appimag).
ive tried a few to see if any work:

python3 uart_bootloader.py -p /dev/ttyUSB0  --bootloader=sbl_prebuilt/am62x-sk/sbl_uart.release.tiimage --file=sbl_prebuilt/am62x-sk/sbl_null.release.tiimage   --file=./AM62X_TEye_A53_read_unsigned.appimage
python3 uart_bootloader.py -p /dev/ttyUSB0 --bootloader=sbl_prebuilt/am62x-sk/sbl_uart.debug.hs_fs.tiimage --file=sbl_prebuilt/am62x-sk/sbl_null.debug.hs_fs.tiimage --file=./AM62X_TEye_A53_read_unsigned.appimage
python3 uart_bootloader.py -p /dev/ttyUSB0 --bootloader=sbl_prebuilt/am62x-sk/sbl_null.debug.hs_fs.tiimage --file=sbl_prebuilt/am62x-sk/sbl_null.debug.hs_fs.tiimage --file=./AM62X_TEye_A53_read_unsigned.appimage
python3 uart_bootloader.py -p /dev/ttyUSB0 --bootloader=sbl_prebuilt/am62x-sk/sbl_uart.release.hs_fs.tiimage --file=sbl_prebuilt/am62x-sk/sbl_null.release.hs_fs.tiimage --file=./AM62X_TEye_A53_read_unsigned.appimage

here is an example of output:

python3 uart_bootloader.py -p /dev/ttyUSB0 --bootloader=sbl_prebuilt/am62x-sk/sbl_uart.release.hs_fs.tiimage --file=sbl_prebuilt/am62x-sk/sbl_null.release.hs_fs.tiimage --file=./AM62X_TEye_A53_read_unsigned.appimage
Sending the UART bootloader sbl_prebuilt/am62x-sk/sbl_uart.release.hs_fs.tiimage ...
Sent bootloader sbl_prebuilt/am62x-sk/sbl_uart.release.hs_fs.tiimage of size 246584 bytes in 23.63s.

Sending the application ./AM62X_TEye_A53_read_unsigned.appimage ...
Sent application ./AM62X_TEye_A53_read_unsigned.appimage of size 227212 bytes in 24.8s.
[STATUS] ERROR: Application load FAILED !!!

  • 0
    TI__Mastermind 44476 points

    Hello Jesse,

    There could be multiple reasons this is happening.

    I would suggest you to firstly go ahead and the check the device type you are using, if it is a HS FS then you need to flash the images which has hs_fs in their suffix.

    You can check your device type by reading through this: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1228618/faq-am6xx-how-to-check-if-device-type-is-hs-se-hs-fs-or-gp?tisearch=e2e-sitesearch&keymatch=check%20device%20type#

    Apart from this you could club together all the files you want to flash into a config file and flash the same, by giving the flag --cfg=path to your config file

    Regards,

    Vaibhav

  • 0 in reply to Vaibhav Kumar
    Prodigy 60 points

    ok tool worked but it was a little different then your link showed.
    It needed to speak comm directly.

    Doing that was easy and resulted in identification.
    Here was my trace of that process:

    jeswsl2@usomca3392:.../mcu_plus_sdk_am62x_10_00_00_14/tools/boot/socid_parser $ python3 uart_boot_socid.py myunit.txt
    SoC type detector...

    Invalid port or port is busy!
    jeswsl2@usomca3392:.../mcu_plus_sdk_am62x_10_00_00_14/tools/boot/socid_parser $ python3 uart_boot_socid.py /dev/ttyUSB0
    SoC type detector...

    Detecting SoC...
    #

    SoC Detected!

    Please Reset the SoC.
    ######################################################################################################################################################################################################################################################################################################################################################################################################################
    SoC ID :
    b'02000000011a0000616d3632780000000000000048534653010001000100010002a6000000000000d68ecb2c055dff11ade95bd927e837d2a53bc23b0a2800cebce4f106bcf309df2213912d77a157a8b7c2df40672a06a918034aa4c7d603e462481475225d49b8ad0bc40b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000daa105da89bed27e7c854268106c74945b0b1dfded37e185738fa74d14774f48'

    -----------------------
    SoC ID Header Info:
    -----------------------
    NumBlocks :2
    -----------------------
    SoC ID Public ROM Info:
    -----------------------
    SubBlockId :1
    SubBlockSize :26
    DeviceName :am62x
    DeviceType :HSFS
    DMSC ROM Version :[0, 1, 0, 1]
    R5 ROM Version :[0, 1, 0, 1]

    -----------------------
    SoC ID Secure ROM Info:
    -----------------------
    Sec SubBlockId :2
    Sec SubBlockSize :166
    Sec Prime :0
    Sec Key Revision :0
    Sec Key Count :0
    Sec TI MPK Hash :d68ecb2c055dff11ade95bd927e837d2a53bc23b0a2800cebce4f106bcf309df2213912d77a157a8b7c2df40672a06a918034aa4c7d603e462481475225d49b8
    Sec Cust MPK Hash :ad0bc40b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
    Sec Unique ID :daa105da89bed27e7c854268106c74945b0b1dfded37e185738fa74d14774f48

  • 0 in reply to Vaibhav Kumar
    Prodigy 60 points

    could you elaborate on this:

    'Apart from this you could club together all the files you want to flash into a config file and flash the same, by giving the flag --cfg=path to your config file'

    what tools are you calling into with which args? im new to these tool chains from TI.
    Thanks.

  • 0 in reply to Vaibhav Kumar
    Prodigy 60 points

    my new custom cfg file (1jjk.cfg)
    --bootloader=sbl_prebuilt/am62x-sk/sbl_uart.release.hs_fs.tiimage
    --file=sbl_prebuilt/am62x-sk/sbl_null.release.hs_fs.tiimage
    --file=AM62X_TEye_A53_read_unsigned.appimage


    my command line

    python3 uart_bootloader.py -p /dev/ttyUSB0 --cfg=sbl_prebuilt/am62x-sk/1jjk.cfg ; minicom -D /dev/ttyUSB0

    my result

    Welcome to minicom 2.8

    OPTIONS: I18n
    Port /dev/ttyUSB0, 08:12:08

    Press CTRL-A Z for help on special keys

    ��LIAF��LIAF��LIAF��LIAF��LIAF��LIAF��LIAF��LIAF��LIAF��LIAF��LIAF��LIAF�CCC


    my result without minicom

    Parsing config file ...
    Parsing config file ... SUCCESS. Found 3 command(s) !!!

    Executing command 1 of 3 ...
    Found the UART bootloader ... sending sbl_prebuilt/am62x-sk/sbl_uart.release.hs_fs.tiimage
    Sent bootloader sbl_prebuilt/am62x-sk/sbl_uart.release.hs_fs.tiimage of size 246584 bytes in 24.9s.
    Executing command 2 of 3 ...
    Command arguments : --file=sbl_prebuilt/am62x-sk/sbl_null.release.hs_fs.tiimage
    Sending sbl_prebuilt/am62x-sk/sbl_null.release.hs_fs.tiimage: 293282bytes [00:30, 10726.82bytes/s]error_count reached 16, aborting.
    Sending sbl_prebuilt/am62x-sk/sbl_null.release.hs_fs.tiimage: 293284bytes [00:30, 10726.82bytes/s]
    [ERROR] XMODEM recv failed, no response OR incorrect response from EVM OR cancelled by user,
    Power cycle EVM and run this script again !!!

    removing file2
    cfg file (1jjk.cfg)
    --bootloader=sbl_prebuilt/am62x-sk/sbl_uart.release.hs_fs.tiimage
    --file=AM62X_TEye_A53_read_unsigned.appimage

    Result

    Parsing config file ...
    Parsing config file ... SUCCESS. Found 2 command(s) !!!

    Executing command 1 of 2 ...
    Found the UART bootloader ... sending sbl_prebuilt/am62x-sk/sbl_uart.release.hs_fs.tiimage
    Sending sbl_prebuilt/am62x-sk/sbl_uart.release.hs_fs.tiimage: 0%| | 0/246584 [00:00<?, ?bytes/s]send error: expected NAK, CRC, EOT or CAN; got b'\x00'
    Sent bootloader sbl_prebuilt/am62x-sk/sbl_uart.release.hs_fs.tiimage of size 246584 bytes in 23.15s.
    Executing command 2 of 2 ...
    Command arguments : --file=AM62X_TEye_A53_read_unsigned.appimage
    Sent AM62X_TEye_A53_read_unsigned.appimage of size 227212 bytes in 24.8s.
    [STATUS] ERROR: Application load FAILED !!!


    Sent End Of File Transfer message of size 4 bytes in 3.09s.

    All commands from config file are executed !!!

     result with minicom

    Welcome to minicom 2.8

    OPTIONS: I18n
    Port /dev/ttyUSB0, 08:18:48

    Press CTRL-A Z for help on special keys

    Some tests have failed!!

     

    i re-downloaded the Teye from  AM625 site -> Software Development -> DDR-MARGIN-FW -> AM62x DDR Margin Firmware.
    and recreated the appimage again but same failure.

    not sure how this is supposed to work :(

  • 0 in reply to Jesse Kolstad
    TI__Expert 5415 points

    Greetings Jesse,

    Are you using an AM62-SK-LP or AM62-SK board? The tool only supports LPDDR4, so you will need an AM62-SK-LP to evaluate the tool. It will exit early on a board that has DDR4 (though your errors appear to be before the tool even runs).

    For an AM62-SK-LP board, try this:

    1) Your board looks like an HS-FS device, which will require you to sign the application image. This is not unique to the tool, any application for an HS-FS device will need to be signed (and note that the images in the SDK are the "hs_fs" versions that are signed). You can do so like this from the tools/boot directory:

    python ./signing/appimage_x509_cert_gen.py --bin AM62X_TEye_A53_read_unsigned.appimage --authtype 0 --loadaddr 84000000 --key signing/app_degenerateKey.pem --keyversion 1.5 --output AM62X_TEye_A53_read_signed_authtype0.appimage

    For reference, these details are in the documentation: https://software-dl.ti.com/mcu-plus-sdk/esd/AM62X/10_00_00_14/exports/docs/api_guide_am62x/TOOLS_BOOT.html#TOOLS_BOOT_SIGNING 

    2) Make a cfg file called "eye_tool_load.cfg" under sbl_prebuilt/am62x-sk-lp:

    # First point to sbl_uart binary, which function's as a server to receive application images of other cores through uart
--bootloader=sbl_prebuilt/am62x-sk-lp/sbl_uart.release.hs_fs.tiimage

# This is example appimage which will be loaded to the M4 core
--file=../../examples/hello_world/am62x-sk-lp/m4fss0-0_nortos/ti-arm-clang/hello_world.release.appimage.hs_fs

# This is example appimage which will be loaded to the a53 core
--file=AM62X_TEye_A53_read_signed_authtype0.appimage

    This is based off the "default_sbl_uart_hs_fs.cfg" file. The cfg above is loading the UART bootloader, a hello world to the M4, and then the eye tool to the A53.

    3) Run the uart bootloader python script:

    python3 uart_bootloader.py -p /dev/ttyUSB0 --cfg=sbl_prebuilt/am62x-sk-lp/eye_tool_load.cfg

    This should boot the tool on an AM62-SK-LP board. 

    Sincerely,

    Lucas

  • 0 in reply to Lucas Bowe
    Prodigy 60 points

    well id love to be more happy. you resolved my loading issue by signing the appimage. 
    although i see no output in comm from the tool whether its mad or what. just silent but saying it was successfully loaded. so that's a win. 
    but unfortunately this is an SK and our product will be DDR4 not LPDDR4.

    I'm really trying to put together DDR validation and settings generation tools and there seems to not be any TI solution as of yet i can find. which puts us in real jeopardy for board bring up and how long that will take. sure it may go ok with estimates but if i cannot generate eye diagrams to verify centering and widening of settings its all just a guess. not comforting.

    can i get the sources to the Teye app, maybe i can hotwire things in there to make due with something. it seems you have a basis for what i would need to write from scratch?

  • 0 in reply to Jesse Kolstad
    TI__Expert 5415 points

    Hey Jesse,

    Unfortunately we do not release the source for this tool and that will not change. For context, it is not simple to add DDR4 support and not possible to easily tweak anything to do so, the DDR IP works differently for DDR4 vs. LPDDR4.

    To your greater concern, we do have some resources and information for DDR settings generation and design guidelines. Have you seen the below links?

    AM62x DDR Design Guidelines: https://www.ti.com/lit/pdf/sprad06 

    AM62x DDR Configuration Tool: https://dev.ti.com/sysconfig/?product=Processor_DDR_Config&device=AM62x 

    The DDR Configuration Tool in particular will be of interest for you I think, as any parameters unique to your memory can be tweaked here and then a configuration will be generated for you. 

    Last thing I can think of, have you performed board-level simulations? I am not an expert or familiar at all on that topic, but I have seen customers do simulations using the model of the board, processor, and DRAM to analyze signal integrity. 

    Sincerely,

    Lucas

  • 0 in reply to Lucas Bowe
    Prodigy 60 points

    we have some level of layout simulation. id need to run that by the layout board guys to get what tool it is. but its pretty involved. 
    i have DDR3 and LPDDR4 experience but no DDR4 experience so not sure what I'm going to encounter here.
    simulation is only as good as the data input which i never trust to be reality. i want good validation of integrity and that we are centered in the settings no matter what the simulation might have gave us. That is the part that feels weird to me to have no path to get to.

    Thanks for responding.