SK-AM64B: MSRAM memory relocation

Hi Yoshiki Koide,

I will check on this and get back.

Ping me back if you do not get a response by next week.

Regards

Ashwani

Hi Yoshiki Koide,

Yoshiki said:

{SDK installation folder}\examples\networking\enet_loopback\enet_cpsw_loopback

Can you confirm it is working fine if you build and load from installation path  ?

Meanwhile, I am following your steps to reproduce the issue on my setup.

Regards

Ashwani

Yoshiki said:

clear FlashMemory.

How are you performing this ?

Regards

Ashwani

Hello Ashwani,

I looked into e2e.

My PC serial port number was COM7.
python .\uart_uniflash.py --flash-writer=.\sbl_prebuilt\am64x-sk\sbl_uart_uniflash.release.hs_fs.tiimage -p COM7 --operation=erase --flash-offset=0 --erase-size=0x380000

Regards,
Yoshiki

Hello Ashwani,

{SDK install folder}\examples\networking\enet_loopback\enet_cpsw_loopback
"Can you confirm it is working fine if you build and load from installation path ?"

Yes!
  import                     OK
  build                      OK
  python .\uart_uniflash.py  OK
  power on                   OK

The following logs were run without modifying example.syscfg.
The start address is 0x70080000.

  Memory Configurator > Memory Region > MSRAM

    start address  0x70080000
    region size    0x110000

I ran an External PHY loopback.

0: Internal MAC loopback
1: External PHY loopback

Enter option: 1
=============================
Enet Loopback: Iteration 1
=============================
CPSW_3G Test
Enabling clocks!
EnetAppUtils_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:1 From 4 To 2
Mdio_open: MDIO Manual_Mode enabled
EnetPhy_bindDriver: PHY 0: OUI:080028 Model:23 Ver:01 <-> 'dp83867' : OK
PHY 0 is alive
PHY 1 is alive
initQs() txFreePktInfoQ initialized with 16 pkts
Cpsw_handleLinkUp: Port 1: Link up: 100-Mbps Full-Duplex
Transmitted 5000 packets
Delete EnetApp_txTask() and exit..

Regards

Yoshiki

Thanks Yoshiki,

You can see memory usage details in "enet_cpsw_loopback_mac_end.Debug.map" file.

Yoshiki said:

The following logs were run without modifying example.syscfg.
The start address is 0x70080000.

I am assuming you did not clear flash this time before loading application. correct?

Now, can you confirm, If you do not clear FLASH before loading application, SDK example with MSRAM memory changes is working or not?

Yoshiki said:

python .\uart_uniflash.py --flash-writer=.\sbl_prebuilt\am64x-sk\sbl_uart_uniflash.release.hs_fs.tiimage -p COM7 --operation=erase --flash-offset=0 --erase-size=0x380000

Another doubt, as per sycfg FLASH size is 0x80000. Then, why the clearing size of "0x380000" ?

Regards

Ashwani

Hello Ashwani,

"I am assuming you did not clear flash this time before loading application. correct?"

No

I did this to verify that if the starting address is 0x7008 0000, it will exit successfully.

  Memory Configurator > Memory Region > MSRAM
    start address  0x70080000
    region size    0x110000

If the start address is 0x700C0000, the program terminates abnormally.

  Memory Configurator > Memory Region > MSRAM
    start address  0x70080000 => 0x700C0000
    region size    0x110000

"Now, can you confirm, If you do not clear FLASH before loading application, SDK example with MSRAM memory changes is working or not?"

If I do not clear FLASH, it tries to run the application that is still at 0x70080000.
I believe that FLASH clear is required to run the application at 0x700C0000.

"Another doubt, as per sycfg FLASH size is 0x80000. Then, why the clearing size of "0x380000" ?"

I often use the IPC notify echo application.
I want to clear all areas, so the starting address is 0x0000 0000 and the size is 0x3800000.
Whenever I clear FLASH, I always clear 0x380000bytes.

Regards,

Yoshiki

Yoshiki said:

The following logs were run without modifying example.syscfg.
The start address is 0x70080000.

What I quickly tried is: import, build and load out of box sdk example on AM64x-SK board with default MSRAM settings using CCS.

Then, I modified starting address of MSRAM in sysconfig then re-build and load application using CCS.

It is working correctly.

There may be some other dependency causing crash on your side.

Can you me with overall system test flow? May be it help me to help you provide some clue.

Regards

Ashwani

Hello Ashwani,

 > "There may be some other dependency causing crash on your side."

I use the EMPTY project.

When I use empty project, it crashes.
I imported source files and syscfg from the SDK installation folder.
Why does it crash when I use an empty project?

 1.Import empty_am64x-sk_r5fss0-0_freertos_ti-arm-clang

 2.Copy example.syscfg
  Copied from: {SDK installation folder}\examples\networking\enet_loopback\enet_cpsw_loopback\am64x-sk\r5fss0-0_freertos\example.syscfg
  Copy to:My project folder

 3.Modify example.syscfg

  Memory Configurator > Memory Region > MSRAM

    start address0x70080000 => 0x700C0000
    region size0x110000

 4.Copy the enet_cpsw_loopback application source files from the SDK installation folder

  loopback_cfg.c
  loopback_main.c
  loopback_test.c
  loopback_common.h
  loopback_cfg.h

  Copied from: {SDK installation folder}\examples\networking\enet_loopback\enet_cpsw_loopback
  Copy to:My project folder

 5.Modified CCS project settings (added include path, etc.)

 6.Clear FlashMemory => r5f 0-1 cores only

Regards,

Yoshiki

Yoshiki said:

Why does it crash when I use an empty project?

It may be some dependency are missing.

I am assuming you are able to run 2-6 steps by importing {SDK installation folder}\examples\networking\enet_loopback\enet_cpsw_loopback\am64x-sk\r5fss0-0_freertos\ project.

Can you start from here instead of empty project?

Regards

Ashwani

Hello Ashwani,

"Can you start from here instead of empty project?"
I have finished verifying that the SAMPLE code works.

My next goal is to check the operation of enet_cpsw_loopback on a custom board.
On the custom board, it works with R5F0-1 core.
We will check the operation with a different memory arrangement than SK-AM64B.

We are considering two steps to check the operation of the memory placement.
One is MSRAM and the other is DDR.

DDR e2e is here.
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1404218/sk-am64b-how-do-i-run-ddr-applications

When I run the enet_cpsw_loopback application with DDR, it terminates abnormally.
The same error occurs.
hCpsw->hRxRsvdFlow ! = NULL
Could this be due to the same cause?

Below are the error messages.

EnetUdma_openRxCh:
EnetHostPortDma_open:
Cpsw_openInterval:
These are failing.

I have checked the syscfg.
The syscfg has Enet(CPSW) and DMA channel config definitions.
If I change the memory allocation, do I need to modify these definitions?
I don't see any configuration items in syscfg, so I don't know.

Regards

Yoshiki

Yoshiki said:

When I run the enet_cpsw_loopback application with DDR, it terminates abnormally

Do you mean if memory placement is MSRAM, code works perfectly?

Yoshiki said:

Below are the error messages.

As per log, may be CPSW Rx DMA channel is either not assigned to particular core or busy.

Please refer AM64x MCU+ SDK: Modifying resource allocation and check your setup.

Yoshiki said:

We will check the operation with a different memory arrangement than SK-AM64B.

Can you help us with more granular steps following here?

Regards

Ashwani

Hello Ashwani

Thank you very much.

> "Do you mean if memory placement is MSRAM, code works perfectly?"

No, both MSRAM and DDR have errors.

> "As per log, may be CPSW Rx DMA channel is either not assigned to particular core or busy."

not assigned???
busy???

I see.
My empty project should be the same as the sample code except for the address. That's strange.
I will check the url.
Thanks.

> "Can you help us with more granular steps following here?"

I am now checking with SK-AM64B.
I do not have a custom board yet; I am trying to change the memory placement on the SK-AM64B.
I am trying to change the memory placement on the SK-AM64B first.

My empty project should be the same as the sample code except for the address.
I want to solve this strange error .
I will check the url .

"not assigned" to particular core or busy."
I will look into why this error occurs.
Thanks.

I will post the results here.

Regards

Yoshiki

Hello Ashwani

hCpsw->hRxRsvdFlow != NULL

I am having trouble with this error.
Someone else is suffering from the same error as me.
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1097991/sk-am64-ethernet-access-from-freertos/4081226#4081226

Would following the URL below solve the problem?
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1216936/faq-processor-sdk-am64x-enet-layer-2-cpsw-example-not-working-on-am64x-mcu-sdk-08-05-00-24

{SDK install folder}\source\networking\.meta\enet_cpsw\templates\am64x_am243x\enet_soc_cfg.c.xdt

numMacAddress has not yet been corrected to 3.
I do not know how to build the SDK. I asked the question yesterday on e2e.
I'll try <gmake -s -C *** all>.

I still have questions.
I will do some more research and post back.

There is no enet_cpsw_loopback_mac_end sample in the mcu_plus_sdk_am64x_09_02_01_05 folder.
I think you have the wrong SDK version.
Please let us know the version.

Regards

Yoshiki

Hi Yoshiki-san,

Yoshiki said:

There is no enet_cpsw_loopback_mac_end sample in the mcu_plus_sdk_am64x_09_02_01_05 folder.

I tried things on latest SDK MCU-PLUS-SDK-AM64X Software development kit (SDK) | TI.com

Today, Itried with SDK 9.2 SDK example for R5F-0_0.

MSRAM region change to "0x700C0000" and size "0x110000".

It give no error. 

It seems to me a resource allocation problem for another core of R5F.

Yoshiki said:

I do not know how to build the SDK. I asked the question yesterday on e2e.

You can refer makefile presnt in  {SDK install folder} = C:\ti\mcu_plus_sdk_am64x_09_02_01_05

Regards

Ashwani

> "It give no error. "

Why??

Because it is working fine on my setup.

Ashwani Goel said:

Itried with SDK 9.2 SDK example for R5F-0_0.

Please review my steps and let me know if you have any query?

Ashwani Goel said:

It seems to me a resource allocation problem for another core of R5F.

Regards

Ashwani