J784S4XEVM: Debug console on wkup_uart0

Part Number: J784S4XEVM

Tool/software:

Hello TI experts,

I am working to prototype using wkup_uart0 as the "serial" debug console on a J784S4XEVM board.  I am trying to make this work with the ti-u-boot release 10.00.08.  I am aware, and have significantly utilized, the details documented here:

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1348834/processor-sdk-j784s4-main-uart-receiving-rx-not-working

However, ti-u-boot 10.00.08 is based on u-boot 2024.04, while the version used in the above link (09.01.00.06) is based on u-boot 2023.04.  Most of the modifications to u-boot in the above link do not appear to have a direct correlation in the newer u-boot (probably due to the fact that between 2023.04 and 2024.04 upstream u-boot incorporated basic j784s4 support natively).

I have been unable to get this newer version to operate successfully with wkup_uart0.  With the default configuration using main_uart8, I am able to build and u-boot as expected.  Here are the details of what I am building with:

ti-linux-firmware: commit 35fa44a93549d8d91b1c37a7b9f8767dbe7d37eb (tag: 10.00.08)
optee_os: commit 1c0d52ace3c237ca6276cafb5c73f699a75c1d40 (tag: 4.3.0)
trusted-firmware-a: commit f2735ebccf5173f74c0458736ec526276106097e (tag: v2.11.0, tag: v2.11)
ti-u-boot: commit 818c76aed67f94059b9ebb94d237418802620b81 (tag: 10.00.08)

With the repositories at these commits, my build works as desired on main_uart8.

The following changes are what I am currently applying to attempt to make this build work with wkup_uart0 instead:

For trusted-firmware-a, the following patch is applied:

diff --git a/plat/ti/k3/include/platform_def.h b/plat/ti/k3/include/platform_def.h
index a2cc62d34..d008169c5 100644
--- a/plat/ti/k3/include/platform_def.h
+++ b/plat/ti/k3/include/platform_def.h
@@ -105,14 +105,14 @@
 
 /* Platform default console definitions */
 #ifndef K3_USART_BASE
-#define K3_USART_BASE			(0x02800000 + 0x10000 * K3_USART)
+#define K3_USART_BASE			(0x42300000 + 0x10000 * K3_USART)
 #endif
 
 /* USART has a default size for address space */
 #define K3_USART_SIZE 0x1000
 
 #ifndef K3_USART_CLK_SPEED
-#define K3_USART_CLK_SPEED 48000000
+#define K3_USART_CLK_SPEED 96000000
 #endif
 
 /* Crash console defaults */

For optee_os, the following patch is applied:

diff --git a/core/arch/arm/plat-k3/platform_config.h b/core/arch/arm/plat-k3/platform_config.h
index cffca0a07..0467cdad8 100644
--- a/core/arch/arm/plat-k3/platform_config.h
+++ b/core/arch/arm/plat-k3/platform_config.h
@@ -11,7 +11,7 @@
 
 #define UART0_BASE      0x02800000
 
-#define CONSOLE_UART_BASE       (UART0_BASE + CFG_CONSOLE_UART * 0x10000)
+#define CONSOLE_UART_BASE       (0x42300000 + CFG_CONSOLE_UART * 0x10000)
 #define CONSOLE_BAUDRATE        115200
 #define CONSOLE_UART_CLK_IN_HZ  48000000
 

For ti-u-boot, the following patch is applied:

diff --git a/arch/arm/dts/k3-j784s4-evm.dts b/arch/arm/dts/k3-j784s4-evm.dts
index afd84a6dfa..4a0cd38752 100644
--- a/arch/arm/dts/k3-j784s4-evm.dts
+++ b/arch/arm/dts/k3-j784s4-evm.dts
@@ -20,9 +20,9 @@
 	};
 
 	aliases {
-		serial0 = &wkup_uart0;
+		serial0 = &main_uart8;
 		serial1 = &mcu_uart0;
-		serial2 = &main_uart8;
+		serial2 = &wkup_uart0;
 		mmc0 = &main_sdhci0;
 		mmc1 = &main_sdhci1;
 		i2c0 = &wkup_i2c0;
@@ -670,10 +670,12 @@
 };
 
 &wkup_uart0 {
-	/* Firmware usage */
-	status = "reserved";
+	/* Debug UART */
+	bootph-all;
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&wkup_uart0_pins_default>;
+	clock-frequency = <96000000>;
 };
 
 &wkup_i2c0 {
diff --git a/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi b/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
index d580f9e948..61cb449fe7 100644
--- a/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
@@ -305,10 +305,6 @@
 		reg = <0x00 0x42300000 0x00 0x200>;
 		interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
 		current-speed = <115200>;
-		clocks = <&k3_clks 397 0>;
-		clock-names = "fclk";
-		power-domains = <&k3_pds 397 TI_SCI_PD_EXCLUSIVE>;
-		status = "disabled";
 	};
 
 	mcu_uart0: serial@40a00000 {
diff --git a/board/ti/j784s4/j784s4.env b/board/ti/j784s4/j784s4.env
index 09d41a7871..56b0fdfbb0 100644
--- a/board/ti/j784s4/j784s4.env
+++ b/board/ti/j784s4/j784s4.env
@@ -10,7 +10,7 @@
 
 name_kern=Image
 console=ttyS2,115200n8
-args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02880000
+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x42300000
 	${mtdparts}
 run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
 

With the above patches applied, as expected I get no output on main_uart8.  I do get the following on wkup_uart0:

U-Boot SPL 2024.04-00001-gf84f61eab5 (Sep 11 2024 - 10:51:07 -0500)
ti_power_domain_probe(dev=41c661b8)

But, then it stops.

I have tried various other changes to the devicetree files for the uart configurations, but none seems to make a difference, I can't seem to get past this point.  There is a comment in k3-j784s4-r5.dtsi above the wkup_uart0 configuration that says "WKUP UART0 is used for DM firmware logs".  Does the device management firmware for the r5 core need to be changed to support this?

Any direction on how to make this work will be greatly appreciated.

  • Hi,

    Here is a patch that was done for J7200. Similar approach can be followed for j784s4:

    From dbe966867e09d0700423ffa37b04d121e97f8cce Mon Sep 17 00:00:00 2001
    From: Keerthy <j-keerthy@ti.com>
    Date: Sat, 15 Jun 2024 09:24:09 +0530
    Subject: [PATCH] arch/arm/dts/k3-j7200.dtsi: Switch console to WKUP_UART (9.2
     SDK base)
    
    ---
     arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi | 6 +++++-
     arch/arm/dts/k3-j7200-common-proc-board.dts         | 6 +++---
     arch/arm/dts/k3-j7200-mcu-wakeup.dtsi               | 3 ++-
     arch/arm/dts/k3-j7200-r5-common-proc-board.dts      | 6 +++++-
     arch/arm/dts/k3-j7200.dtsi                          | 4 ++--
     board/ti/j721e/j721e.env                            | 4 ++--
     6 files changed, 19 insertions(+), 10 deletions(-)
    
    diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
    index 3d1b6e45..5f8c821f 100644
    --- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
    +++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
    @@ -7,7 +7,7 @@
     
     / {
     	chosen {
    -		stdout-path = "serial2:115200n8";
    +		stdout-path = "serial1:115200n8";
     		tick-timer = &timer1;
     	};
     
    @@ -108,6 +108,10 @@
     	bootph-pre-ram;
     };
     
    +&wkup_uart0 {
    +	bootph-pre-ram;
    +};
    +
     &mcu_uart0 {
     	bootph-pre-ram;
     };
    diff --git a/arch/arm/dts/k3-j7200-common-proc-board.dts b/arch/arm/dts/k3-j7200-common-proc-board.dts
    index f0a2ea6f..57b17704 100644
    --- a/arch/arm/dts/k3-j7200-common-proc-board.dts
    +++ b/arch/arm/dts/k3-j7200-common-proc-board.dts
    @@ -13,8 +13,8 @@
     
     / {
     	chosen {
    -		stdout-path = "serial2:115200n8";
    -		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
    +		stdout-path = "serial1:115200n8";
    +		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x42300000";
     	};
     
     	evm_12v0: fixedregulator-evm12v0 {
    @@ -153,7 +153,7 @@
     
     &wkup_uart0 {
     	/* Wakeup UART is used by System firmware */
    -	status = "reserved";
    +	status = "okay";
     };
     
     &main_uart0 {
    diff --git a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
    index 54581734..d71203e0 100644
    --- a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
    +++ b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
    @@ -74,11 +74,12 @@
     		compatible = "ti,j721e-uart", "ti,am654-uart";
     		reg = <0x00 0x42300000 0x00 0x100>;
     		interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
    -		clock-frequency = <48000000>;
     		current-speed = <115200>;
     		power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
     		clocks = <&k3_clks 287 2>;
     		clock-names = "fclk";
    +		status = "okay";
    +		clock-frequency = <96000000>;
     	};
     
     	mcu_uart0: serial@40a00000 {
    diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
    index 2e1c26d6..6f554b2a 100644
    --- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
    +++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
    @@ -16,7 +16,7 @@
     	};
     
     	chosen {
    -		stdout-path = &main_uart0;
    +		stdout-path = &wkup_uart0;
     		tick-timer = &timer1;
     		firmware-loader = &fs_loader0;
     	};
    @@ -189,6 +189,10 @@
     	pinctrl-names = "default";
     	pinctrl-0 = <&wkup_uart0_pins_default>;
     	status = "okay";
    +	/delete-property/ power-domains;
    +	/delete-property/ clocks;
    +	/delete-property/ clock-names;
    +	clock-frequency = <96000000>;
     };
     
     &mcu_uart0 {
    diff --git a/arch/arm/dts/k3-j7200.dtsi b/arch/arm/dts/k3-j7200.dtsi
    index 9252d973..37d9f6a9 100644
    --- a/arch/arm/dts/k3-j7200.dtsi
    +++ b/arch/arm/dts/k3-j7200.dtsi
    @@ -18,8 +18,8 @@
     	#size-cells = <2>;
     
     	aliases {
    -		serial0 = &wkup_uart0;
    -		serial1 = &mcu_uart0;
    +		serial1 = &wkup_uart0;
    +		serial0 = &mcu_uart0;
     		serial2 = &main_uart0;
     		serial3 = &main_uart1;
     		serial4 = &main_uart2;
    diff --git a/board/ti/j721e/j721e.env b/board/ti/j721e/j721e.env
    index 8edbdd7a..e191fe54 100644
    --- a/board/ti/j721e/j721e.env
    +++ b/board/ti/j721e/j721e.env
    @@ -25,8 +25,8 @@ findfdt=
     		setenv name_fdt ti/k3-j721e-sk.dtb; fi;
     	setenv fdtfile ${name_fdt}
     name_kern=Image
    -console=ttyS2,115200n8
    -args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000
    +console=ttyS1,115200n8
    +args_all=setenv optargs earlycon=ns16550a,mmio32,0x42300000
     	${mtdparts}
     run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
     
    -- 
    2.17.1
    
    

    - Keerthy

  • Hi Keerthy,

    Thank you for taking time to respond to my question.

    As I had mentioned previously, my difficulty is making ti-u-boot 10.00.08 work with this change.

    I looked through the patch you proposed for the 09.02 series, and the only discernible difference I could find was to change it from what I listed above with this additional patch:

    diff --git a/arch/arm/dts/k3-j784s4-evm.dts b/arch/arm/dts/k3-j784s4-evm.dts
    index 4a0cd38752..8d587a873c 100644
    --- a/arch/arm/dts/k3-j784s4-evm.dts
    +++ b/arch/arm/dts/k3-j784s4-evm.dts
    @@ -675,6 +675,9 @@
            status = "okay";
            pinctrl-names = "default";
            pinctrl-0 = <&wkup_uart0_pins_default>;
    +       /delete-property/ power-domains;
    +       /delete-property/ clocks;
    +       /delete-property/ clock-names;
            clock-frequency = <96000000>;
     };
     
    diff --git a/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi b/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
    index 61cb449fe7..cbbfa461a6 100644
    --- a/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
    +++ b/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
    @@ -305,6 +305,8 @@
                    reg = <0x00 0x42300000 0x00 0x200>;
                    interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
                    current-speed = <115200>;
    +               status = "okay";
    +               clock-frequency = <96000000>;
            };
     
            mcu_uart0: serial@40a00000 {
    

    However, even with this change, I still get the same behavior, where the boot process hangs after the ti_power_domain_probe(dev=41c661b8) output.

  • Hi,

    Let me try out on the EVM with 10.0 SDK myself and get back to you in a couple of days.

    Best regards,

    Keerthy 

  • Hi,

    I have reproduced the issue on 10.0 SDK. I will flag this internally. That said I went back on release to 9.2 SDK.

    www.ti.com/.../09.02.00.05

    Code changes:

    diff --git a/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi b/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi
    index 965aeed6..3677f5f3 100644
    --- a/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi
    +++ b/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi
    @@ -7,7 +7,7 @@
     
     / {
            chosen {
    -               stdout-path = "serial2:115200n8";
    +               stdout-path = "serial0:115200n8";
                    tick-timer = &timer1;
            };
     
    diff --git a/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi b/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
    index ac63266e..d81c6d7e 100644
    --- a/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
    +++ b/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
    @@ -117,7 +117,7 @@
                    clocks = <&k3_clks 397 0>;
                    clock-names = "fclk";
                    power-domains = <&k3_pds 397 TI_SCI_PD_EXCLUSIVE>;
    -               status = "disabled";
    +               status = "okay";
            };
     
            mcu_uart0: serial@40a00000 {
    diff --git a/arch/arm/dts/k3-j784s4-r5-evm.dts b/arch/arm/dts/k3-j784s4-r5-evm.dts
    index 269f227f..54cf4ca3 100644
    --- a/arch/arm/dts/k3-j784s4-r5-evm.dts
    +++ b/arch/arm/dts/k3-j784s4-r5-evm.dts
    @@ -13,7 +13,7 @@
     / {
            chosen {
                    firmware-loader = &fs_loader0;
    -               stdout-path = &main_uart8;
    +               stdout-path = &wkup_uart0;
                    tick-timer = &timer1;
            };
     
    @@ -131,6 +131,16 @@
                            J784S4_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
                    >;
            };
    +
    +       wkup_uart0_pins_default: wkup-uart0-pins-default {
    +               bootph-pre-ram;
    +               pinctrl-single,pins = <
    +                       J784S4_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (E25) WKUP_UART0_CTSn */
    +                       J784S4_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (F28) WKUP_UART0_RTSn */
    +                       J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */
    +                       J784S4_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (K34) WKUP_UART0_TXD */
    +               >;
    +       };
     };
     
     &sms {
    @@ -146,6 +156,10 @@
            status = "okay";
            pinctrl-names = "default";
            pinctrl-0 = <&wkup_uart0_pins_default>;
    +       /delete-property/ power-domains;
    +       /delete-property/ clocks;
    +       /delete-property/ clock-names;
    +       clock-frequency = <96000000>;
     };
     
     &mcu_uart0 {
    

    Logs on WKUP_UART0:

    U-Boot SPL 2023.04-dirty (Sep 12 2024 - 22:55:19 +0530)
    ti_power_domain_probe(dev=41c661b8)
    ti_i2c_eeprom_am6_get: Ignoring record id 255
    ti_i2c_eeprom_am6_get: Ignoring record id 255
    ti_i2c_eeprom_am6_get: Ignoring record id 255
    ti_i2c_eeprom_am6_get: Ignoring record id 255
    ti_i2c_eeprom_am6_get: Ignoring record id 255
    ti_i2c_eeprom_am6_get: Ignoring record id 255
    ti_i2c_eeprom_am6_get: Ignoring record id 255
    ti_i2c_eeprom_am6_get: Ignoring record id 255
    ti_i2c_eeprom_am6_get: Ignoring record id 255
    ti_i2c_eeprom_am6_get: Ignoring record id 255
    clk_register: failed to get  device (parent of osc_27_mhz)
    clk_register: failed to get  device (parent of osc_26_mhz)
    clk_register: failed to get  device (parent of osc_25_mhz)
    clk_register: failed to get  device (parent of osc_24_mhz)
    clk_register: failed to get  device (parent of osc_20_mhz)
    clk_register: failed to get  device (parent of osc_19_2_mhz)
    clk_register: failed to get  device (parent of board_0_hfosc1_clk_out)
    clk_register: failed to get  device (parent of board_0_mcu_ospi0_dqs_out)
    clk_register: failed to get  device (parent of board_0_mcu_ospi1_dqs_out)
    clk_register: failed to get  device (parent of board_0_wkup_i2c0_scl_out)
    clk_register: failed to get  device (parent of fss_mcu_0_hyperbus1p0_0_hpb_out_clk_n)
    clk_register: failed to get  device (parent of fss_mcu_0_hyperbus1p0_0_hpb_out_clk_p)
    clk_register: failed to get  device (parent of fss_mcu_0_ospi_0_ospi_oclk_clk)
    clk_register: failed to get  device (parent of fss_mcu_0_ospi_1_ospi_oclk_clk)
    clk_register: failed to get  device (parent of j7am_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk)
    clk_register: failed to get  device (parent of j7am_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk)
    clk_register: failed to get  device (parent of mshsi2c_wkup_0_porscl)
    clk_register: failed to get  device (parent of board_0_cpts0_rft_clk_out)
    clk_register: failed to get  device (parent of board_0_ext_refclk1_out)
    clk_register: failed to get  device (parent of board_0_mcu_cpts0_rft_clk_out)
    clk_register: failed to get  device (parent of board_0_mcu_ext_refclk0_out)
    clk_register: failed to get  device (parent of board_0_mmc1_clklb_out)
    clk_register: failed to get  device (parent of board_0_mmc1_clk_out)
    clk_register: failed to get  device (parent of board_0_tck_out)
    clk_register: failed to get  device (parent of board_0_vout0_extpclkin_out)
    clk_register: failed to get  device (parent of emmcsd4ss_main_0_emmcsdss_io_clk_o)
    SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.4--v09.02.04 (Kool Koala)')
    SPL initial stack usage: 13456 bytes
    Trying to boot from MMC2
    Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the image was also encrypted
    Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the image was also encrypted
    Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the image was also encrypted
    Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the image was also encrypted
    Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the image was also encrypted
    Loading Environment from nowhere... OK
    Starting ATF on ARM64 core...
    �c@�$����䤄���Ą���楇�ĥ�䥅����ņ��bc@ć(��$Ć�䆤��备�$Ą����b
    U-Boot SPL 2023.04-dirty (Sep 12 2024 - 23:04:21 +0530)
    SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.4--v09.02.04 (Kool Koala)')
    Trying to boot from MMC2
    Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the image was also encrypted
    Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the image was also encrypted
    
    
    U-Boot 2023.04-dirty (Sep 12 2024 - 22:55:14 +0530)
    
    SoC:   J784S4 SR1.0 GP
    Model: Texas Instruments J784S4 EVM
    Board: J784S4X-EVM rev E2
    DRAM:  2 GiB (effective 32 GiB)
    idle-statesCore:  92 devices, 32 uclasses, devicetree: separate
    Flash: 0 Bytes
    MMC:   mmc@4f80000: 0, mmc@4fb0000: 1
    Loading Environment from nowhere... OK
    In:    serial@42300000
    Out:   serial@42300000
    Err:   serial@42300000
    am65_cpsw_nuss ethernet@46000000: K3 CPSW: nuss_ver: 0x6BA02102 cpsw_ver: 0x6BA82102 ale_ver: 0x00293904 Ports:1 mdio_freq:1000000
    Net:   eth0: ethernet@46000000port@1
    Hit any key to stop autoboot:  0 
    

    Please use 9.2 SDK for now.

    - Keerthy

  • Hi Keerthy,

    Thank you for checking into this.  Unfortunately, we are working toward a custom board with only wkup_uart0 available, and for many reasons (long-term updatability being the most important) I really need to use either the upstream u-boot or at least the SDK 10.x release.

    Would it be possible for you to update this post when the 10.x release supports debug access over wkup_uart0?

  • Sure. I get the intent. That was only for temporary check out. I am following up internally on the 10.x fix. This will take time and I will keep you posted. 

    Best regards,

    Keerthy 

  • Hi,

    Please try this change:

    diff --git a/arch/arm/dts/k3-j784s4-evm.dts b/arch/arm/dts/k3-j784s4-evm.dts
    index afd84a6dfae..dba9fd7173b 100644
    --- a/arch/arm/dts/k3-j784s4-evm.dts
    +++ b/arch/arm/dts/k3-j784s4-evm.dts
    @@ -508,7 +508,7 @@
                    bootph-all;
                    pinctrl-single,pins = <
                            J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */
    -                       J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (K34) WKUP_UART0_TXD */
    +                       J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (K34) WKUP_UART0_TXD */

    In the recent SDK the TX pin was wrongly set to INPUT.

    Let us know if this works for you.

    - Keerthy

  • Hi Keerthy,

    Thank you for the details.  I was hopeful that this was the problem all along, but even with this change the same issue is occurring for me.  I am still only seeing:

    U-Boot SPL 2024.04-00004-g47db2563dc (Sep 13 2024 - 08:15:05 -0500)
    ti_power_domain_probe(dev=41c661b8)

    So, while it seems like this would certainly be an issue, it appears to not be the only one?  I assume you have seen the same results in your testing?

  • I did not have my board and found this issue. So even this is not helping. I will dig deeper.

    Thanks for testing!

    - Keerthy

  • Hi,

    Internal team has reproduced the issue and debugging this. I will keep you posted on the findings.

    Best regards,

    Keerthy 

  • Keerthy,

    Thanks for the update, I look forward to hearing about the resolution of this.

  • Hi Keerthy,

    Do you have any updates on this?  We still have a need for this support.

    Thanks!

  • Hi Jorden,

    Can you try with the below patch:

    Save New Duplicate & Edit Just Text Twitter
    diff --git a/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi b/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
    index cbbfa461a64..04e8ef14cb7 100644
    --- a/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
    +++ b/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
    @@ -304,6 +304,10 @@
                    compatible = "ti,j721e-uart", "ti,am654-uart";
                    reg = <0x00 0x42300000 0x00 0x200>;
                    interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
    +               clocks = <&k3_clks 397 0>;
    +               clock-names = "fclk";
    +               assigned-clocks = <&k3_clks 397 0>;
    +               assigned-clock-parents = <&k3_clks 397 1>;
                    current-speed = <115200>;
                    status = "okay";
                    clock-frequency = <96000000>;
    diff --git a/arch/arm/mach-k3/r5/j784s4/clk-data.c b/arch/arm/mach-k3/r5/j784s4/clk-data.c
    index feaa13ee266..0eb6ad6113e 100644
    --- a/arch/arm/mach-k3/r5/j784s4/clk-data.c
    +++ b/arch/arm/mach-k3/r5/j784s4/clk-data.c
    @@ -67,6 +67,16 @@ static const char * const wkup_i2c_mcupll_bypass_out0_parents[] = {
            "gluelogic_hfosc0_clkout",
     };
     
    +static const char * const wkup_usart_clksel_out0_parents[] = {
    +       "hsdiv4_16fft_mcu_1_hsdivout3_clk",
    +       "postdiv3_16fft_main_1_hsdivout5_clk",
    +};
    +
    +static const char * const wkup_usart_mcupll_bypass_out0_parents[] = {
    +       "wkup_usart_clksel_out0",
    +       "gluelogic_hfosc0_clkout",
    +};
    +
     static const char * const main_pll_hfosc_sel_out0_parents[] = {
            "gluelogic_hfosc0_clkout",
            "board_0_hfosc1_clk_out",
    @@ -206,7 +216,7 @@ static const struct clk_data clk_list[] = {
            CLK_PLL_DEFFREQ("pllfracf2_ssmod_16fft_mcu_1_foutvcop_clk", "wkup_fref_clksel_out0", 0x40d01000, 0, 2400000000),
            CLK_PLL_DEFFREQ("pllfracf2_ssmod_16fft_mcu_2_foutvcop_clk", "wkup_fref_clksel_out0", 0x40d02000, 0, 2000000000),
            CLK_DIV("hsdiv1_16fft_mcu_0_hsdivout0_clk", "pllfracf2_ssmod_16fft_mcu_0_foutvcop_clk", 0x40d00080, 0, 7, 0, 0),
    -       CLK_DIV("hsdiv4_16fft_mcu_1_hsdivout3_clk", "pllfracf2_ssmod_16fft_mcu_1_foutvcop_clk", 0x40d0108c, 0, 7, 0, 0),
    +       CLK_DIV_DEFFREQ("hsdiv4_16fft_mcu_1_hsdivout3_clk", "pllfracf2_ssmod_16fft_mcu_1_foutvcop_clk", 0x40d0108c, 0, 7, 0, 0, 96000000),
            CLK_DIV("hsdiv4_16fft_mcu_1_hsdivout4_clk", "pllfracf2_ssmod_16fft_mcu_1_foutvcop_clk", 0x40d01090, 0, 7, 0, 0),
            CLK_DIV_DEFFREQ("hsdiv4_16fft_mcu_2_hsdivout4_clk", "pllfracf2_ssmod_16fft_mcu_2_foutvcop_clk", 0x40d02090, 0, 7, 0, 0, 166666666),
            CLK_MUX_PLLCTRL("k3_pll_ctrl_wrap_wkup_0_sysclkout_clk", k3_pll_ctrl_wrap_wkup_0_sysclkout_clk_parents, 2, 0x42010000, 0),
    @@ -216,6 +226,8 @@ static const struct clk_data clk_list[] = {
            CLK_MUX("wkup_gpio0_clksel_out0", wkup_gpio0_clksel_out0_parents, 4, 0x43008070, 0, 2, 0),
            CLK_MUX("mcu_usart_clksel_out0", mcu_usart_clksel_out0_parents, 2, 0x40f081c0, 0, 1, 0),
            CLK_MUX("wkup_i2c_mcupll_bypass_out0", wkup_i2c_mcupll_bypass_out0_parents, 2, 0x43008060, 0, 1, 0),
    +       CLK_MUX("wkup_usart_clksel_out0", wkup_usart_clksel_out0_parents, 2, 0x43008064, 0, 1, 0),
    +       CLK_MUX("wkup_usart_mcupll_bypass_out0", wkup_usart_mcupll_bypass_out0_parents, 2, 0x43008060, 0, 1, 0),
            CLK_MUX("main_pll_hfosc_sel_out0", main_pll_hfosc_sel_out0_parents, 2, 0x43008080, 0, 1, 0),
            CLK_MUX("main_pll_hfosc_sel_out1", main_pll_hfosc_sel_out1_parents, 2, 0x43008084, 0, 1, 0),
            CLK_MUX("main_pll_hfosc_sel_out12", main_pll_hfosc_sel_out12_parents, 2, 0x430080b0, 0, 1, 0),
    @@ -409,6 +421,10 @@ static const struct dev_clk soc_dev_clk_data[] = {
            DEV_CLK(392, 3, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
            DEV_CLK(395, 0, "usart_programmable_clock_divider_out8"),
            DEV_CLK(395, 3, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
    +       DEV_CLK(397, 0, "wkup_usart_mcupll_bypass_out0"),
    +       DEV_CLK(397, 1, "wkup_usart_clksel_out0"),
    +       DEV_CLK(397, 2, "gluelogic_hfosc0_clkout"),
    +       DEV_CLK(397, 7, "k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk"),
            DEV_CLK(398, 0, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
            DEV_CLK(398, 1, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
            DEV_CLK(398, 2, "postdiv3_16fft_main_1_hsdivout7_clk"),
    diff --git a/arch/arm/mach-k3/r5/j784s4/dev-data.c b/arch/arm/mach-k3/r5/j784s4/dev-data.c
    index d66ba8b16e0..b32b4ba9588 100644
    --- a/arch/arm/mach-k3/r5/j784s4/dev-data.c
    +++ b/arch/arm/mach-k3/r5/j784s4/dev-data.c
    @@ -62,6 +62,7 @@ static struct ti_dev soc_dev_list[] = {
            PSC_DEV(149, &soc_lpsc_list[0]),
            PSC_DEV(167, &soc_lpsc_list[1]),
            PSC_DEV(279, &soc_lpsc_list[1]),
    +       PSC_DEV(397, &soc_lpsc_list[1]),
            PSC_DEV(161, &soc_lpsc_list[2]),
            PSC_DEV(162, &soc_lpsc_list[3]),
            PSC_DEV(160, &soc_lpsc_list[4]),

    Best Regards,
    Keerthy

  • Hi Keerthy,

    I tried this patch, and am certainly getting farther.  Initial checkout gets me to this point before it seems to just stop:

    U-Boot SPL 2024.04-00005-g3fcbaf4dff (Oct 09 2024 - 09:58:01 -0500)
    SYSFW ABI: 4.0 (firmware rev 0x000a '10.0.8--v10.00.08 (Fiery Fox)')
    Initialized 4 DRAM controllers
    SPL initial stack usage: 13456 bytes
    Trying to boot from MMC2
    Loading Environment from nowhere... OK
    Starting ATF on ARM64 core...
  • Hi Keerthy,

    For a little more detail, I am using this patch in trusted-firmware-a on top of "tag: v2.11.0":

    diff --git a/plat/ti/k3/include/platform_def.h b/plat/ti/k3/include/platform_def.h
    index a2cc62d34..d008169c5 100644
    --- a/plat/ti/k3/include/platform_def.h
    +++ b/plat/ti/k3/include/platform_def.h
    @@ -105,14 +105,14 @@

    /* Platform default console definitions */
    #ifndef K3_USART_BASE
    -#define K3_USART_BASE (0x02800000 + 0x10000 * K3_USART)
    +#define K3_USART_BASE (0x42300000 + 0x10000 * K3_USART)
    #endif

    /* USART has a default size for address space */
    #define K3_USART_SIZE 0x1000

    #ifndef K3_USART_CLK_SPEED
    -#define K3_USART_CLK_SPEED 48000000
    +#define K3_USART_CLK_SPEED 96000000
    #endif

    /* Crash console defaults */

    Here is the patch I am using in optee_os on top of "tag: 4.3.0":

    diff --git a/core/arch/arm/plat-k3/platform_config.h b/core/arch/arm/plat-k3/platform_config.h
    index cffca0a07..0467cdad8 100644
    --- a/core/arch/arm/plat-k3/platform_config.h
    +++ b/core/arch/arm/plat-k3/platform_config.h
    @@ -11,7 +11,7 @@

    #define UART0_BASE 0x02800000

    -#define CONSOLE_UART_BASE (UART0_BASE + CFG_CONSOLE_UART * 0x10000)
    +#define CONSOLE_UART_BASE (0x42300000 + CFG_CONSOLE_UART * 0x10000)
    #define CONSOLE_BAUDRATE 115200
    #define CONSOLE_UART_CLK_IN_HZ 48000000

    Should these suffice to enable this patch to operate fully?

  • Yes. They look good. We can first ascertain that the crash you observed is no longer seen and it moves to the next boot phase. 

    Best regards,

    Keerthy 

  • Hi Keerthy,

    To followup, is this expected to fully enable booting to Linux with the wkup_uart0 port for debugging, or is TI still working through this?  I just want to make sure we have the same expectation for next steps.

    Thanks,

    cjorden

  • Hi,

    We have the U-Boot prompt up with this. Can you try and let us know if you can get to U-Boot prompt with wkup_uart?

    Best regards,

    Keerthy 

  • Hi Keerthy,

    Thank you for clarifying that this fully solves the issue, that helps.  Can you tell me if your testing uses this patch alone on top of ti-u-boot 10.00.08, or if you are applying one of the patch series that was discussed above as well?

    Thanks,

    cjorden

  • Can you tell me if your testing uses this patch alone on top of ti-u-boot 10.00.08, or if you are applying one of the patch series that was discussed above as well?

    Good point. This patch is a fix for the hang you observed. Rest should be applied as is to change the console to wkup_uart0 like you did in the previous SDKs.

    - Keerthy