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ICSSG PRU firmware loading during linux kernel boot

Part Number: AM6422
Other Parts Discussed in Thread: SK-AM64B

Tool/software:

Hi,

I have a requirement to interface the KSZ9477 ethernel switch IC to the AM642x . The SDK version am using is 9.02.01.10

The inetrface  between the PRU of Am642x and the KSZ switch is MII. So below are the k3-am642-sk.dts file changes in the kernel.

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kszpruicssg0miigrt1_pins_default: kszpruicssg0miigrt1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x01f0, PIN_INPUT, 1) /* (AA4) PRG0_PRU1_GPO16.PR0_MII_MT1_CLK */
AM64X_IOPAD(0x01ec, PIN_OUTPUT, 0) /* (U5) PRG0_PRU1_GPO15.PR0_MII1_TXEN */
AM64X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (U6) PRG0_PRU1_GPO14.PR0_MII1_TXD3 */
AM64X_IOPAD(0x01e4, PIN_OUTPUT, 0) /* (T6) PRG0_PRU1_GPO13.PR0_MII1_TXD2 */
AM64X_IOPAD(0x01e0, PIN_OUTPUT, 0) /* (Y4) PRG0_PRU1_GPO12.PR0_MII1_TXD1 */
AM64X_IOPAD(0x01dc, PIN_OUTPUT, 0) /* (W4) PRG0_PRU1_GPO11.PR0_MII1_TXD0 */
AM64X_IOPAD(0x01c0, PIN_INPUT, 1) /* (W3) PRG0_PRU1_GPO4.PR0_MII1_RXDV */
AM64X_IOPAD(0x01c8, PIN_INPUT, 1) /* (R5) PRG0_PRU1_GPO6.PR0_MII_MR1_CLK */
AM64X_IOPAD(0x01bc, PIN_INPUT, 1) /* (T4) PRG0_PRU1_GPO3.PR0_MII1_RXD3 */
AM64X_IOPAD(0x01b8, PIN_INPUT, 1) /* (V3) PRG0_PRU1_GPO2.PR0_MII1_RXD2 */
AM64X_IOPAD(0x01c4, PIN_INPUT, 1) /* (P4) PRG0_PRU1_GPO5.PR0_MII1_RXER */
AM64X_IOPAD(0x01b4, PIN_INPUT, 1) /* (W2) PRG0_PRU1_GPO1.PR0_MII1_RXD1 */
AM64X_IOPAD(0x01b0, PIN_INPUT, 1) /* (Y2) PRG0_PRU1_GPO0.PR0_MII1_RXD0 */
AM64X_IOPAD(0x01d0, PIN_INPUT, 1) /* (R1) PRG0_PRU1_GPO8.PR0_MII1_RXLINK */
>;
};
icssg1_eth: icssg1-eth {
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

This is just the changes related to the ICSSG PRU . My requirement is load the pru firmware that resides in /lib/firmware/pru/ti-prus  automatically during the kernel boot .

As per my understnding, there are 2 methods to load the firmware:

Method 1 : through UBoot

Method 2 : via kernel booting.

Pls correct me if my undrstanding is correct.

But am trying Method 2. So pls let me know if any changes is needed in the dts , as am not able load the firmaware automatically during the kernel booting. Not able to see any kernel log messages for the same. I have also enabled the kernel confis related to ICSSG pru as per this link : PRU_ICSSG ethernel

Also below are the complete dts file for ur reference. Kindly could u suggest me on this.

Regards,

Ankush

  • Hello Ankush,

    Do you have an AM64x EVM? If so, you can test out loading MII interface by running this command in uboot:
    https://software-dl.ti.com/processor-sdk-linux/esd/AM64X/09_02_01_09/exports/docs/linux/Foundational_Components/PRU-ICSS/Linux_Drivers/PRU_ICSSG_Ethernet.html#mii-support

    It looks like your devicetree file attachment did not actually attach.

    Here is another customer using MII PRU Ethernet, just on an earlier version of the SDK. Their thread might give you some ideas:
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1390617/am6422-linux-icssg0-mii

    Regards,

    Nick

  • Thanks Nick, for ur quick response.

    It looks like your devicetree file attachment did not actually attach.

    Sorry for not attching the complete dts file. Below is the dts file attached. The EVM am using is : SK-AM64B.

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    // SPDX-License-Identifier: GPL-2.0
    /*
    * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
    */
    /dts-v1/;
    #include <dt-bindings/mux/ti-serdes.h>
    #include <dt-bindings/phy/phy.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/net/ti-dp83867.h>
    #include <dt-bindings/leds/common.h>
    #include "k3-am642.dtsi"
    / {
    compatible = "ti,am642-sk", "ti,am642";
    model = "Texas Instruments AM642 SK";
    chosen {
    stdout-path = "serial2:115200n8";
    bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    As i have incorporated the MII changes from the overlay dtso file to this base dts file.....executing the uboot command is not needed i suppose.

    Here is the block diagram of KSZ9477 ethernt switch IC , which is SPI slave connected to AM64x master . With the MII interconnection to GMAC6 of KSZ9477. On AM64 EVM side , it is connected on ICSSG PRG0_PRU0 inetrface as seen in the attached k3-am642-sk.dts file.

    The KSZ9477 kernel device driver is able to load and read the chip ID. Below is the kernel log messages ......

    The issue is it is not able to load the ports because it is not able to find the CPU port .

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    [ 15.854082] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
    _____ _____ _ _
    | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_
    | | _| .'| . | . | | __| _| . | | | -_| _| _|
    |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_|
    |___| |___|
    Arago Project am64xx-evm [ 16.159685] ksz-switch spi0.0: found switch: KSZ9477, rev 0
    -
    Arago 2023.10 am64xx-evm -
    am64xx-evm login: [ 16.224835] xhci-hcd xhci-hcd.6.auto: xHCI Host Controller
    [ 16.230788] **Ankush** file = net/dsa/dsa2.c, line = 1783
    [ 16.256940] xhci-hcd xhci-hcd.6.auto: new USB bus registered, assigned bus number 1
    [ 16.271464] xhci-hcd xhci-hcd.6.auto: hcc params 0x200073c9 hci version 0x100 quirks 0x0000002000018010
    [ 16.272568] **Ankush** file = net/dsa/dsa2.c, line = 412
    [ 16.281327] xhci-hcd xhci-hcd.6.auto: irq 523, io mem 0x0f410000
    [ 16.286666] DSA: tree 0 has no CPU port
    [ 16.296469] **Ankush** file = net/dsa/dsa2.c, line = 1150, err = -22
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Now that the PRU ETH firmware is not able to load during boot, i suppose the ksz device driver is failing the read the cpu port .

    Hardware interconnection details: We have connected the SK-AM64B and KSZ9477 EVM over the SPI and MII interface. The SPI driver is able to read the chip ID and not moving further as it is failing to read rhe CPU port (MII).

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    [ 16.286666] DSA: tree 0 has no CPU port
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    .

    Am not sure wat am missing in the attached dts file. Pls suggest.

    Regards,

    ANkush

  • Hi,

    Update: Upon referring to the link that u have shared, came to know that i was using icssg1 in my dts. Then updated it to isccg0 , and then the ICSSG0 PRU firmware is able to load. but some kernel crash is happening. Below is the updated k3-am642-sk.dts file.

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    // SPDX-License-Identifier: GPL-2.0
    /*
    * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
    */
    /dts-v1/;
    #include <dt-bindings/mux/ti-serdes.h>
    #include <dt-bindings/phy/phy.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/net/ti-dp83867.h>
    #include <dt-bindings/leds/common.h>
    #include "k3-am642.dtsi"
    / {
    compatible = "ti,am642-sk", "ti,am642";
    model = "Texas Instruments AM642 SK";
    aliases {
    ethernet1 = "/icssg0-eth/ethernet-ports/port@0";
    ethernet2 = "/icssg0-eth/ethernet-ports/port@1";
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Below is the kernel boot log captured .

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    Starting kernel ...
    [··· 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
    [··· 0.000000] Linux version 6.1.83 (ankush@BLRLPT0017) (aarch64-none-linux-gnu-gcc (Arm GNU Toolchain 11.3.Rel1) 11.3.1 20220712, GNU ld (Arm GNU Toolchain 11.3.Rel1) 2.38.20220708) #8 SMP PREEMPT Mon 4
    [··· 0.000000] Machine model: Texas Instruments AM642 SK
    [··· 0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002800000 (options '')
    [··· 0.000000] printk: bootconsole [ns16550a0] enabled
    [··· 0.000000] efi: UEFI not found.
    [··· 0.000000] Reserved memory: created DMA memory pool at 0x00000000a0000000, size 1 MiB
    [··· 0.000000] OF: reserved mem: initialized node r5f-dma-memory@a0000000, compatible id shared-dma-pool
    [··· 0.000000] Reserved memory: created DMA memory pool at 0x00000000a0100000, size 15 MiB
    [··· 0.000000] OF: reserved mem: initialized node r5f-memory@a0100000, compatible id shared-dma-pool
    [··· 0.000000] Reserved memory: created DMA memory pool at 0x00000000a1000000, size 1 MiB
    [··· 0.000000] OF: reserved mem: initialized node r5f-dma-memory@a1000000, compatible id shared-dma-pool
    [··· 0.000000] Reserved memory: created DMA memory pool at 0x00000000a1100000, size 15 MiB
    [··· 0.000000] OF: reserved mem: initialized node r5f-memory@a1100000, compatible id shared-dma-pool
    [··· 0.000000] Reserved memory: created DMA memory pool at 0x00000000a2000000, size 1 MiB
    [··· 0.000000] OF: reserved mem: initialized node r5f-dma-memory@a2000000, compatible id shared-dma-pool
    [··· 0.000000] Reserved memory: created DMA memory pool at 0x00000000a2100000, size 15 MiB
    [··· 0.000000] OF: reserved mem: initialized node r5f-memory@a2100000, compatible id shared-dma-pool
    [··· 0.000000] Reserved memory: created DMA memory pool at 0x00000000a3000000, size 1 MiB
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Regards,

    Ankush

  • Hello Ankush,

    I wanted to look through your code and output this Friday, but I ran out of time. Please ping the thread if I have not replied again by Tuesday.

    Regards,

    Nick

  • Hi Nick,

    Can u pls look into this issue and provide ur suggestions.?

    Regards,

    Ankush

  • Hello Ankush,

    How many PRU Ethernet ports are you connecting to external PHYs? 1? 2?

    The reason I ask is because in one part of the devicetree file, you only enable 1 PRU Ethernet interface:

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    icssg0_emac0: port@0 {
    reg = <0>;
    phy-handle = <&icssg0_phy1>;
    phy-mode = "mii";
    /*ti,syscon-rgmii-delay = <&main_conf 0x4110>;*/
    /* Filled in by bootloader */
    local-mac-address = [00 00 00 00 00 00];
    };
    icssg0_emac1: port@1 {
    reg = <1>;
    /*ti,syscon-rgmii-delay = <&main_conf 0x4114>;*/
    /* Filled in by bootloader */
    local-mac-address = [00 00 00 00 00 00];
    status = "disabled";
    };
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    But then later in your devicetree file, you override those settings to enable both PRU Ethernet interfaces. I assume this code is a mistake based on your other code:

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    &icssg0_emac0 {
    phy-mode = "mii";
    };
    &icssg0_emac1 {
    status = "okay";
    phy-handle = <&icssg1_phy2>;
    phy-mode = "mii";
    };
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Do you have a separate PHY between the AM64x MAC and the external ksz9477? Or are you directly connecting the Ethernet traces?

    Regards,

    Nick

  • Hi Nick,

    But then later in your devicetree file, you override those settings to enable both PRU Ethernet interfaces. I assume this code is a mistake based on your other code:

    The reason I had enabled both the PRU interfaces is that i was not sure which interfaces will be working for me. Please guide me on this part if any changes is needed to correct it. The Port 6 of KSZ9477 is connected to J10 connector PRG0_PRU1 interface pins over MII on the AM64x EVM. The same is updated in the pin_MUX setting in the dts file.

     

    Do you have a separate PHY between the AM64x MAC and the external ksz9477? Or are you directly connecting the Ethernet traces?

    There is no seperate PHY connected inbetween the AM64x MAC and the external KSZ9477 EVM. I have  a confusion, if the ksz node should be updated within the icssg0_eth node. Pls suggest me on this .

    Regards,

    ANkush

  • The latest dts file is attached for ur reference.

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    // SPDX-License-Identifier: GPL-2.0
    /*
    * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
    */
    /dts-v1/;
    #include <dt-bindings/mux/ti-serdes.h>
    #include <dt-bindings/phy/phy.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/net/ti-dp83867.h>
    #include <dt-bindings/leds/common.h>
    #include "k3-am642.dtsi"
    / {
    compatible = "ti,am642-sk", "ti,am642";
    model = "Texas Instruments AM642 SK";
    aliases {
    ethernet1 = "/icssg0-eth/ethernet-ports/port@0";
    ethernet2 = "/icssg0-eth/ethernet-ports/port@1";
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    I want to drive the ICSSG0 PRU inetrface in the MAC mode and KSZ9477 in the PHY mode. Is this setting in my dts file correct ? Pls suggest.

    Below is the kernel log messages related to KSZ9477 and ICSSG

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    root@am64xx-evm:~#
    root@am64xx-evm:~#
    root@am64xx-evm:~# dmesg | grep -i icssg
    [ 10.792070] icssg-prueth: probe of icssg0-eth failed with error -2
    root@am64xx-evm:~# dmesg | grep -i spi
    [ 0.000000] GICv3: 256 SPIs implemented
    [ 0.000000] GICv3: 0 Extended SPIs implemented
    [ 1.734550] spi-nor spi1.0: s28hs512t (65536 Kbytes)
    [ 1.739682] 7 fixed-partitions partitions found on MTD device fc40000.spi.0
    [ 1.746663] Creating 7 MTD partitions on "fc40000.spi.0":
    [ 1.752061] 0x000000000000-0x000000100000 : "ospi.tiboot3"
    [ 1.759065] 0x000000100000-0x000000300000 : "ospi.tispl"
    [ 1.765876] 0x000000300000-0x000000700000 : "ospi.u-boot"
    [ 1.772725] 0x000000700000-0x000000740000 : "ospi.env"
    [ 1.779339] 0x000000740000-0x000000780000 : "ospi.env.backup"
    [ 1.786577] 0x000000800000-0x000003fc0000 : "ospi.rootfs"
    [ 1.793540] 0x000003fc0000-0x000004000000 : "ospi.phypattern"
    [ 15.497247] ksz-switch spi0.0: found switch: KSZ9477, rev 0
    [ 15.597155] ksz-switch: probe of spi0.0 failed with error -22
    root@am64xx-evm:~#
    root@am64xx-evm:~#
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Regards,

    ANkush

  • Hello Ankush,

    I will comment on things that do not look correct to me in the devicetree file. However, please keep in mind that TI does not produce the KSZ9477, and we cannot support questions about getting it working with a Linux processor. We have gotten regular PHYs to work with our chips, but I have no idea if KSZ9477 behaves like a regular PHY. You would need to get support for that from Microchip.

    I only see one example of using the device, at
    arm/boot/dts/microchip/at91-sama5d3_ksz9477_evb.dts

    Other devicetree notes

    ethernet-ports { should probably NOT be commented out.

    Look at the MII pinmuxing that you are setting in the datasheet - which PRU core is associated with those signals? Make sure that PRU interface is enabled, and the other one is disabled (i.e., the other emacX node in the devicetree file should be disabled).

    Regards,

    Nick

  • Hi Nick,

    Thanks for ur valuable suggestion.

    Here  the AM642 Processor ICSSG0 PRU behaves as integrated MAC and KSZ9477 (Port 6) behaves as PHY (port@5 setting in the dts file). For this combination is the dts setting proper or not for MII ,is my concern. I have also disabled / commented unused remote cores (Link: https://dev.ti.com/tirex/explore/node?a=7qm9DIS__LATEST&node=A__Af8fKrelrD3vCdWjTx7.ww__AM64-ACADEMY__WI1KRXP__LATEST) in the dts. Is this causing any issue

    I want to link icssg0_emac0 to port@5 of the ksz9477S node in the dts.

    Can u pls suggest on this pls.

    Updated dts file is below:

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    // SPDX-License-Identifier: GPL-2.0
    /*
    * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
    */
    /dts-v1/;
    #include <dt-bindings/mux/ti-serdes.h>
    #include <dt-bindings/phy/phy.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/net/ti-dp83867.h>
    #include <dt-bindings/leds/common.h>
    #include "k3-am642.dtsi"
    / {
    compatible = "ti,am642-sk", "ti,am642";
    model = "Texas Instruments AM642 SK";
    aliases {
    /*ethernet1 = "/icssg0-eth/ethernet-ports/port@0";
    ethernet2 = "/icssg0-eth/ethernet-ports/port@1";*/
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Regards,

    Ankush

  • Hi Nick,

    Awaiting for ur response pls.

  • Nick,

    Can u pls suggest , as am stuck at this issue.

  • Hi,

    Any update on this pls.?

  • Hello Ankush,

    Apologies for losing your thread here. Do you still need assistance?

    Regards,

    Nick

  • Hi Nick,

    Thanks for your delayed response. We are able to fix this issue.