ICSSG PRU firmware loading during linux kernel boot

Part Number: AM6422
Other Parts Discussed in Thread: SK-AM64B

Tool/software:

Hi,

I have a requirement to interface the KSZ9477 ethernel switch IC to the AM642x . The SDK version am using is 9.02.01.10

The inetrface  between the PRU of Am642x and the KSZ switch is MII. So below are the k3-am642-sk.dts file changes in the kernel.

kszpruicssg0miigrt1_pins_default: kszpruicssg0miigrt1-default-pins {
		pinctrl-single,pins = <
			AM64X_IOPAD(0x01f0, PIN_INPUT, 1) /* (AA4) PRG0_PRU1_GPO16.PR0_MII_MT1_CLK */
			AM64X_IOPAD(0x01ec, PIN_OUTPUT, 0) /* (U5) PRG0_PRU1_GPO15.PR0_MII1_TXEN */
			AM64X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (U6) PRG0_PRU1_GPO14.PR0_MII1_TXD3 */
			AM64X_IOPAD(0x01e4, PIN_OUTPUT, 0) /* (T6) PRG0_PRU1_GPO13.PR0_MII1_TXD2 */
			AM64X_IOPAD(0x01e0, PIN_OUTPUT, 0) /* (Y4) PRG0_PRU1_GPO12.PR0_MII1_TXD1 */
			AM64X_IOPAD(0x01dc, PIN_OUTPUT, 0) /* (W4) PRG0_PRU1_GPO11.PR0_MII1_TXD0 */
			AM64X_IOPAD(0x01c0, PIN_INPUT, 1) /* (W3) PRG0_PRU1_GPO4.PR0_MII1_RXDV */
			AM64X_IOPAD(0x01c8, PIN_INPUT, 1) /* (R5) PRG0_PRU1_GPO6.PR0_MII_MR1_CLK */
			AM64X_IOPAD(0x01bc, PIN_INPUT, 1) /* (T4) PRG0_PRU1_GPO3.PR0_MII1_RXD3 */
			AM64X_IOPAD(0x01b8, PIN_INPUT, 1) /* (V3) PRG0_PRU1_GPO2.PR0_MII1_RXD2 */
			AM64X_IOPAD(0x01c4, PIN_INPUT, 1) /* (P4) PRG0_PRU1_GPO5.PR0_MII1_RXER */
			AM64X_IOPAD(0x01b4, PIN_INPUT, 1) /* (W2) PRG0_PRU1_GPO1.PR0_MII1_RXD1 */
			AM64X_IOPAD(0x01b0, PIN_INPUT, 1) /* (Y2) PRG0_PRU1_GPO0.PR0_MII1_RXD0 */
			AM64X_IOPAD(0x01d0, PIN_INPUT, 1) /* (R1) PRG0_PRU1_GPO8.PR0_MII1_RXLINK */
		>;
	};
	
	
icssg1_eth: icssg1-eth {
		compatible = "ti,am642-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&kszpruicssg0miigrt1_pins_default>;

		sram = <&oc_sram>;
		ti,prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>, <&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,	/* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		ti,mii-g-rt = <&icssg1_mii_g_rt>;
		ti,mii-rt = <&icssg1_mii_rt>;
		ti,pa-stats = <&icssg1_pa_stats>;
		iep = <&icssg1_iep0>,  <&icssg1_iep1>;

		interrupt-parent = <&icssg1_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_pktdma 0xc200 15>, /* egress slice 0 */
		       <&main_pktdma 0xc201 15>, /* egress slice 0 */
		       <&main_pktdma 0xc202 15>, /* egress slice 0 */
		       <&main_pktdma 0xc203 15>, /* egress slice 0 */
		       <&main_pktdma 0xc204 15>, /* egress slice 1 */
		       <&main_pktdma 0xc205 15>, /* egress slice 1 */
		       <&main_pktdma 0xc206 15>, /* egress slice 1 */
		       <&main_pktdma 0xc207 15>, /* egress slice 1 */
		       <&main_pktdma 0x4200 15>, /* ingress slice 0 */
		       <&main_pktdma 0x4201 15>, /* ingress slice 1 */
		       <&main_pktdma 0x4202 0>, /* mgmnt rsp slice 0 */
		       <&main_pktdma 0x4203 0>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1";

		ethernet-ports {
			#address-cells = <1>;
			#size-cells = <0>;
			icssg1_emac0: port@0 {
				reg = <0>;
				phy-handle = <&icssg1_phy1>;
				phy-mode = "rgmii-id";
				ti,syscon-rgmii-delay = <&main_conf 0x4110>;
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
			};
			icssg1_emac1: port@1 {
				reg = <1>;
				ti,syscon-rgmii-delay = <&main_conf 0x4114>;
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
				status = "disabled";
			};
		};
	};
	
	
&icssg1_eth {
	pinctrl-0 = <&kszpruicssg0miigrt1_pins_default>;
	status = "okay";
};

&icssg1_emac0 {
	phy-mode = "mii";
};

&icssg1_emac1 {
	status = "okay";
	phy-handle = <&icssg1_phy2>;
	phy-mode = "mii";
}; 

This is just the changes related to the ICSSG PRU . My requirement is load the pru firmware that resides in /lib/firmware/pru/ti-prus  automatically during the kernel boot .

As per my understnding, there are 2 methods to load the firmware:

Method 1 : through UBoot

Method 2 : via kernel booting.

Pls correct me if my undrstanding is correct.

But am trying Method 2. So pls let me know if any changes is needed in the dts , as am not able load the firmaware automatically during the kernel booting. Not able to see any kernel log messages for the same. I have also enabled the kernel confis related to ICSSG pru as per this link : PRU_ICSSG ethernel

Also below are the complete dts file for ur reference. Kindly could u suggest me on this.

Regards,

Ankush

  • Hello Ankush,

    Do you have an AM64x EVM? If so, you can test out loading MII interface by running this command in uboot:
    https://software-dl.ti.com/processor-sdk-linux/esd/AM64X/09_02_01_09/exports/docs/linux/Foundational_Components/PRU-ICSS/Linux_Drivers/PRU_ICSSG_Ethernet.html#mii-support

    It looks like your devicetree file attachment did not actually attach.

    Here is another customer using MII PRU Ethernet, just on an earlier version of the SDK. Their thread might give you some ideas:
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1390617/am6422-linux-icssg0-mii

    Regards,

    Nick

  • Thanks Nick, for ur quick response.

    It looks like your devicetree file attachment did not actually attach.

    Sorry for not attching the complete dts file. Below is the dts file attached. The EVM am using is : SK-AM64B.

    // SPDX-License-Identifier: GPL-2.0
    /*
     * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
     */
    
    /dts-v1/;
    
    #include <dt-bindings/mux/ti-serdes.h>
    #include <dt-bindings/phy/phy.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/net/ti-dp83867.h>
    #include <dt-bindings/leds/common.h>
    #include "k3-am642.dtsi"
    
    / {
    	compatible = "ti,am642-sk", "ti,am642";
    	model = "Texas Instruments AM642 SK";
    
    	chosen {
    		stdout-path = "serial2:115200n8";
    		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
    	};
    
    	memory@80000000 {
    		device_type = "memory";
    		/* 2G RAM */
    		reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
    
    	};
    
    	reserved-memory {
    		#address-cells = <2>;
    		#size-cells = <2>;
    		ranges;
    
    		secure_ddr: optee@9e800000 {
    			reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
    			alignment = <0x1000>;
    			no-map;
    		};
    
    		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa0000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa0100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa1000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa1100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa2000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa2100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa3000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa3100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa4000000 0x00 0x100000>;
    			no-map;
    		};
    
    		mcu_m4fss_memory_region: m4f-memory@a4100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa4100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		rtos_ipc_memory_region: ipc-memories@a5000000 {
    			reg = <0x00 0xa5000000 0x00 0x00800000>;
    			alignment = <0x1000>;
    			no-map;
    		};
    	};
    
    	vusb_main: fixed-regulator-vusb-main5v0 {
    		/* USB MAIN INPUT 5V DC */
    		compatible = "regulator-fixed";
    		regulator-name = "vusb_main5v0";
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vcc_3v3_sys: fixedregulator-vcc-3v3-sys {
    		/* output of LP8733xx */
    		compatible = "regulator-fixed";
    		regulator-name = "vcc_3v3_sys";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		vin-supply = <&vusb_main>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vdd_mmc1: fixed-regulator-sd {
    		/* TPS2051BD */
    		compatible = "regulator-fixed";
    		regulator-name = "vdd_mmc1";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-boot-on;
    		enable-active-high;
    		vin-supply = <&vcc_3v3_sys>;
    		gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
    	};
    
    	com8_ls_en: regulator-1 {
    		compatible = "regulator-fixed";
    		regulator-name = "com8_ls_en";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-always-on;
    		regulator-boot-on;
    		pinctrl-0 = <&main_com8_ls_en_pins_default>;
    		pinctrl-names = "default";
    		gpio = <&main_gpio0 62 GPIO_ACTIVE_LOW>;
    	};
    
    	wlan_en: regulator-2 {
    		/* output of SN74AVC4T245RSVR */
    		compatible = "regulator-fixed";
    		regulator-name = "wlan_en";
    		regulator-min-microvolt = <1800000>;
    		regulator-max-microvolt = <1800000>;
    		enable-active-high;
    		pinctrl-0 = <&main_wlan_en_pins_default>;
    		pinctrl-names = "default";
    		vin-supply = <&com8_ls_en>;
    		gpio = <&main_gpio0 48 GPIO_ACTIVE_HIGH>;
    	};
    
    	led-controller {
    		compatible = "gpio-leds";
    
    		led-0 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <1>;
    			gpios = <&exp2 0 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-1 {
    			color = <LED_COLOR_ID_RED>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <2>;
    			gpios = <&exp2 1 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-2 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <3>;
    			gpios = <&exp2 2 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-3 {
    			color = <LED_COLOR_ID_AMBER>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <4>;
    			gpios = <&exp2 3 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-4 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <5>;
    			gpios = <&exp2 4 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-5 {
    			color = <LED_COLOR_ID_RED>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <6>;
    			gpios = <&exp2 5 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-6 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <7>;
    			gpios = <&exp2 6 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-7 {
    			color = <LED_COLOR_ID_AMBER>;
    			function = LED_FUNCTION_HEARTBEAT;
    			function-enumerator = <8>;
    			linux,default-trigger = "heartbeat";
    			gpios = <&exp2 7 GPIO_ACTIVE_HIGH>;
    		};
    	};
    
    	mdio_mux: mux-controller {
    		compatible = "gpio-mux";
    		#mux-control-cells = <0>;
    
    		mux-gpios = <&exp1 12 GPIO_ACTIVE_HIGH>;
    	};
    	
    	mdio-mux-2 {
    		compatible = "mdio-mux-multiplexer";
    		mux-controls = <&mdio_mux>;
    		mdio-parent-bus = <&icssg1_mdio>;
    		#address-cells = <1>;
    		#size-cells = <0>;
    
    		mdio@0 {
    			reg = <0x0>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    
    			icssg1_phy2: ethernet-phy@3 {
    				reg = <3>;
    			};
    		};
    	}; 
    };
    
    &main_pmx0 {
    
    	pinctrl-names = "default";
    	pinctrl-0 = <&mygpio1_pins_default>;
    
    	main_mmc1_pins_default: main-mmc1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0294, PIN_INPUT, 0) /* (J19) MMC1_CMD */
    			AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */
    			AM64X_IOPAD(0x028c, PIN_INPUT, 0) /* (L20) MMC1_CLK */
    			AM64X_IOPAD(0x0288, PIN_INPUT, 0) /* (K21) MMC1_DAT0 */
    			AM64X_IOPAD(0x0284, PIN_INPUT, 0) /* (L21) MMC1_DAT1 */
    			AM64X_IOPAD(0x0280, PIN_INPUT, 0) /* (K19) MMC1_DAT2 */
    			AM64X_IOPAD(0x027c, PIN_INPUT, 0) /* (K18) MMC1_DAT3 */
    			AM64X_IOPAD(0x0298, PIN_INPUT, 0) /* (D19) MMC1_SDCD */
    		>;
    	};
    
    	main_uart0_pins_default: main-uart0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
    			AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
    			AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
    			AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
    		>;
    	};
    
    	main_usb0_pins_default: main-usb0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
    		>;
    	};
    
    	main_i2c1_pins_default: main-i2c1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */
    			AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */
    		>;
    	};
    
    	mdio1_pins_default: mdio1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
    			AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
    		>;
    	};
    
    	rgmii1_pins_default: rgmii1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x011c, PIN_INPUT, 4) /* (AA13) PRG1_PRU1_GPO5.RGMII1_RD0 */
    			AM64X_IOPAD(0x0128, PIN_INPUT, 4) /* (U12) PRG1_PRU1_GPO8.RGMII1_RD1 */
    			AM64X_IOPAD(0x0150, PIN_INPUT, 4) /* (Y13) PRG1_PRU1_GPO18.RGMII1_RD2 */
    			AM64X_IOPAD(0x0154, PIN_INPUT, 4) /* (V12) PRG1_PRU1_GPO19.RGMII1_RD3 */
    			AM64X_IOPAD(0x00d8, PIN_INPUT, 4) /* (W13) PRG1_PRU0_GPO8.RGMII1_RXC */
    			AM64X_IOPAD(0x00cc, PIN_INPUT, 4) /* (V13) PRG1_PRU0_GPO5.RGMII1_RX_CTL */
    			AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
    			AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
    			AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
    			AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
    			AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
    			AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
    		>;
    	};
    
           rgmii2_pins_default: rgmii2-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
    			AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
    			AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */
    			AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */
    			AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */
    			AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */
    			AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */
    			AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */
    			AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */
    			AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */
    			AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */
    			AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
    		>;
    	};
    
    	ospi0_pins_default: ospi0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */
    			AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */
    			AM64X_IOPAD(0x000c, PIN_INPUT, 0) /* (M19) OSPI0_D0 */
    			AM64X_IOPAD(0x0010, PIN_INPUT, 0) /* (M18) OSPI0_D1 */
    			AM64X_IOPAD(0x0014, PIN_INPUT, 0) /* (M20) OSPI0_D2 */
    			AM64X_IOPAD(0x0018, PIN_INPUT, 0) /* (M21) OSPI0_D3 */
    			AM64X_IOPAD(0x001c, PIN_INPUT, 0) /* (P21) OSPI0_D4 */
    			AM64X_IOPAD(0x0020, PIN_INPUT, 0) /* (P20) OSPI0_D5 */
    			AM64X_IOPAD(0x0024, PIN_INPUT, 0) /* (N18) OSPI0_D6 */
    			AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */
    			AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
    		>;
    	};
    
    	main_ecap0_pins_default: main-ecap0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
    		>;
    	};
    	main_wlan_en_pins_default: main-wlan-en-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */
    		>;
    	};
    
    	main_com8_ls_en_pins_default: main-com8-ls-en-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00fc, PIN_OUTPUT, 7) /* (U7) PRG1_PRU0_GPO17.GPIO0_62 */
    		>;
    	};
    
    	main_wlan_pins_default: main-wlan-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00bc, PIN_INPUT, 7) /* (U8) GPIO0_46 */
    		>;
    	};
    
    	main_eqep0_pins_default: main-eqep0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00a0, PIN_INPUT, 3) /* (N16) GPMC0_WPn.EQEP0_A */
    			AM64X_IOPAD(0x00a4, PIN_INPUT, 3) /* (N17) GPMC0_DIR.EQEP0_B */
    			AM64X_IOPAD(0x00ac, PIN_INPUT, 3) /* (R20) GPMC0_CSn1.EQEP0_I */
    			AM64X_IOPAD(0x00a8, PIN_INPUT, 3) /* (R19) GPMC0_CSn0.EQEP0_S */
    		>;
    	};
    
    	main_spi0_pins_default: myspi0ksz-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0210, PIN_INPUT, 0) /* (D13) SPI0_CLK */
    			AM64X_IOPAD(0x0214, PIN_INPUT, 0) /* (A13) SPI0_D0 */
    			AM64X_IOPAD(0x0218, PIN_INPUT, 0) /* (A14) SPI0_D1 */
    			AM64X_IOPAD(0x0208, PIN_INPUT, 0) /* (D12) SPI0_CS0 */
    		>;
    	};
    
    	kszpruicssg0miigrt1_pins_default: kszpruicssg0miigrt1-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x01f0, PIN_INPUT, 1) /* (AA4) PRG0_PRU1_GPO16.PR0_MII_MT1_CLK */
    			AM64X_IOPAD(0x01ec, PIN_OUTPUT, 0) /* (U5) PRG0_PRU1_GPO15.PR0_MII1_TXEN */
    			AM64X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (U6) PRG0_PRU1_GPO14.PR0_MII1_TXD3 */
    			AM64X_IOPAD(0x01e4, PIN_OUTPUT, 0) /* (T6) PRG0_PRU1_GPO13.PR0_MII1_TXD2 */
    			AM64X_IOPAD(0x01e0, PIN_OUTPUT, 0) /* (Y4) PRG0_PRU1_GPO12.PR0_MII1_TXD1 */
    			AM64X_IOPAD(0x01dc, PIN_OUTPUT, 0) /* (W4) PRG0_PRU1_GPO11.PR0_MII1_TXD0 */
    			AM64X_IOPAD(0x01c0, PIN_INPUT, 1) /* (W3) PRG0_PRU1_GPO4.PR0_MII1_RXDV */
    			AM64X_IOPAD(0x01c8, PIN_INPUT, 1) /* (R5) PRG0_PRU1_GPO6.PR0_MII_MR1_CLK */
    			AM64X_IOPAD(0x01bc, PIN_INPUT, 1) /* (T4) PRG0_PRU1_GPO3.PR0_MII1_RXD3 */
    			AM64X_IOPAD(0x01b8, PIN_INPUT, 1) /* (V3) PRG0_PRU1_GPO2.PR0_MII1_RXD2 */
    			AM64X_IOPAD(0x01c4, PIN_INPUT, 1) /* (P4) PRG0_PRU1_GPO5.PR0_MII1_RXER */
    			AM64X_IOPAD(0x01b4, PIN_INPUT, 1) /* (W2) PRG0_PRU1_GPO1.PR0_MII1_RXD1 */
    			AM64X_IOPAD(0x01b0, PIN_INPUT, 1) /* (Y2) PRG0_PRU1_GPO0.PR0_MII1_RXD0 */
    			AM64X_IOPAD(0x01d0, PIN_INPUT, 1) /* (R1) PRG0_PRU1_GPO8.PR0_MII1_RXLINK */
    		>;
    	};
    
    	mygpio1_pins_default: mygpio1-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0164, PIN_OUTPUT, 7) /* (R4) PRG0_PRU0_GPO1.GPIO1_1 */
    			AM64X_IOPAD(0x01d8, PIN_OUTPUT, 7) /* (V6) PRG0_PRU1_GPO10.GPIO1_30 */
    		>;
    	};
    
    	mypruicssg0mdio1_pins_default: mypruicssg0mdio1-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0204, PIN_OUTPUT, 0) /* (P3) PRG0_MDIO0_MDC */
    			AM64X_IOPAD(0x0200, PIN_INPUT, 0) /* (P2) PRG0_MDIO0_MDIO */
    		>;
    	};
    
    	icssg1_eth: icssg1-eth {
    		compatible = "ti,am642-icssg-prueth";
    		pinctrl-names = "default";
    		pinctrl-0 = <&kszpruicssg0miigrt1_pins_default>;
    
    		sram = <&oc_sram>;
    		ti,prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>, <&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
    		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";
    
    		ti,pruss-gp-mux-sel = <2>,	/* MII mode */
    				      <2>,
    				      <2>,
    				      <2>,	/* MII mode */
    				      <2>,
    				      <2>;
    
    		ti,mii-g-rt = <&icssg1_mii_g_rt>;
    		ti,mii-rt = <&icssg1_mii_rt>;
    		ti,pa-stats = <&icssg1_pa_stats>;
    		iep = <&icssg1_iep0>,  <&icssg1_iep1>;
    
    		interrupt-parent = <&icssg1_intc>;
    		interrupts = <24 0 2>, <25 1 3>;
    		interrupt-names = "tx_ts0", "tx_ts1";
    
    		dmas = <&main_pktdma 0xc200 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc201 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc202 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc203 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc204 15>, /* egress slice 1 */
    		       <&main_pktdma 0xc205 15>, /* egress slice 1 */
    		       <&main_pktdma 0xc206 15>, /* egress slice 1 */
    		       <&main_pktdma 0xc207 15>, /* egress slice 1 */
    		       <&main_pktdma 0x4200 15>, /* ingress slice 0 */
    		       <&main_pktdma 0x4201 15>, /* ingress slice 1 */
    		       <&main_pktdma 0x4202 0>, /* mgmnt rsp slice 0 */
    		       <&main_pktdma 0x4203 0>; /* mgmnt rsp slice 1 */
    		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
    			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
    			    "rx0", "rx1";
    
    		ethernet-ports {
    			#address-cells = <1>;
    			#size-cells = <0>;
    			icssg1_emac0: port@0 {
    				reg = <0>;
    				phy-handle = <&icssg1_phy1>;
    				phy-mode = "rgmii-id";
    				ti,syscon-rgmii-delay = <&main_conf 0x4110>;
    				/* Filled in by bootloader */
    				local-mac-address = [00 00 00 00 00 00];
    			};
    			icssg1_emac1: port@1 {
    				reg = <1>;
    				ti,syscon-rgmii-delay = <&main_conf 0x4114>;
    				/* Filled in by bootloader */
    				local-mac-address = [00 00 00 00 00 00];
    				status = "disabled";
    			};
    		};
    	};
    };
    
    &main_uart0 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_uart0_pins_default>;
    };
    
    &main_uart1 {
    	/* main_uart1 is reserved for firmware usage */
    	status = "reserved";
    };
    
    &main_i2c1 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_i2c1_pins_default>;
    	clock-frequency = <400000>;
    
    	exp1: gpio@70 {
    		compatible = "nxp,pca9538";
    		reg = <0x70>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
    				  "PRU_DETECT", "MMC1_SD_EN",
    				  "VPP_LDO_EN", "RPI_PS_3V3_En",
    				  "RPI_PS_5V0_En", "RPI_HAT_DETECT";
    	};
    
    	exp2: gpio@60 {
    		compatible = "ti,tpic2810";
    		reg = <0x60>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		gpio-line-names = "LED1","LED2","LED3","LED4","LED5","LED6","LED7","LED8";
    	};
    };
    
    /* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */
    &mcu_gpio0 {
    	status = "reserved";
    };
    
    &mcu_gpio_intr {
    	status = "reserved";
    };
    
    &sdhci0 {
    	status = "okay";
    	vmmc-supply = <&wlan_en>;
    	bus-width = <4>;
    	non-removable;
    	cap-power-off-card;
    	keep-power-in-suspend;
    	ti,driver-strength-ohm = <50>;
    
    	#address-cells = <1>;
    	#size-cells = <0>;
    	wlcore: wlcore@2 {
    		compatible = "ti,wl1837";
    		reg = <2>;
    		pinctrl-0 = <&main_wlan_pins_default>;
    		pinctrl-names = "default";
    		interrupt-parent = <&main_gpio0>;
    		interrupts = <46 IRQ_TYPE_EDGE_FALLING>;
    	};
    };
    
    &sdhci1 {
    	/* SD/MMC */
    	status = "okay";
    	vmmc-supply = <&vdd_mmc1>;
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mmc1_pins_default>;
    	disable-wp;
    };
    
    &serdes_ln_ctrl {
    	idle-states = <AM64_SERDES0_LANE0_USB>;
    };
    
    &serdes0 {
    	serdes0_usb_link: phy@0 {
    		reg = <0>;
    		cdns,num-lanes = <1>;
    		#phy-cells = <0>;
    		cdns,phy-type = <PHY_TYPE_USB3>;
    		resets = <&serdes_wiz0 1>;
    	};
    };
    
    &usbss0 {
    	ti,vbus-divider;
    };
    
    &usb0 {
    	dr_mode = "host";
    	maximum-speed = "super-speed";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_usb0_pins_default>;
    	phys = <&serdes0_usb_link>;
    	phy-names = "cdns3,usb3-phy";
    };
    
    &cpsw3g {
    	pinctrl-names = "default";
    	pinctrl-0 = <&rgmii1_pins_default
    		     &rgmii2_pins_default>;
    
    	/* Map HW8_TS_PUSH to GENF1 */
    	cpts@3d000 {
    		ti,pps = <7 1>;
    	};
    };
    
    &cpsw_port1 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&cpsw3g_phy0>;
    };
    
    &cpsw_port2 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&cpsw3g_phy1>;
    };
    
    &cpsw3g_mdio {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&mdio1_pins_default>;
    
    	cpsw3g_phy0: ethernet-phy@0 {
    		reg = <0>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    	};
    
    	cpsw3g_phy1: ethernet-phy@1 {
    		reg = <1>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    	};
    };
    
    &tscadc0 {
    	status = "disabled";
    };
    
    &ospi0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&ospi0_pins_default>;
    
    	flash@0 {
    		compatible = "jedec,spi-nor";
    		reg = <0x0>;
    		spi-tx-bus-width = <8>;
    		spi-rx-bus-width = <8>;
    		spi-max-frequency = <25000000>;
    		cdns,tshsl-ns = <60>;
    		cdns,tsd2d-ns = <60>;
    		cdns,tchsh-ns = <60>;
    		cdns,tslch-ns = <60>;
    		cdns,read-delay = <4>;
    
    		partitions {
    			compatible = "fixed-partitions";
    			#address-cells = <1>;
    			#size-cells = <1>;
    
    			partition@0 {
    				label = "ospi.tiboot3";
    				reg = <0x0 0x100000>;
    			};
    
    			partition@100000 {
    				label = "ospi.tispl";
    				reg = <0x100000 0x200000>;
    			};
    
    			partition@300000 {
    				label = "ospi.u-boot";
    				reg = <0x300000 0x400000>;
    			};
    
    			partition@700000 {
    				label = "ospi.env";
    				reg = <0x700000 0x40000>;
    			};
    
    			partition@740000 {
    				label = "ospi.env.backup";
    				reg = <0x740000 0x40000>;
    			};
    
    			partition@800000 {
    				label = "ospi.rootfs";
    				reg = <0x800000 0x37c0000>;
    			};
    
    			partition@3fc0000 {
    				label = "ospi.phypattern";
    				reg = <0x3fc0000 0x40000>;
    			};
    		};
    	};
    };
    
    &mailbox0_cluster2 {
    	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
    		ti,mbox-rx = <0 0 2>;
    		ti,mbox-tx = <1 0 2>;
    	};
    
    	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
    		ti,mbox-rx = <2 0 2>;
    		ti,mbox-tx = <3 0 2>;
    	};
    };
    
    &mailbox0_cluster3 {
    	status = "disabled";
    };
    
    &mailbox0_cluster4 {
    	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
    		ti,mbox-rx = <0 0 2>;
    		ti,mbox-tx = <1 0 2>;
    	};
    
    	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
    		ti,mbox-rx = <2 0 2>;
    		ti,mbox-tx = <3 0 2>;
    	};
    };
    
    &mailbox0_cluster5 {
    	status = "disabled";
    };
    
    &mailbox0_cluster6 {
    	mbox_m4_0: mbox-m4-0 {
    		ti,mbox-rx = <0 0 2>;
    		ti,mbox-tx = <1 0 2>;
    	};
    };
    
    &mailbox0_cluster7 {
    	status = "disabled";
    };
    
    &main_r5fss0_core0 {
    	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
    	memory-region = <&main_r5fss0_core0_dma_memory_region>,
    			<&main_r5fss0_core0_memory_region>;
    };
    
    &main_r5fss0_core1 {
    	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
    	memory-region = <&main_r5fss0_core1_dma_memory_region>,
    			<&main_r5fss0_core1_memory_region>;
    };
    
    &main_r5fss1_core0 {
    	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
    	memory-region = <&main_r5fss1_core0_dma_memory_region>,
    			<&main_r5fss1_core0_memory_region>;
    };
    
    &main_r5fss1_core1 {
    	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
    	memory-region = <&main_r5fss1_core1_dma_memory_region>,
    			<&main_r5fss1_core1_memory_region>;
    };
    
    &mcu_m4fss {
    	mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
    	memory-region = <&mcu_m4fss_dma_memory_region>,
    			<&mcu_m4fss_memory_region>;
    };
    
    &ecap0 {
    	status = "okay";
    	/* PWM is available on Pin 1 of header J3 */
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_ecap0_pins_default>;
    };
    
    &eqep0 {
    	/* EQEP0_A is available on Pin 18 of header J4 */
    	/* EQEP0_B is available on Pin 22 of header J4 */
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_eqep0_pins_default>;
    };
    
    #define TS_OFFSET(pa, val)     (0x4+(pa)*4) (0x10000 | val)
    
    &timesync_router {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&cpsw_cpts_pps>;
    
    	/*
    	 * Use Time Sync Router to map GENF1 input to HW8_TS_PUSH output as well
    	 * as the PRU ICSSG0 SYNC1 output.
    	 */
    	cpsw_cpts_pps: cpsw-cpts-pps {
    		pinctrl-single,pins = <
    			/* pps [cpts genf1] in22 -> out37 [cpts hw8_push] */
    			TS_OFFSET(37, 22)
    			/* pps [cpts genf1] in22 -> out26 [SYNC1_OUT pin] */
    			TS_OFFSET(26, 22)
    			>;
    	};
    };
    /*
    &main_gpio1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mygpio1_pins_default>;
    }; */
    
    &main_spi0 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_spi0_pins_default>;
    
    	ksz9477: ksz9477@0 {
    		compatible = "microchip,ksz9477";
    		reg = <0>;
    		spi-max-frequency = <1000000>;
    		spi-cpha;
    		spi-cpol;
    		reset-gpios = <&main_gpio1 30 GPIO_ACTIVE_LOW>;
    		status = "okay";
    
    		ports {
    				#address-cells = <1>;
    				#size-cells = <0>;
    				port@0 {
    						reg = <0>;
    						label = "lan1";
    				};
    				port@1 {
    						reg = <1>;
    						label = "lan2";
    				};
    				port@2 {
    						reg = <2>;
    						label = "lan3";
    				};
    				port@3 {
    						reg = <3>;
    						label = "lan4";
    				};
    				port@4 {
    						reg = <4>;
    						label = "lan5";
    				};
    				port@5 {
    					    reg = <5>;
    						label = "cpu";
    						/*ethernet = <&mac>;*/
    						phy-mode = "mii";
    						/*tx-internal-delay-ps = <2000>;*/
    						fixed-link {
    								speed = <100>;
    								full-duplex;
    						};
    				};
    				/*port@6 {
    						reg = <6>;
    						label = "lan6";
    				};*/
    			};
    	};
    	
    };
    
    &cpsw3g {
    	pinctrl-0 = <&rgmii1_pins_default>;
    };
    
    &cpsw_port2 {
    	status = "disabled";
    };
    
    &icssg1_eth {
    	pinctrl-0 = <&kszpruicssg0miigrt1_pins_default>;
    	status = "okay";
    };
    
    &icssg1_emac0 {
    	phy-mode = "mii";
    };
    
    &icssg1_emac1 {
    	status = "okay";
    	phy-handle = <&icssg1_phy2>;
    	phy-mode = "mii";
    }; 
    
    &icssg1_mdio {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&mypruicssg0mdio1_pins_default>;
    
    	icssg1_phy1: ethernet-phy@0 {
    		reg = <0xf>;
    		tx-internal-delay-ps = <250>;
    		rx-internal-delay-ps = <2000>;
    	};
    };
    
    &pru1_1 {
    	firmware-name = "ti-pruss/am65x-sr2-pru1-prueth-fw.elf";
    	status = "okay";
    };

    As i have incorporated the MII changes from the overlay dtso file to this base dts file.....executing the uboot command is not needed i suppose.

    Here is the block diagram of KSZ9477 ethernt switch IC , which is SPI slave connected to AM64x master . With the MII interconnection to GMAC6 of KSZ9477. On AM64 EVM side , it is connected on ICSSG PRG0_PRU0 inetrface as seen in the attached k3-am642-sk.dts file.

    The KSZ9477 kernel device driver is able to load and read the chip ID. Below is the kernel log messages ......

    The issue is it is not able to load the ports because it is not able to find the CPU port .

    [   15.854082] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
    
     _____                    _____           _         _   
    |  _  |___ ___ ___ ___   |  _  |___ ___  |_|___ ___| |_ 
    |     |  _| .'| . | . |  |   __|  _| . | | | -_|  _|  _|
    |__|__|_| |__,|_  |___|  |__|  |_| |___|_| |___|___|_|  
                  |___|                    |___|            
    
    Arago Project am64xx-evm [   16.159685] ksz-switch spi0.0: found switch: KSZ9477, rev 0
    -
    
    Arago 2023.10 am64xx-evm -
    
    am64xx-evm login: [   16.224835] xhci-hcd xhci-hcd.6.auto: xHCI Host Controller
    [   16.230788] **Ankush** file = net/dsa/dsa2.c, line = 1783
    [   16.256940] xhci-hcd xhci-hcd.6.auto: new USB bus registered, assigned bus number 1
    [   16.271464] xhci-hcd xhci-hcd.6.auto: hcc params 0x200073c9 hci version 0x100 quirks 0x0000002000018010
    [   16.272568] **Ankush** file = net/dsa/dsa2.c, line = 412
    [   16.281327] xhci-hcd xhci-hcd.6.auto: irq 523, io mem 0x0f410000
    [   16.286666] DSA: tree 0 has no CPU port
    [   16.296469] **Ankush** file = net/dsa/dsa2.c, line = 1150, err = -22
    [   16.303108] **Ankush** file = net/dsa/dsa2.c, line = 1769,err = -22
    [   16.309695] **Ankush** file = net/dsa/dsa2.c, line = 1785, err = -22
    [   16.320665] xhci-hcd xhci-hcd.6.auto: xHCI Host Controller
    [   16.326328] xhci-hcd xhci-hcd.6.auto: new USB bus registered, assigned bus number 2
    [   16.337950] xhci-hcd xhci-hcd.6.auto: Host supports USB 3.0 SuperSpeed
    [   16.348707] **Ankush** file = net/dsa/dsa2.c, line = 1789, err = -22
    [   16.355409] **Ankush** file = drivers/net/dsa/microchip/ksz_common.c, line = 3056, ret = -22
    [   16.357059] wl18xx_driver wl18xx.5.auto: Direct firmware load for ti-connectivity/wl1271-nvs.bin failed with error -2
    [   16.364576] **Ankush** ret = -22, line = 97
    [   16.378732] ksz-switch: probe of spi0.0 failed with error -22
    [   16.389360] hub 1-0:1.0: USB hub found
    [   16.397401] hub 1-0:1.0: 1 port detected
    [   16.412107] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
    [   16.430020] hub 2-0:1.0: USB hub found
    [   16.447931] hub 2-0:1.0: 1 port detected
    [   16.748247] wlcore: wl18xx HW: 183x or 180x, PG 2.2 (ROM 0x11)
    [   16.763024] wlcore: loaded
    [   17.331569] wlcore: using inverted interrupt logic: 2
    [   17.411867] wlcore: PHY firmware version: Rev 8.2.0.0.245
    [   17.514490] wlcore: firmware booted (Rev 8.9.0.0.86)
    [   26.516841] platform mux-controller: deferred probe pending
    [   26.522493] platform mdio-mux-2: deferred probe pending
    [   26.527740] platform led-controller: deferred probe pending
    
    

    Now that the PRU ETH firmware is not able to load during boot, i suppose the ksz device driver is failing the read the cpu port .

    Hardware interconnection details: We have connected the SK-AM64B and KSZ9477 EVM over the SPI and MII interface. The SPI driver is able to read the chip ID and not moving further as it is failing to read rhe CPU port (MII).

    [   16.286666] DSA: tree 0 has no CPU port
    .

    Am not sure wat am missing in the attached dts file. Pls suggest.

    Regards,

    ANkush

  • Hi,

    Update: Upon referring to the link that u have shared, came to know that i was using icssg1 in my dts. Then updated it to isccg0 , and then the ICSSG0 PRU firmware is able to load. but some kernel crash is happening. Below is the updated k3-am642-sk.dts file.

    // SPDX-License-Identifier: GPL-2.0
    /*
     * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
     */
    
    /dts-v1/;
    
    #include <dt-bindings/mux/ti-serdes.h>
    #include <dt-bindings/phy/phy.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/net/ti-dp83867.h>
    #include <dt-bindings/leds/common.h>
    #include "k3-am642.dtsi"
    
    / {
    	compatible = "ti,am642-sk", "ti,am642";
    	model = "Texas Instruments AM642 SK";
    
    	aliases {
    		ethernet1 = "/icssg0-eth/ethernet-ports/port@0";
    		ethernet2 = "/icssg0-eth/ethernet-ports/port@1";
    		spi0 = &main_spi0;
    		gpio1 = &main_gpio1;
    	};
    
    	chosen {
    		stdout-path = "serial2:115200n8";
    		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
    	};
    
    	memory@80000000 {
    		device_type = "memory";
    		/* 2G RAM */
    		reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
    
    	};
    
    	reserved-memory {
    		#address-cells = <2>;
    		#size-cells = <2>;
    		ranges;
    
    		secure_ddr: optee@9e800000 {
    			reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
    			alignment = <0x1000>;
    			no-map;
    		};
    
    		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa0000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa0100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa1000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa1100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa2000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa2100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa3000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa3100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa4000000 0x00 0x100000>;
    			no-map;
    		};
    
    		mcu_m4fss_memory_region: m4f-memory@a4100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa4100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		rtos_ipc_memory_region: ipc-memories@a5000000 {
    			reg = <0x00 0xa5000000 0x00 0x00800000>;
    			alignment = <0x1000>;
    			no-map;
    		};
    	};
    
    	vusb_main: fixed-regulator-vusb-main5v0 {
    		/* USB MAIN INPUT 5V DC */
    		compatible = "regulator-fixed";
    		regulator-name = "vusb_main5v0";
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vcc_3v3_sys: fixedregulator-vcc-3v3-sys {
    		/* output of LP8733xx */
    		compatible = "regulator-fixed";
    		regulator-name = "vcc_3v3_sys";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		vin-supply = <&vusb_main>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vdd_mmc1: fixed-regulator-sd {
    		/* TPS2051BD */
    		compatible = "regulator-fixed";
    		regulator-name = "vdd_mmc1";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-boot-on;
    		enable-active-high;
    		vin-supply = <&vcc_3v3_sys>;
    		gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
    	};
    
    	com8_ls_en: regulator-1 {
    		compatible = "regulator-fixed";
    		regulator-name = "com8_ls_en";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-always-on;
    		regulator-boot-on;
    		pinctrl-0 = <&main_com8_ls_en_pins_default>;
    		pinctrl-names = "default";
    		gpio = <&main_gpio0 62 GPIO_ACTIVE_LOW>;
    	};
    
    	wlan_en: regulator-2 {
    		/* output of SN74AVC4T245RSVR */
    		compatible = "regulator-fixed";
    		regulator-name = "wlan_en";
    		regulator-min-microvolt = <1800000>;
    		regulator-max-microvolt = <1800000>;
    		enable-active-high;
    		pinctrl-0 = <&main_wlan_en_pins_default>;
    		pinctrl-names = "default";
    		vin-supply = <&com8_ls_en>;
    		gpio = <&main_gpio0 48 GPIO_ACTIVE_HIGH>;
    	};
    
    	led-controller {
    		compatible = "gpio-leds";
    
    		led-0 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <1>;
    			gpios = <&exp2 0 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-1 {
    			color = <LED_COLOR_ID_RED>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <2>;
    			gpios = <&exp2 1 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-2 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <3>;
    			gpios = <&exp2 2 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-3 {
    			color = <LED_COLOR_ID_AMBER>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <4>;
    			gpios = <&exp2 3 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-4 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <5>;
    			gpios = <&exp2 4 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-5 {
    			color = <LED_COLOR_ID_RED>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <6>;
    			gpios = <&exp2 5 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-6 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <7>;
    			gpios = <&exp2 6 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-7 {
    			color = <LED_COLOR_ID_AMBER>;
    			function = LED_FUNCTION_HEARTBEAT;
    			function-enumerator = <8>;
    			linux,default-trigger = "heartbeat";
    			gpios = <&exp2 7 GPIO_ACTIVE_HIGH>;
    		};
    	};
    
    	mdio_mux: mux-controller {
    		compatible = "gpio-mux";
    		#mux-control-cells = <0>;
    
    		mux-gpios = <&exp1 12 GPIO_ACTIVE_HIGH>;
    	};
    
    	icssg0_eth: icssg0-eth {
    		compatible = "ti,am642-icssg-prueth";
    		pinctrl-names = "default";
    		pinctrl-0 = <&kszpruicssg0miigrt1_pins_default>;
    
    		sram = <&oc_sram>;
    		ti,prus = <&pru0_0>, <&rtu0_0>, <&tx_pru0_0>, <&pru0_1>, <&rtu0_1>, <&tx_pru0_1>;
    		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";
    
    		ti,pruss-gp-mux-sel = <2>,	/* MII mode */
    				      <2>,
    				      <2>,
    				      <2>,	/* MII mode */
    				      <2>,
    				      <2>;
    
    		ti,mii-g-rt = <&icssg0_mii_g_rt>;
    		ti,mii-rt = <&icssg0_mii_rt>;
    		ti,pa-stats = <&icssg0_pa_stats>;
    		iep = <&icssg0_iep0>,  <&icssg0_iep1>;
    
    		interrupt-parent = <&icssg0_intc>;
    		interrupts = <24 0 2>, <25 1 3>;
    		interrupt-names = "tx_ts0", "tx_ts1";
    
    		dmas = <&main_pktdma 0xc100 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc101 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc102 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc103 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc104 15>, /* egress slice 1 */
    		       <&main_pktdma 0xc105 15>, /* egress slice 1 */
    		       <&main_pktdma 0xc106 15>, /* egress slice 1 */
    		       <&main_pktdma 0xc107 15>, /* egress slice 1 */
    		       <&main_pktdma 0x4100 15>, /* ingress slice 0 */
    		       <&main_pktdma 0x4101 15>, /* ingress slice 1 */
    		       <&main_pktdma 0x4102 0>, /* mgmnt rsp slice 0 */
    		       <&main_pktdma 0x4103 0>; /* mgmnt rsp slice 1 */
    		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
    			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
    			    "rx0", "rx1",
    				"rxmgm0", "rxmgm1";
    
    		ethernet-ports {
    			#address-cells = <1>;
    			#size-cells = <0>;
    			icssg0_emac0: port@0 {
    				reg = <0>;
    				phy-handle = <&icssg0_phy1>;
    				phy-mode = "mii";
    				/*ti,syscon-rgmii-delay = <&main_conf 0x4110>;*/
    				/* Filled in by bootloader */
    				local-mac-address = [00 00 00 00 00 00];
    			};
    			icssg0_emac1: port@1 {
    				reg = <1>;
    				/*ti,syscon-rgmii-delay = <&main_conf 0x4114>;*/
    				/* Filled in by bootloader */
    				local-mac-address = [00 00 00 00 00 00];
    				status = "disabled";
    			};
    		};
    	};
    	
    	mdio-mux-2 {
    		compatible = "mdio-mux-multiplexer";
    		mux-controls = <&mdio_mux>;
    		mdio-parent-bus = <&icssg1_mdio>;
    		#address-cells = <1>;
    		#size-cells = <0>;
    
    		mdio@0 {
    			reg = <0x0>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    
    			icssg1_phy2: ethernet-phy@3 {
    				reg = <3>;
    			};
    		};
    	}; 
    };
    
    &main_pmx0 {
    
    	pinctrl-names = "default";
    	pinctrl-0 = <&mygpio1_pins_default>;
    
    	main_mmc1_pins_default: main-mmc1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0294, PIN_INPUT, 0) /* (J19) MMC1_CMD */
    			AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */
    			AM64X_IOPAD(0x028c, PIN_INPUT, 0) /* (L20) MMC1_CLK */
    			AM64X_IOPAD(0x0288, PIN_INPUT, 0) /* (K21) MMC1_DAT0 */
    			AM64X_IOPAD(0x0284, PIN_INPUT, 0) /* (L21) MMC1_DAT1 */
    			AM64X_IOPAD(0x0280, PIN_INPUT, 0) /* (K19) MMC1_DAT2 */
    			AM64X_IOPAD(0x027c, PIN_INPUT, 0) /* (K18) MMC1_DAT3 */
    			AM64X_IOPAD(0x0298, PIN_INPUT, 0) /* (D19) MMC1_SDCD */
    		>;
    	};
    
    	main_uart0_pins_default: main-uart0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
    			AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
    			AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
    			AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
    		>;
    	};
    
    	main_usb0_pins_default: main-usb0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
    		>;
    	};
    
    	main_i2c1_pins_default: main-i2c1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */
    			AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */
    		>;
    	};
    
    	mdio1_pins_default: mdio1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
    			AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
    		>;
    	};
    
    	rgmii1_pins_default: rgmii1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x011c, PIN_INPUT, 4) /* (AA13) PRG1_PRU1_GPO5.RGMII1_RD0 */
    			AM64X_IOPAD(0x0128, PIN_INPUT, 4) /* (U12) PRG1_PRU1_GPO8.RGMII1_RD1 */
    			AM64X_IOPAD(0x0150, PIN_INPUT, 4) /* (Y13) PRG1_PRU1_GPO18.RGMII1_RD2 */
    			AM64X_IOPAD(0x0154, PIN_INPUT, 4) /* (V12) PRG1_PRU1_GPO19.RGMII1_RD3 */
    			AM64X_IOPAD(0x00d8, PIN_INPUT, 4) /* (W13) PRG1_PRU0_GPO8.RGMII1_RXC */
    			AM64X_IOPAD(0x00cc, PIN_INPUT, 4) /* (V13) PRG1_PRU0_GPO5.RGMII1_RX_CTL */
    			AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
    			AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
    			AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
    			AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
    			AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
    			AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
    		>;
    	};
    
           rgmii2_pins_default: rgmii2-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
    			AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
    			AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */
    			AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */
    			AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */
    			AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */
    			AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */
    			AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */
    			AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */
    			AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */
    			AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */
    			AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
    		>;
    	};
    
    	ospi0_pins_default: ospi0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */
    			AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */
    			AM64X_IOPAD(0x000c, PIN_INPUT, 0) /* (M19) OSPI0_D0 */
    			AM64X_IOPAD(0x0010, PIN_INPUT, 0) /* (M18) OSPI0_D1 */
    			AM64X_IOPAD(0x0014, PIN_INPUT, 0) /* (M20) OSPI0_D2 */
    			AM64X_IOPAD(0x0018, PIN_INPUT, 0) /* (M21) OSPI0_D3 */
    			AM64X_IOPAD(0x001c, PIN_INPUT, 0) /* (P21) OSPI0_D4 */
    			AM64X_IOPAD(0x0020, PIN_INPUT, 0) /* (P20) OSPI0_D5 */
    			AM64X_IOPAD(0x0024, PIN_INPUT, 0) /* (N18) OSPI0_D6 */
    			AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */
    			AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
    		>;
    	};
    
    	main_ecap0_pins_default: main-ecap0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
    		>;
    	};
    	main_wlan_en_pins_default: main-wlan-en-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */
    		>;
    	};
    
    	main_com8_ls_en_pins_default: main-com8-ls-en-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00fc, PIN_OUTPUT, 7) /* (U7) PRG1_PRU0_GPO17.GPIO0_62 */
    		>;
    	};
    
    	main_wlan_pins_default: main-wlan-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00bc, PIN_INPUT, 7) /* (U8) GPIO0_46 */
    		>;
    	};
    
    	main_eqep0_pins_default: main-eqep0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00a0, PIN_INPUT, 3) /* (N16) GPMC0_WPn.EQEP0_A */
    			AM64X_IOPAD(0x00a4, PIN_INPUT, 3) /* (N17) GPMC0_DIR.EQEP0_B */
    			AM64X_IOPAD(0x00ac, PIN_INPUT, 3) /* (R20) GPMC0_CSn1.EQEP0_I */
    			AM64X_IOPAD(0x00a8, PIN_INPUT, 3) /* (R19) GPMC0_CSn0.EQEP0_S */
    		>;
    	};
    
    	main_spi0_pins_default: myspi0ksz-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0210, PIN_INPUT, 0) /* (D13) SPI0_CLK */
    			AM64X_IOPAD(0x0214, PIN_INPUT, 0) /* (A13) SPI0_D0 */
    			AM64X_IOPAD(0x0218, PIN_INPUT, 0) /* (A14) SPI0_D1 */
    			AM64X_IOPAD(0x0208, PIN_INPUT, 0) /* (D12) SPI0_CS0 */
    		>;
    	};
    
    	kszpruicssg0miigrt1_pins_default: kszpruicssg0miigrt1-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x01f0, PIN_INPUT, 1) /* (AA4) PRG0_PRU1_GPO16.PR0_MII_MT1_CLK */
    			AM64X_IOPAD(0x01ec, PIN_OUTPUT, 0) /* (U5) PRG0_PRU1_GPO15.PR0_MII1_TXEN */
    			AM64X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (U6) PRG0_PRU1_GPO14.PR0_MII1_TXD3 */
    			AM64X_IOPAD(0x01e4, PIN_OUTPUT, 0) /* (T6) PRG0_PRU1_GPO13.PR0_MII1_TXD2 */
    			AM64X_IOPAD(0x01e0, PIN_OUTPUT, 0) /* (Y4) PRG0_PRU1_GPO12.PR0_MII1_TXD1 */
    			AM64X_IOPAD(0x01dc, PIN_OUTPUT, 0) /* (W4) PRG0_PRU1_GPO11.PR0_MII1_TXD0 */
    			AM64X_IOPAD(0x01c0, PIN_INPUT, 1) /* (W3) PRG0_PRU1_GPO4.PR0_MII1_RXDV */
    			AM64X_IOPAD(0x01c8, PIN_INPUT, 1) /* (R5) PRG0_PRU1_GPO6.PR0_MII_MR1_CLK */
    			AM64X_IOPAD(0x01bc, PIN_INPUT, 1) /* (T4) PRG0_PRU1_GPO3.PR0_MII1_RXD3 */
    			AM64X_IOPAD(0x01b8, PIN_INPUT, 1) /* (V3) PRG0_PRU1_GPO2.PR0_MII1_RXD2 */
    			AM64X_IOPAD(0x01c4, PIN_INPUT, 1) /* (P4) PRG0_PRU1_GPO5.PR0_MII1_RXER */
    			AM64X_IOPAD(0x01b4, PIN_INPUT, 1) /* (W2) PRG0_PRU1_GPO1.PR0_MII1_RXD1 */
    			AM64X_IOPAD(0x01b0, PIN_INPUT, 1) /* (Y2) PRG0_PRU1_GPO0.PR0_MII1_RXD0 */
    			AM64X_IOPAD(0x01d0, PIN_INPUT, 1) /* (R1) PRG0_PRU1_GPO8.PR0_MII1_RXLINK */
    		>;
    	};
    
    	mygpio1_pins_default: mygpio1-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0164, PIN_OUTPUT, 7) /* (R4) PRG0_PRU0_GPO1.GPIO1_1 */
    			AM64X_IOPAD(0x01d8, PIN_OUTPUT, 7) /* (V6) PRG0_PRU1_GPO10.GPIO1_30 */
    		>;
    	};
    
    	mypruicssg0mdio1_pins_default: mypruicssg0mdio1-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0204, PIN_OUTPUT, 0) /* (P3) PRG0_MDIO0_MDC */
    			AM64X_IOPAD(0x0200, PIN_INPUT, 0) /* (P2) PRG0_MDIO0_MDIO */
    		>;
    	};
    };
    
    &main_uart0 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_uart0_pins_default>;
    };
    
    &main_uart1 {
    	/* main_uart1 is reserved for firmware usage */
    	status = "reserved";
    };
    
    &main_i2c1 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_i2c1_pins_default>;
    	clock-frequency = <400000>;
    
    	exp1: gpio@70 {
    		compatible = "nxp,pca9538";
    		reg = <0x70>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
    				  "PRU_DETECT", "MMC1_SD_EN",
    				  "VPP_LDO_EN", "RPI_PS_3V3_En",
    				  "RPI_PS_5V0_En", "RPI_HAT_DETECT";
    	};
    
    	exp2: gpio@60 {
    		compatible = "ti,tpic2810";
    		reg = <0x60>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		gpio-line-names = "LED1","LED2","LED3","LED4","LED5","LED6","LED7","LED8";
    	};
    };
    
    /* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */
    &mcu_gpio0 {
    	status = "reserved";
    };
    
    &mcu_gpio_intr {
    	status = "reserved";
    };
    
    &sdhci0 {
    	status = "okay";
    	vmmc-supply = <&wlan_en>;
    	bus-width = <4>;
    	non-removable;
    	cap-power-off-card;
    	keep-power-in-suspend;
    	ti,driver-strength-ohm = <50>;
    
    	#address-cells = <1>;
    	#size-cells = <0>;
    	wlcore: wlcore@2 {
    		compatible = "ti,wl1837";
    		reg = <2>;
    		pinctrl-0 = <&main_wlan_pins_default>;
    		pinctrl-names = "default";
    		interrupt-parent = <&main_gpio0>;
    		interrupts = <46 IRQ_TYPE_EDGE_FALLING>;
    	};
    };
    
    &sdhci1 {
    	/* SD/MMC */
    	status = "okay";
    	vmmc-supply = <&vdd_mmc1>;
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mmc1_pins_default>;
    	disable-wp;
    };
    
    &serdes_ln_ctrl {
    	idle-states = <AM64_SERDES0_LANE0_USB>;
    };
    
    &serdes0 {
    	serdes0_usb_link: phy@0 {
    		reg = <0>;
    		cdns,num-lanes = <1>;
    		#phy-cells = <0>;
    		cdns,phy-type = <PHY_TYPE_USB3>;
    		resets = <&serdes_wiz0 1>;
    	};
    };
    
    &usbss0 {
    	ti,vbus-divider;
    };
    
    &usb0 {
    	dr_mode = "host";
    	maximum-speed = "super-speed";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_usb0_pins_default>;
    	phys = <&serdes0_usb_link>;
    	phy-names = "cdns3,usb3-phy";
    };
    
    &cpsw3g {
    	pinctrl-names = "default";
    	pinctrl-0 = <&rgmii1_pins_default
    		     &rgmii2_pins_default>;
    
    	/* Map HW8_TS_PUSH to GENF1 */
    	cpts@3d000 {
    		ti,pps = <7 1>;
    	};
    };
    
    &cpsw_port1 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&cpsw3g_phy0>;
    };
    
    &cpsw_port2 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&cpsw3g_phy1>;
    };
    
    &cpsw3g_mdio {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&mdio1_pins_default>;
    
    	cpsw3g_phy0: ethernet-phy@0 {
    		reg = <0>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    	};
    
    	cpsw3g_phy1: ethernet-phy@1 {
    		reg = <1>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    	};
    };
    
    &tscadc0 {
    	status = "disabled";
    };
    
    &ospi0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&ospi0_pins_default>;
    
    	flash@0 {
    		compatible = "jedec,spi-nor";
    		reg = <0x0>;
    		spi-tx-bus-width = <8>;
    		spi-rx-bus-width = <8>;
    		spi-max-frequency = <25000000>;
    		cdns,tshsl-ns = <60>;
    		cdns,tsd2d-ns = <60>;
    		cdns,tchsh-ns = <60>;
    		cdns,tslch-ns = <60>;
    		cdns,read-delay = <4>;
    
    		partitions {
    			compatible = "fixed-partitions";
    			#address-cells = <1>;
    			#size-cells = <1>;
    
    			partition@0 {
    				label = "ospi.tiboot3";
    				reg = <0x0 0x100000>;
    			};
    
    			partition@100000 {
    				label = "ospi.tispl";
    				reg = <0x100000 0x200000>;
    			};
    
    			partition@300000 {
    				label = "ospi.u-boot";
    				reg = <0x300000 0x400000>;
    			};
    
    			partition@700000 {
    				label = "ospi.env";
    				reg = <0x700000 0x40000>;
    			};
    
    			partition@740000 {
    				label = "ospi.env.backup";
    				reg = <0x740000 0x40000>;
    			};
    
    			partition@800000 {
    				label = "ospi.rootfs";
    				reg = <0x800000 0x37c0000>;
    			};
    
    			partition@3fc0000 {
    				label = "ospi.phypattern";
    				reg = <0x3fc0000 0x40000>;
    			};
    		};
    	};
    };
    
    &mailbox0_cluster2 {
    	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
    		ti,mbox-rx = <0 0 2>;
    		ti,mbox-tx = <1 0 2>;
    	};
    
    	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
    		ti,mbox-rx = <2 0 2>;
    		ti,mbox-tx = <3 0 2>;
    	};
    };
    
    &mailbox0_cluster3 {
    	status = "disabled";
    };
    
    &mailbox0_cluster4 {
    	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
    		ti,mbox-rx = <0 0 2>;
    		ti,mbox-tx = <1 0 2>;
    	};
    
    	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
    		ti,mbox-rx = <2 0 2>;
    		ti,mbox-tx = <3 0 2>;
    	};
    };
    
    &mailbox0_cluster5 {
    	status = "disabled";
    };
    
    &mailbox0_cluster6 {
    	mbox_m4_0: mbox-m4-0 {
    		ti,mbox-rx = <0 0 2>;
    		ti,mbox-tx = <1 0 2>;
    	};
    };
    
    &mailbox0_cluster7 {
    	status = "disabled";
    };
    
    &main_r5fss0_core0 {
    	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
    	memory-region = <&main_r5fss0_core0_dma_memory_region>,
    			<&main_r5fss0_core0_memory_region>;
    };
    
    &main_r5fss0_core1 {
    	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
    	memory-region = <&main_r5fss0_core1_dma_memory_region>,
    			<&main_r5fss0_core1_memory_region>;
    };
    
    &main_r5fss1_core0 {
    	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
    	memory-region = <&main_r5fss1_core0_dma_memory_region>,
    			<&main_r5fss1_core0_memory_region>;
    };
    
    &main_r5fss1_core1 {
    	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
    	memory-region = <&main_r5fss1_core1_dma_memory_region>,
    			<&main_r5fss1_core1_memory_region>;
    };
    
    &mcu_m4fss {
    	mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
    	memory-region = <&mcu_m4fss_dma_memory_region>,
    			<&mcu_m4fss_memory_region>;
    };
    
    &ecap0 {
    	status = "okay";
    	/* PWM is available on Pin 1 of header J3 */
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_ecap0_pins_default>;
    };
    
    &eqep0 {
    	/* EQEP0_A is available on Pin 18 of header J4 */
    	/* EQEP0_B is available on Pin 22 of header J4 */
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_eqep0_pins_default>;
    };
    
    #define TS_OFFSET(pa, val)     (0x4+(pa)*4) (0x10000 | val)
    
    &timesync_router {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&cpsw_cpts_pps>;
    
    	/*
    	 * Use Time Sync Router to map GENF1 input to HW8_TS_PUSH output as well
    	 * as the PRU ICSSG0 SYNC1 output.
    	 */
    	cpsw_cpts_pps: cpsw-cpts-pps {
    		pinctrl-single,pins = <
    			/* pps [cpts genf1] in22 -> out37 [cpts hw8_push] */
    			TS_OFFSET(37, 22)
    			/* pps [cpts genf1] in22 -> out26 [SYNC1_OUT pin] */
    			TS_OFFSET(26, 22)
    			>;
    	};
    };
    /*
    &main_gpio1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mygpio1_pins_default>;
    }; */
    
    &main_spi0 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_spi0_pins_default>;
    
    	ksz9477: ksz9477@0 {
    		compatible = "microchip,ksz9477";
    		reg = <0>;
    		spi-max-frequency = <1000000>;
    		spi-cpha;
    		spi-cpol;
    		reset-gpios = <&main_gpio1 30 GPIO_ACTIVE_LOW>;
    		status = "okay";
    
    		ports {
    				#address-cells = <1>;
    				#size-cells = <0>;
    				port@0 {
    						reg = <0>;
    						label = "lan1";
    				};
    				port@1 {
    						reg = <1>;
    						label = "lan2";
    				};
    				port@2 {
    						reg = <2>;
    						label = "lan3";
    				};
    				port@3 {
    						reg = <3>;
    						label = "lan4";
    				};
    				port@4 {
    						reg = <4>;
    						label = "lan5";
    				};
    				port@5 {
    					    reg = <5>;
    						label = "cpu";
    						/*ethernet = <&mac>;*/
    						phy-mode = "mii";
    						/*tx-internal-delay-ps = <2000>;*/
    						fixed-link {
    								speed = <100>;
    								full-duplex;
    						};
    				};
    				/*port@6 {
    						reg = <6>;
    						label = "lan6";
    				};*/
    			};
    	};
    	
    };
    
    &cpsw3g {
    	pinctrl-0 = <&rgmii1_pins_default>;
    };
    
    &cpsw_port2 {
    	status = "disabled";
    };
    
    &icssg0_eth {
    	pinctrl-0 = <&kszpruicssg0miigrt1_pins_default>;
    	status = "okay";
    };
    
    &icssg0_emac0 {
    	phy-mode = "mii";
    };
    
    &icssg0_emac1 {
    	status = "okay";
    	phy-handle = <&icssg1_phy2>;
    	phy-mode = "mii";
    }; 
    
    &icssg0_mdio {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&mypruicssg0mdio1_pins_default>;
    
    	icssg0_phy1: ethernet-phy@0 {
    		reg = <0xf>;
    		tx-internal-delay-ps = <250>;
    		rx-internal-delay-ps = <2000>;
    	};
    };
    /*
    &pru1_1 {
    	firmware-name = "ti-pruss/am65x-sr2-pru1-prueth-fw.elf";
    	status = "okay";
    };*/

    Below is the kernel boot log captured .

    Starting kernel ...
    
    [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
    [    0.000000] Linux version 6.1.83 (ankush@BLRLPT0017) (aarch64-none-linux-gnu-gcc (Arm GNU Toolchain 11.3.Rel1) 11.3.1 20220712, GNU ld (Arm GNU Toolchain 11.3.Rel1) 2.38.20220708) #8 SMP PREEMPT Mon 4
    [    0.000000] Machine model: Texas Instruments AM642 SK
    [    0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002800000 (options '')
    [    0.000000] printk: bootconsole [ns16550a0] enabled
    [    0.000000] efi: UEFI not found.
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a0000000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a0000000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a0100000, size 15 MiB
    [    0.000000] OF: reserved mem: initialized node r5f-memory@a0100000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a1000000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a1000000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a1100000, size 15 MiB
    [    0.000000] OF: reserved mem: initialized node r5f-memory@a1100000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a2000000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a2000000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a2100000, size 15 MiB
    [    0.000000] OF: reserved mem: initialized node r5f-memory@a2100000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a3000000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a3000000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a3100000, size 15 MiB
    [    0.000000] OF: reserved mem: initialized node r5f-memory@a3100000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a4000000, size 1 MiB
    [    0.000000] OF: reserved mem: initialized node m4f-dma-memory@a4000000, compatible id shared-dma-pool
    [    0.000000] Reserved memory: created DMA memory pool at 0x00000000a4100000, size 15 MiB
    [    0.000000] OF: reserved mem: initialized node m4f-memory@a4100000, compatible id shared-dma-pool
    [    0.000000] NUMA: No NUMA configuration found
    [    0.000000] NUMA: Faking a node at [mem 0x0000000080000000-0x00000000ffffffff]
    [    0.000000] NUMA: NODE_DATA [mem 0xffbfaa00-0xffbfcfff]
    [    0.000000] Zone ranges:
    [    0.000000]   DMA      [mem 0x0000000080000000-0x00000000ffffffff]
    [    0.000000]   DMA32    empty
    [    0.000000]   Normal   empty
    [    0.000000] Movable zone start for each node
    [    0.000000] Early memory node ranges
    [    0.000000]   node   0: [mem 0x0000000080000000-0x000000009e7fffff]
    [    0.000000]   node   0: [mem 0x000000009e800000-0x00000000a57fffff]
    [    0.000000]   node   0: [mem 0x00000000a5800000-0x00000000ffffffff]
    [    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000000ffffffff]
    [    0.000000] cma: Reserved 32 MiB at 0x00000000fba00000
    [    0.000000] psci: probing for conduit method from DT.
    [    0.000000] psci: PSCIv1.1 detected in firmware.
    [    0.000000] psci: Using standard PSCI v0.2 function IDs
    [    0.000000] psci: Trusted OS migration not required
    [    0.000000] psci: SMC Calling Convention v1.4
    [    0.000000] percpu: Embedded 21 pages/cpu s48040 r8192 d29784 u86016
    [    0.000000] Detected VIPT I-cache on CPU0
    [    0.000000] CPU features: detected: GIC system register CPU interface
    [    0.000000] CPU features: detected: ARM erratum 845719
    [    0.000000] alternatives: applying boot alternatives
    [    0.000000] Fallback order for Node 0: 0
    [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 516096
    [    0.000000] Policy zone: DMA
    [    0.000000] Kernel command line: console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000 omap2-nand.0:2m(NAND.tiboot3),2m(NAND.tispl),2m(NAND.tiboot3.backup),4m(NAND.u-boot),256k(NAND.u-boot-env),t
    [    0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
    [    0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
    [    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
    [    0.000000] Memory: 1870676K/2097152K available (16960K kernel code, 3798K rwdata, 9560K rodata, 7680K init, 625K bss, 193708K reserved, 32768K cma-reserved)
    [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
    [    0.000000] rcu: Preemptible hierarchical RCU implementation.
    [    0.000000] rcu:     RCU event tracing is enabled.
    [    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=2.
    [    0.000000]  Trampoline variant of Tasks RCU enabled.
    [    0.000000]  Tracing variant of Tasks RCU enabled.
    [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
    [    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
    [    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
    [    0.000000] GICv3: GIC: Using split EOI/Deactivate mode
    [    0.000000] GICv3: 256 SPIs implemented
    [    0.000000] GICv3: 0 Extended SPIs implemented
    [    0.000000] Root IRQ handler: gic_handle_irq
    [    0.000000] GICv3: GICv3 features: 16 PPIs
    [    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000001840000
    [    0.000000] ITS [mem 0x01820000-0x0182ffff]
    [    0.000000] GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS
    [    0.000000] ITS@0x0000000001820000: Devices Table too large, reduce ids 20->19
    [    0.000000] ITS@0x0000000001820000: allocated 524288 Devices @80800000 (flat, esz 8, psz 64K, shr 0)
    [    0.000000] ITS: using cache flushing for cmd queue
    [    0.000000] GICv3: using LPI property table @0x0000000080030000
    [    0.000000] GIC: using cache flushing for LPI property table
    [    0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000080040000
    [    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
    [    0.000000] arch_timer: cp15 timer(s) running at 200.00MHz (phys).
    [    0.000000] clocksource: arch_sys_counter: mask: 0x3ffffffffffffff max_cycles: 0x2e2049d3e8, max_idle_ns: 440795210634 ns
    [    0.000001] sched_clock: 58 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
    [    0.009938] Console: colour dummy device 80x25
    [    0.014594] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=800000)
    [    0.025275] pid_max: default: 32768 minimum: 301
    [    0.030065] LSM: Security Framework initializing
    [    0.034928] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
    [    0.042512] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
    [    0.052639] cblist_init_generic: Setting adjustable number of callback queues.
    [    0.060111] cblist_init_generic: Setting shift to 1 and lim to 1.
    [    0.066425] cblist_init_generic: Setting adjustable number of callback queues.
    [    0.073822] cblist_init_generic: Setting shift to 1 and lim to 1.
    [    0.080269] rcu: Hierarchical SRCU implementation.
    [    0.085183] rcu:     Max phase no-delay instances is 1000.
    [    0.090840] Platform MSI: msi-controller@1820000 domain created
    [    0.097210] PCI/MSI: /bus@f4000/interrupt-controller@1800000/msi-controller@1820000 domain created
    [    0.106517] fsl-mc MSI: msi-controller@1820000 domain created
    [    0.114823] EFI services will not be available.
    [    0.119846] smp: Bringing up secondary CPUs ...
    I/TC: Secondary CPU 1 initializing
    I/TC: Secondary CPU 1 switching to normal world boot
    [    0.133539] Detected VIPT I-cache on CPU1
    [    0.133682] GICv3: CPU1: found redistributor 1 region 0:0x0000000001860000
    [    0.133703] GICv3: CPU1: using allocated LPI pending table @0x0000000080050000
    [    0.133767] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
    [    0.133911] smp: Brought up 1 node, 2 CPUs
    [    0.163298] SMP: Total of 2 processors activated.
    [    0.168112] CPU features: detected: 32-bit EL0 Support
    [    0.173384] CPU features: detected: 32-bit EL1 Support
    [    0.178639] CPU features: detected: CRC32 instructions
    [    0.183967] CPU: All CPU(s) started at EL2
    [    0.188187] alternatives: applying system-wide alternatives
    [    0.196507] devtmpfs: initialized
    [    0.209301] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
    [    0.219327] futex hash table entries: 512 (order: 3, 32768 bytes, linear)
    [    0.227995] pinctrl core: initialized pinctrl subsystem
    [    0.236029] DMI not present or invalid.
    [    0.240897] NET: Registered PF_NETLINK/PF_ROUTE protocol family
    [    0.248408] DMA: preallocated 256 KiB GFP_KERNEL pool for atomic allocations
    [    0.255893] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
    [    0.264022] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
    [    0.272234] audit: initializing netlink subsys (disabled)
    [    0.278187] audit: type=2000 audit(0.172:1): state=initialized audit_enabled=0 res=1
    [    0.279917] thermal_sys: Registered thermal governor 'step_wise'
    [    0.286163] thermal_sys: Registered thermal governor 'power_allocator'
    [    0.292664] cpuidle: using governor menu
    [    0.303715] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
    [    0.310743] ASID allocator initialised with 65536 entries
    [    0.318514] Serial: AMBA PL011 UART driver
    [    0.334767] platform f4000.pinctrl: Fixed dependency cycle(s) with /bus@f4000/pinctrl@f4000/mygpio1-default-pins
    [    0.349100] platform a40000.pinctrl: Fixed dependency cycle(s) with /bus@f4000/pinctrl@a40000/cpsw-cpts-pps
    [    0.369664] KASLR disabled due to lack of seed
    [    0.384836] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
    [    0.391809] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
    [    0.398215] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
    [    0.405153] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
    [    0.411559] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
    [    0.418494] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
    [    0.424898] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
    [    0.431835] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
    [    0.440756] ACPI: Interpreter disabled.
    [    0.446901] k3-chipinfo 43000014.chipid: Family:AM64X rev:SR2.0 JTAGID[0x1bb3802f] Detected
    [    0.457376] iommu: Default domain type: Translated
    [    0.462400] iommu: DMA domain TLB invalidation policy: strict mode
    [    0.469221] SCSI subsystem initialized
    [    0.473661] usbcore: registered new interface driver usbfs
    [    0.479343] usbcore: registered new interface driver hub
    [    0.484814] usbcore: registered new device driver usb
    [    0.491338] pps_core: LinuxPPS API ver. 1 registered
    [    0.496437] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
    [    0.505793] PTP clock support registered
    [    0.509961] EDAC MC: Ver: 3.0.0
    [    0.515441] omap-mailbox 29020000.mailbox: omap mailbox rev 0x66fc9100
    [    0.522478] omap-mailbox 29040000.mailbox: omap mailbox rev 0x66fc9100
    [    0.529348] omap-mailbox 29060000.mailbox: omap mailbox rev 0x66fc9100
    [    0.537251] FPGA manager framework
    [    0.540874] Advanced Linux Sound Architecture Driver Initialized.
    [    0.548310] vgaarb: loaded
    [    0.551716] clocksource: Switched to clocksource arch_sys_counter
    [    0.558318] VFS: Disk quotas dquot_6.6.0
    [    0.562400] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
    [    0.569656] pnp: PnP ACPI: disabled
    [    0.580578] NET: Registered PF_INET protocol family
    [    0.585917] IP idents hash table entries: 32768 (order: 6, 262144 bytes, linear)
    [    0.595638] tcp_listen_portaddr_hash hash table entries: 1024 (order: 2, 16384 bytes, linear)
    [    0.604513] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
    [    0.612467] TCP established hash table entries: 16384 (order: 5, 131072 bytes, linear)
    [    0.620693] TCP bind hash table entries: 16384 (order: 7, 524288 bytes, linear)
    [    0.628812] TCP: Hash tables configured (established 16384 bind 16384)
    [    0.635806] UDP hash table entries: 1024 (order: 3, 32768 bytes, linear)
    [    0.642738] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes, linear)
    [    0.650306] NET: Registered PF_UNIX/PF_LOCAL protocol family
    [    0.656799] RPC: Registered named UNIX socket transport module.
    [    0.662914] RPC: Registered udp transport module.
    [    0.667727] RPC: Registered tcp transport module.
    [    0.672535] RPC: Registered tcp NFSv4.1 backchannel transport module.
    [    0.679127] NET: Registered PF_XDP protocol family
    [    0.684070] PCI: CLS 0 bytes, default 64
    [    0.689118] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
    [    0.698189] kvm [1]: IPA Size Limit: 40 bits
    [    0.704574] kvm [1]: vgic-v2@100020000
    [    0.708446] kvm [1]: GIC system register CPU interface enabled
    [    0.714507] kvm [1]: vgic interrupt IRQ9
    [    0.718583] kvm [1]: Hyp mode initialized successfully
    [    0.725569] Initialise system trusted keyrings
    [    0.730569] workingset: timestamp_bits=42 max_order=19 bucket_order=0
    [    0.744962] squashfs: version 4.0 (2009/01/31) Phillip Lougher
    [    0.751892] NFS: Registering the id_resolver key type
    [    0.757120] Key type id_resolver registered
    [    0.761397] Key type id_legacy registered
    [    0.765578] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
    [    0.772433] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
    [    0.780270] 9p: Installing v9fs 9p2000 file system support
    [    0.829022] Key type asymmetric registered
    [    0.833240] Asymmetric key parser 'x509' registered
    [    0.838303] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 244)
    [    0.846170] io scheduler mq-deadline registered
    [    0.850842] io scheduler kyber registered
    [    0.865328] pinctrl-single 4084000.pinctrl: 33 pins, size 132
    [    0.871952] pinctrl-single f4000.pinctrl: 180 pins, size 720
    [    0.879906] pinctrl-single a40000.pinctrl: 512 pins, size 2048
    [    0.895474] EINJ: ACPI disabled.
    [    0.929785] Serial: 8250/16550 driver, 12 ports, IRQ sharing enabled
    [    0.942866] SuperH (H)SCI(F) driver initialized
    [    0.948553] msm_serial: driver initialized
    [    0.962709] loop: module loaded
    [    0.968549] megasas: 07.719.03.00-rc1
    [    0.983184] tun: Universal TUN/TAP device driver, 1.6
    [    0.990180] thunder_xcv, ver 1.0
    [    0.993602] thunder_bgx, ver 1.0
    [    0.996956] nicpf, ver 1.0
    [    1.002160] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
    [    1.009610] hns3: Copyright (c) 2017 Huawei Corporation.
    [    1.015181] hclge is initializing
    [    1.018610] e1000: Intel(R) PRO/1000 Network Driver
    [    1.023599] e1000: Copyright (c) 1999-2006 Intel Corporation.
    [    1.029539] e1000e: Intel(R) PRO/1000 Network Driver
    [    1.034615] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
    [    1.040710] igb: Intel(R) Gigabit Ethernet Network Driver
    [    1.046231] igb: Copyright (c) 2007-2014 Intel Corporation.
    [    1.051964] igbvf: Intel(R) Gigabit Virtual Function Network Driver
    [    1.058381] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
    [    1.065260] sky2: driver version 1.30
    [    1.071500] VFIO - User Level meta-driver version: 0.3
    [    1.081003] usbcore: registered new interface driver usb-storage
    [    1.092712] i2c_dev: i2c /dev entries driver
    [    1.110829] sdhci: Secure Digital Host Controller Interface driver
    [    1.117234] sdhci: Copyright(c) Pierre Ossman
    [    1.123803] Synopsys Designware Multimedia Card Interface Driver
    [    1.132002] sdhci-pltfm: SDHCI platform and OF driver helper
    [    1.141784] ledtrig-cpu: registered to indicate activity on CPUs
    [    1.151009] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
    [    1.158824] usbcore: registered new interface driver usbhid
    [    1.164569] usbhid: USB HID core driver
    [    1.178632] optee: probing for conduit method.
    I/TC: Reserved shared memory is enabled
    I/TC: Dynamic shared memory is enabled
    I/TC: Normal World virtualization support is disabled
    I/TC: Asynchronous notifications are disabled
    [    1.183260] optee: revision 4.1 (012cdca4)
    [    1.200007] optee: dynamic shared memory is enabled
    [    1.209692] optee: initialized driver
    [    1.219374] Initializing XFRM netlink socket
    [    1.223864] NET: Registered PF_PACKET protocol family
    [    1.229224] 9pnet: Installing 9P2000 support
    [    1.233701] Key type dns_resolver registered
    [    1.238657] registered taskstats version 1
    [    1.242925] Loading compiled-in X.509 certificates
    [    1.299874] ti-sci 44043000.system-controller: ABI: 3.1 (firmware rev 0x0009 '9.2.8--v09.02.08 (Kool Koala)')
    [    1.338352] ti-sci-clk 44043000.system-controller:clock-controller: recalc-rate failed for dev=62, clk=3, ret=-19
    [    1.372699] pca953x 0-0070: supply vcc not found, using dummy regulator
    [    1.379675] pca953x 0-0070: using no AI
    [    1.404686] omap_i2c 20010000.i2c: bus 0 rev0.12 at 400 kHz
    [    1.411492] ti-sci-intr bus@f4000:interrupt-controller@a00000: Interrupt Router 3 domain created
    [    1.421633] ti-sci-inta 48000000.interrupt-controller: Interrupt Aggregator domain 28 created
    [    1.436791] ti-udma 485c0100.dma-controller: Number of rings: 68
    [    1.444471] ti-udma 485c0100.dma-controller: Channels: 24 (bchan: 12, tchan: 6, rchan: 6)
    [    1.456209] ti-udma 485c0000.dma-controller: Number of rings: 288
    [    1.471589] ti-udma 485c0000.dma-controller: Channels: 44 (tchan: 29, rchan: 15)
    [    1.508337] remoteproc remoteproc0: 30034000.pru is available
    [    1.517718] remoteproc remoteproc1: 30004000.rtu is available
    [    1.527001] remoteproc remoteproc2: 3000a000.txpru is available
    [    1.536665] remoteproc remoteproc3: 30038000.pru is available
    [    1.546048] remoteproc remoteproc4: 30006000.rtu is available
    [    1.555333] remoteproc remoteproc5: 3000c000.txpru is available
    [    1.564326] davinci_mdio 30032400.mdio: Configuring MDIO in manual mode
    [    1.607773] davinci_mdio 30032400.mdio: davinci mdio revision 1.7, bus freq 1000000
    [    1.615891] mdio_bus 30032400.mdio: MDIO device at address 15 is missing.
    [    1.649874] remoteproc remoteproc6: 300b4000.pru is available
    [    1.659259] remoteproc remoteproc7: 30084000.rtu is available
    [    1.668706] remoteproc remoteproc8: 3008a000.txpru is available
    [    1.678253] remoteproc remoteproc9: 300b8000.pru is available
    [    1.687632] remoteproc remoteproc10: 30086000.rtu is available
    [    1.697083] remoteproc remoteproc11: 3008c000.txpru is available
    [    1.706733] printk: console [ttyS2] disabled
    [    1.711214] 2800000.serial: ttyS2 at MMIO 0x2800000 (irq = 320, base_baud = 3000000) is a 8250
    [    1.720112] printk: console [ttyS2] enabled
    [    1.720112] printk: console [ttyS2] enabled
    [    1.728578] printk: bootconsole [ns16550a0] disabled
    [    1.728578] printk: bootconsole [ns16550a0] disabled
    [    1.745422] spi-nor spi1.0: s28hs512t (65536 Kbytes)
    [    1.750568] 7 fixed-partitions partitions found on MTD device fc40000.spi.0
    [    1.757534] Creating 7 MTD partitions on "fc40000.spi.0":
    [    1.762931] 0x000000000000-0x000000100000 : "ospi.tiboot3"
    [    1.769964] 0x000000100000-0x000000300000 : "ospi.tispl"
    [    1.776833] 0x000000300000-0x000000700000 : "ospi.u-boot"
    [    1.783680] 0x000000700000-0x000000740000 : "ospi.env"
    [    1.790312] 0x000000740000-0x000000780000 : "ospi.env.backup"
    [    1.797591] 0x000000800000-0x000003fc0000 : "ospi.rootfs"
    [    1.804520] 0x000003fc0000-0x000004000000 : "ospi.phypattern"
    [    1.828274] davinci_mdio 8000f00.mdio: Configuring MDIO in manual mode
    [    1.871767] davinci_mdio 8000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
    [    1.882598] davinci_mdio 8000f00.mdio: phy[0]: device 8000f00.mdio:00, driver TI DP83867
    [    1.890729] davinci_mdio 8000f00.mdio: phy[1]: device 8000f00.mdio:01, driver TI DP83867
    [    1.898875] am65-cpsw-nuss 8000000.ethernet: initializing am65 cpsw nuss version 0x6BA00903, cpsw version 0x6BA80903 Ports: 3 quirks:00000006
    [    1.911824] am65-cpsw-nuss 8000000.ethernet: initialized cpsw ale version 1.4
    [    1.918957] am65-cpsw-nuss 8000000.ethernet: ALE Table size 512
    [    1.925711] pps pps0: new PPS source ptp0
    [    1.930222] am65-cpsw-nuss 8000000.ethernet: CPTS ver 0x4e8a010c, freq:500000000, add_val:1 pps:1
    [    1.941420] am65-cpsw-nuss 8000000.ethernet: set new flow-id-base 16
    [    1.953791] am65-cpts 39000000.cpts: CPTS ver 0x4e8a010c, freq:500000000, add_val:1 pps:0
    [    2.003828] mmc0: CQHCI version 5.10
    [    2.008859] mmc1: CQHCI version 5.10
    [    2.015589] debugfs: Directory 'pd:114' with parent 'pm_genpd' already present!
    [    2.031584] ti-sci-clk 44043000.system-controller:clock-controller: is_prepared failed for dev=62, clk=3, ret=-19
    [    2.043403] ALSA device list:
    [    2.046388]   No soundcards found.
    [    2.053644] mmc1: SDHCI controller on fa00000.mmc [fa00000.mmc] using ADMA 64-bit
    [    2.055735] mmc0: SDHCI controller on fa10000.mmc [fa10000.mmc] using ADMA 64-bit
    [    2.069540] Waiting for root device PARTUUID=032d5670-02...
    [    2.080215] sdhci-am654 fa10000.mmc: card claims to support voltages below defined range
    [    2.099903] mmc0: new SDIO card at address 0001
    [    2.112398] mmc1: new ultra high speed SDR104 SDHC card at address 5048
    [    2.120057] mmcblk1: mmc1:5048 SD32G 29.7 GiB
    [    2.127389]  mmcblk1: p1 p2
    [    2.200099] EXT4-fs (mmcblk1p2): recovery complete
    [    2.205834] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Quota mode: none.
    [    2.214475] VFS: Mounted root (ext4 filesystem) on device 179:2.
    [    2.221599] devtmpfs: mounted
    [    2.230234] Freeing unused kernel memory: 7680K
    [    2.234992] Run /sbin/init as init process
    [    2.402074] systemd[1]: System time before build time, advancing clock.
    [    2.499895] NET: Registered PF_INET6 protocol family
    [    2.506404] Segment Routing with IPv6
    [    2.510183] In-situ OAM (IOAM) with IPv6
    [    2.542679] systemd[1]: systemd 250.5+ running in system mode (+PAM -AUDIT -SELINUX -APPARMOR +IMA -SMACK +SECCOMP -GCRYPT -GNUTLS -OPENSSL +ACL +BLKID -CURL -ELFUTILS -FIDO2 -IDN2 -IDN -IPTC +KMOD -)
    [    2.574780] systemd[1]: Detected architecture arm64.
    
    Welcome to Arago 2023.10!
    
    [    2.633159] systemd[1]: Hostname set to <am64xx-evm>.
    [    2.786061] systemd-sysv-generator[141]: SysV service '/etc/init.d/thermal-zone-init' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package t.
    [    3.095526] systemd[1]: /lib/systemd/system/bt-enable.service:9: Standard output type syslog is obsolete, automatically updating to journal. Please update your unit file, and consider removing the se.
    [    3.186298] systemd[1]: /etc/systemd/system/sync-clocks.service:11: Standard output type syslog is obsolete, automatically updating to journal. Please update your unit file, and consider removing the.
    [    3.286376] systemd[1]: Queued start job for default target Graphical Interface.
    [    3.365071] systemd[1]: Created slice Slice /system/getty.
    [  OK  ] Created slice Slice /system/getty.
    [    3.391878] systemd[1]: Created slice Slice /system/modprobe.
    [  OK  ] Created slice Slice /system/modprobe.
    [    3.415871] systemd[1]: Created slice Slice /system/serial-getty.
    [  OK  ] Created slice Slice /system/serial-getty.
    [    3.442996] systemd[1]: Created slice User and Session Slice.
    [  OK  ] Created slice User and Session Slice.
    [    3.464449] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
    [  OK  ] Started Dispatch Password …ts to Console Directory Watch.
    [    3.488361] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
    [  OK  ] Started Forward Password R…uests to Wall Directory Watch.
    [    3.512527] systemd[1]: Reached target Path Units.
    [  OK  ] Reached target Path Units.
    [    3.532073] systemd[1]: Reached target Remote File Systems.
    [  OK  ] Reached target Remote File Systems.
    [    3.552046] systemd[1]: Reached target Slice Units.
    [  OK  ] Reached target Slice Units.
    [    3.572062] systemd[1]: Reached target Swaps.
    [  OK  ] Reached target Swaps.
    [    3.642913] systemd[1]: Listening on RPCbind Server Activation Socket.
    [  OK  ] Listening on RPCbind Server Activation Socket.
    [    3.664116] systemd[1]: Reached target RPC Port Mapper.
    [  OK  ] Reached target RPC Port Mapper.
    [    3.692497] systemd[1]: Listening on Process Core Dump Socket.
    [  OK  ] Listening on Process Core Dump Socket.
    [    3.716559] systemd[1]: Listening on initctl Compatibility Named Pipe.
    [  OK  ] Listening on initctl Compatibility Named Pipe.
    [    3.741160] systemd[1]: Listening on Journal Audit Socket.
    [  OK  ] Listening on Journal Audit Socket.
    [    3.764924] systemd[1]: Listening on Journal Socket (/dev/log).
    [  OK  ] Listening on Journal Socket (/dev/log).
    [    3.788926] systemd[1]: Listening on Journal Socket.
    [  OK  ] Listening on Journal Socket.
    [    3.809204] systemd[1]: Listening on Network Service Netlink Socket.
    [  OK  ] Listening on Network Service Netlink Socket.
    [    3.833097] systemd[1]: Listening on udev Control Socket.
    [  OK  ] Listening on udev Control Socket.
    [    3.856730] systemd[1]: Listening on udev Kernel Socket.
    [  OK  ] Listening on udev Kernel Socket.
    [    3.880889] systemd[1]: Listening on User Database Manager Socket.
    [  OK  ] Listening on User Database Manager Socket.
    [    3.928571] systemd[1]: Mounting Huge Pages File System...
             Mounting Huge Pages File System...
    [    3.954853] systemd[1]: Mounting POSIX Message Queue File System...
             Mounting POSIX Message Queue File System...
    [    3.996554] systemd[1]: Mounting Kernel Debug File System...
             Mounting Kernel Debug File System...
    [    4.020633] systemd[1]: Kernel Trace File System was skipped because of a failed condition check (ConditionPathExists=/sys/kernel/tracing).
    [    4.056556] systemd[1]: Mounting Temporary Directory /tmp...
             Mounting Temporary Directory /tmp...
    [    4.080632] systemd[1]: Starting Create List of Static Device Nodes...
             Starting Create List of Static Device Nodes...
    [    4.110753] systemd[1]: Starting Load Kernel Module configfs...
             Starting Load Kernel Module configfs...
    [    4.138974] systemd[1]: Starting Load Kernel Module drm...
             Starting Load Kernel Module drm...
    [    4.164334] systemd[1]: Starting Load Kernel Module fuse...
             Starting Load Kernel Module fuse...
    [    4.215334] fuse: init (API version 7.37)
    [    4.229148] systemd[1]: Starting RPC Bind...
             Starting RPC Bind...
    [    4.248559] systemd[1]: File System Check on Root Device was skipped because of a failed condition check (ConditionPathIsReadWrite=!/).
    [    4.293073] systemd[1]: Starting Journal Service...
             Starting Journal Service...
    [    4.324373] systemd[1]: Starting Load Kernel Modules...
             Starting Load Kernel Modules...
    [    4.381289] systemd[1]: Starting Generate network units from Kernel command line...
             Starting Generate network …ts from Kernel command line...
    [    4.437392] systemd[1]: Starting Remount Root and Kernel File Systems...
             Starting Remount Root and Kernel File Systems...
    [    4.472752] systemd[1]: Starting Coldplug All udev Devices...
             Starting Coldplug All udev Devices...
    [    4.521637] systemd[1]: Started RPC Bind.
    [  OK  ] Started RPC Bind.
    [    4.544614] systemd[1]: Started Journal Service.
    [    4.549166] EXT4-fs (mmcblk1p2): re-mounted. Quota mode: none.
    [  OK  ] Started Journal Service.
    [  OK  ] Mounted Huge Pages File System.
    [  OK  ] Mounted POSIX Message Queue File System.
    [  OK  ] Mounted Kernel Debug File System.
    [  OK  ] Mounted Temporary Directory /tmp.
    [  OK  ] Finished Create List of Static Device Nodes.
    [  OK  ] Finished Load Kernel Module configfs.
    [  OK  ] Finished Load Kernel Module drm.
    [  OK  ] Finished Load Kernel Module fuse.
    [  OK  ] Finished Load Kernel Modules.
    [  OK  ] Finished Generate network units from Kernel command line.
    [  OK  ] Finished Remount Root and Kernel File Systems.
             Mounting FUSE Control File System...
             Mounting Kernel Configuration File System...
             Starting Flush Journal to Persistent Storage...
    [    4.899106] systemd-journald[155]: Received client request to flush runtime journal.
             Starting Apply Kernel Variables...
             Starting Create Static Device Nodes in /dev...
    [  OK  ] Mounted FUSE Control File System.
    [  OK  ] Mounted Kernel Configuration File System.
    [  OK  ] Finished Flush Journal to Persistent Storage.
    [  OK  ] Finished Apply Kernel Variables.
    [  OK  ] Finished Create Static Device Nodes in /dev.
    [  OK  ] Reached target Preparation for Local File Systems.
             Mounting /media/ram...
             Mounting /var/volatile...
    [    5.171019] audit: type=1334 audit(1651167747.764:2): prog-id=5 op=LOAD
    [    5.183218] audit: type=1334 audit(1651167747.776:3): prog-id=6 op=LOAD
             Starting Rule-based Manage…for Device Events and Files...
    [  OK  ] Mounted /media/ram.
    [  OK  ] Mounted /var/volatile.
             Starting Load/Save Random Seed...
    [  OK  ] Reached target Local File Systems.
             Starting Create Volatile Files and Directories...
    [  OK  ] Finished Create Volatile Files and Directories.
             Starting Network Time Synchronization...
             Starting Record System Boot/Shutdown in UTMP...
    [  OK  ] Started Rule-based Manager for Device Events and Files.
    [  OK  ] Finished Coldplug All udev Devices.
    [  OK  ] Finished Record System Boot/Shutdown in UTMP.
    [  OK  ] Started Network Time Synchronization.
    [  OK  ] Reached target System Initialization.
    [    6.371776] random: crng init done
    [  OK  ] Started Timer service to update the IP on OLED each 10s.
    [  OK  ] Started Daily Cleanup of Temporary Directories.
    [  OK  ] Reached target System Time Set.
    [  OK  ] Started Daily rotation of log files.
    [  OK  ] Reached target Timer Units.
    [  OK  ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket.
    [  OK  ] Listening on D-Bus System Message Bus Socket.
             Starting Docker Socket for the API...
    [  OK  ] Listening on dropbear.socket.
    [  OK  ] Listening on PC/SC Smart Card Daemon Activation Socket.
             Starting D-Bus System Message Bus...
             Starting Reboot and dump vmcore via kexec...
    [  OK  ] Finished Load/Save Random Seed.
    [  OK  ] Listening on Docker Socket for the API.
    [  OK  ] Reached target Socket Units.
    [  OK  ] Finished Reboot and dump vmcore via kexec.
    [  OK  ] Started D-Bus System Message Bus.
    [  OK  ] Reached target Basic System.
    [  OK  ] Started Job spooling tools.
    [  OK  ] Started Periodic Command Scheduler.
             Starting DEMO...
             Starting Print notice about GPLv3 packages...
             Starting IPv6 Packet Filtering Framework...
             Starting IPv4 Packet Filtering Framework...
    [  OK  ] Started irqbalance daemon.
             Starting Telephony service...
             Starting Expand the rootfs…ll size of the boot device....
    [    7.146403] audit: type=1334 audit(1651253833.800:4): prog-id=7 op=LOAD
    [    7.161620] audit: type=1334 audit(1651253833.816:5): prog-id=8 op=LOAD
             Starting User Login Management...
    [  OK  ] Started TEE Supplicant.
             Starting Telnet Server...
    [  OK  ] Finished IPv6 Packet Filtering Framework.
    [  OK  ] Finished IPv4 Packet Filtering Framework.
    [  OK  ] Finished Telnet Server.
    [  OK  ] Reached target Preparation for Network.
             Starting Network Configuration...
    [  OK  ] Started Telephony service.
    [  OK  ] Started DEMO.
    [    7.500088] Bluetooth: Core ver 2.22
    [    7.503918] NET: Registered PF_BLUETOOTH protocol family
    [    7.515931] Bluetooth: HCI device and connection manager initialized
    [    7.522425] Bluetooth: HCI socket layer initialized
    [    7.531454] Bluetooth: L2CAP socket layer initialized
    [    7.541373] Bluetooth: SCO socket layer initialized
    [  OK  ] Finished Expand the rootfs…full size of the boot device..
    [    8.345241] cfg80211: Loading compiled-in X.509 certificates for regulatory database
    [    8.398507] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
    [    8.399618] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
    [  OK  ] Started Network Configuration.
             Starting Wait for Network to be Configured...
             Starting Network Name Resolution...
    [  OK  ] Started User Login Management.
    [  OK  ] Started Network Name Resolution.
    [  OK  ] Reached target Network.
    [  OK  ] Reached target Host and Network Name Lookups.
             Starting Avahi mDNS/DNS-SD Stack...
             Starting Enable and configure wl18xx bluetooth stack...
             Starting containerd container runtime...
    [  OK  ] Started Netperf Benchmark Server.
    [  OK  ] Started NFS status monitor for NFSv2/3 locking..
             Starting Simple Network Ma…ent Protocol (SNMP) Daemon....
             Starting Permit User Sessions...
    [  OK  ] Started Avahi mDNS/DNS-SD Stack.
    [  OK  ] Finished Enable and configure wl18xx bluetooth stack.
    [  OK  ] Finished Permit User Sessions.
    [  OK  ] Started Getty on tty1.
    [  OK  ] Started Simple Network Man…ement Protocol (SNMP) Daemon..
    [   11.180581] icssg-prueth icssg0-eth: port 2: using random MAC addr: aa:2e:e8:ea:90:7d
    [   11.259432] icssg-prueth icssg0-eth: couldn't connect to phy ethernet-phy@0
    [   11.351297] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000358
    [   11.363046] Mem abort info:
    [   11.371000]   ESR = 0x0000000096000006
    [   11.408942]   EC = 0x25: DABT (current EL), IL = 32 bits
    [  OK  ] Found device /dev/ttyS2.
    [   11.415035]   SET = 0, FnV = 0
    [  OK  ] Started Serial Getty on ttyS2.
    [  OK  ] Reached target Login Prompts.
    [   11.463605]   EA = 0, S1PTW = 0
             Starting Synchronize System and HW clocks...
    [FAILED] Failed to start Synchronize System and HW clocks.
    See 'systemctl status sync-clocks.service' for details.
    [   11.520103]   FSC = 0x06: level 2 translation fault
    [   11.734385] Data abort info:
    [   11.807990]   ISV = 0, ISS = 0x00000006
    [   11.852956]   CM = 0, WnR = 0
    [   11.887521] user pgtable: 4k pages, 48-bit VAs, pgdp=00000000848be000
    [   11.935389] [0000000000000358] pgd=08000000848bf003, p4d=08000000848bf003, pud=08000000848c0003, pmd=0000000000000000
    [   11.952813] Internal error: Oops: 0000000096000006 [#1] PREEMPT SMP
    [   11.959112] Modules linked in: ti_eqep counter pwm_tiecap sa2ul spi_omap2_mcspi icssg_prueth(+) hsr optee_rng rng_core overlay cfg80211 bluetooth ecdh_generic ecc rfkill fuse drm ipv6
    [   11.975510] CPU: 1 PID: 190 Comm: systemd-udevd Not tainted 6.1.83 #8
    [   11.981949] Hardware name: Texas Instruments AM642 SK (DT)
    [   11.987430] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
    [   11.994388] pc : phy_attached_print+0x28/0x1b0
    [   11.998842] lr : phy_attached_info+0x14/0x20
    [   12.003112] sp : ffff80000ae6b7c0
    [   12.006421] x29: ffff80000ae6b7c0 x28: ffff0000087c8940 x27: ffff000005906cc0
    [   12.013560] x26: ffff000005906d08 x25: 0000000000040000 x24: ffff0000003ee800
    [   12.020697] x23: ffff0000003ee810 x22: ffff00007fc35278 x21: 0000000000000000
    [   12.027832] x20: 0000000000000000 x19: 0000000000000000 x18: 0000000000000000
    [   12.034964] x17: 0000000000000000 x16: 0000000000000000 x15: 0000997055f76e94
    [   12.042096] x14: 0000000000000318 x13: 0000000000000001 x12: 0000000000000000
    [   12.049228] x11: 0000000000000000 x10: 0000000000000a60 x9 : ffff80000ae6b560
    [   12.056362] x8 : ffff00000110d880 x7 : ffff0000017f3000 x6 : 0000000000000000
    [   12.063495] x5 : ffff00007fbbda18 x4 : ffff00007fbbda18 x3 : 0000000000000000
    [   12.070629] x2 : 0000000000000000 x1 : 0000000000000000 x0 : 0000000000000000
    [   12.077762] Call trace:
    [   12.080205]  phy_attached_print+0x28/0x1b0
    [   12.084305]  phy_attached_info+0x14/0x20
    [   12.088228]  prueth_probe+0x480/0x970 [icssg_prueth]
    [   12.093244]  platform_probe+0x68/0xe0
    [   12.096910]  really_probe+0xbc/0x2dc
    [   12.100481]  __driver_probe_device+0x78/0x114
    [   12.104835]  driver_probe_device+0xd8/0x15c
    [   12.109019]  __driver_attach+0x94/0x19c
    [   12.112853]  bus_for_each_dev+0x70/0xd0
    [   12.116698]  driver_attach+0x24/0x30
    [   12.120272]  bus_add_driver+0x154/0x20c
    [   12.124109]  driver_register+0x78/0x130
    [   12.127942]  __platform_driver_register+0x28/0x34
    [   12.132642]  prueth_driver_init+0x24/0x1000 [icssg_prueth]
    [   12.138166]  do_one_initcall+0x50/0x1d0
    [   12.142008]  do_init_module+0x48/0x1d0
    [   12.145762]  load_module+0x18e8/0x1c70
    [   12.149514]  __do_sys_finit_module+0xa8/0x100
    [   12.153873]  __arm64_sys_finit_module+0x20/0x30
    [   12.158402]  invoke_syscall+0x48/0x114
    [   12.162156]  el0_svc_common.constprop.0+0xd4/0xfc
    [   12.166862]  do_el0_svc+0x30/0xd0
    [   12.170178]  el0_svc+0x2c/0x84
    [   12.173238]  el0t_64_sync_handler+0xbc/0x140
    [   12.177508]  el0t_64_sync+0x18c/0x190
    [   12.181179] Code: a9025bf5 aa0103f5 a9080fe2 f9004be4 (f941ac02)
    [   12.187265] ---[ end trace 0000000000000000 ]---
    [  OK  ] Started containerd container runtime.
    [   13.072541] platform 78000000.r5f: configured R5F for remoteproc mode
    [   13.119969] k3-m4-rproc 5000000.m4fss: assigned reserved memory node m4f-dma-memory@a4000000
    [   13.142901] platform 78000000.r5f: assigned reserved memory node r5f-dma-memory@a0000000
    [   13.183457] k3-m4-rproc 5000000.m4fss: configured M4 for remoteproc mode
    [   13.218446] k3-m4-rproc 5000000.m4fss: local reset is deasserted for device
    [   13.241208] remoteproc remoteproc13: 5000000.m4fss is available
    [   13.241565] remoteproc remoteproc12: 78000000.r5f is available
    [   13.302434] remoteproc remoteproc13: powering up 5000000.m4fss
    [   13.308839] remoteproc remoteproc13: Booting fw image am64-mcu-m4f0_0-fw, size 86084
    [   13.320327] remoteproc remoteproc12: powering up 78000000.r5f
    [   13.326361] remoteproc remoteproc12: Booting fw image am64-main-r5f0_0-fw, size 86352
    [   13.345230] platform 78200000.r5f: configured R5F for remoteproc mode
    [   13.358283] rproc-virtio rproc-virtio.1.auto: assigned reserved memory node r5f-dma-memory@a0000000
    [   13.372228] platform 78200000.r5f: assigned reserved memory node r5f-dma-memory@a1000000
    [   13.381504] virtio_rpmsg_bus virtio0: rpmsg host is online
    [   13.387327] virtio_rpmsg_bus virtio0: creating channel rpmsg_chrdev addr 0xe
    [   13.403237] rproc-virtio rproc-virtio.1.auto: registered virtio0 (type 7)
    [   13.410372] rproc-virtio rproc-virtio.0.auto: assigned reserved memory node m4f-dma-memory@a4000000
    [   13.420419] remoteproc remoteproc12: remote processor 78000000.r5f is now up
    [   13.449004] virtio_rpmsg_bus virtio1: rpmsg host is online
    [   13.454935] rproc-virtio rproc-virtio.0.auto: registered virtio1 (type 7)
    [   13.462028] remoteproc remoteproc13: remote processor 5000000.m4fss is now up
    [   13.472035] virtio_rpmsg_bus virtio1: creating channel ti.ipc4.ping-pong addr 0xd
    [   13.480000] virtio_rpmsg_bus virtio1: creating channel rpmsg_chrdev addr 0xe
    [   13.490131] remoteproc remoteproc14: 78200000.r5f is available
    [   13.509155] remoteproc remoteproc14: powering up 78200000.r5f
    [   13.515240] remoteproc remoteproc14: Booting fw image am64-main-r5f0_1-fw, size 141772
    [   13.533309] rproc-virtio rproc-virtio.2.auto: assigned reserved memory node r5f-dma-memory@a1000000
    [   13.577511] virtio_rpmsg_bus virtio2: rpmsg host is online
    [   13.583351] rproc-virtio rproc-virtio.2.auto: registered virtio2 (type 7)
    [   13.591867] remoteproc remoteproc14: remote processor 78200000.r5f is now up
    [   13.603560] virtio_rpmsg_bus virtio2: creating channel rpmsg_chrdev addr 0xe
    [   13.670080] am65-cpsw-nuss 8000000.ethernet eth0: PHY [8000f00.mdio:00] driver [TI DP83867] (irq=POLL)
    [   13.695951] am65-cpsw-nuss 8000000.ethernet eth0: configuring for phy/rgmii-rxid link mode
    [   13.769101] platform 78400000.r5f: configured R5F for remoteproc mode
    [   13.868010] platform 78400000.r5f: assigned reserved memory node r5f-dma-memory@a2000000
    [   14.023635] remoteproc remoteproc15: 78400000.r5f is available
    [   14.032770] remoteproc remoteproc15: powering up 78400000.r5f
    [   14.041425] remoteproc remoteproc15: Booting fw image am64-main-r5f1_0-fw, size 93260
    [   14.058884] rproc-virtio rproc-virtio.3.auto: assigned reserved memory node r5f-dma-memory@a2000000
    [   14.069828] platform 78600000.r5f: configured R5F for remoteproc mode
    [   14.083916] virtio_rpmsg_bus virtio3: rpmsg host is online
    [   14.084398] virtio_rpmsg_bus virtio3: creating channel rpmsg_chrdev addr 0xe
    [   14.099890] rproc-virtio rproc-virtio.3.auto: registered virtio3 (type 7)
    [   14.109402] remoteproc remoteproc15: remote processor 78400000.r5f is now up
    [   14.130519] platform 78600000.r5f: assigned reserved memory node r5f-dma-memory@a3000000
    [   14.191616] remoteproc remoteproc16: 78600000.r5f is available
    [   14.237715] remoteproc remoteproc16: powering up 78600000.r5f
    [   14.243590] remoteproc remoteproc16: Booting fw image am64-main-r5f1_1-fw, size 91520
    [   14.258606] rproc-virtio rproc-virtio.4.auto: assigned reserved memory node r5f-dma-memory@a3000000
    [   14.272890] virtio_rpmsg_bus virtio4: rpmsg host is online
    [   14.278599] rproc-virtio rproc-virtio.4.auto: registered virtio4 (type 7)
    [   14.285495] remoteproc remoteproc16: remote processor 78600000.r5f is now up
    [   14.292901] virtio_rpmsg_bus virtio4: creating channel rpmsg_chrdev addr 0xe
    ***************************************************************
    ***************************************************************
    NOTICE: This file system contains the following GPL-3.0 packages:
            adwaita-icon-theme-symbolic
            autoconf
            bash-dev
            bash
            bc
            binutils
            cifs-utils
            coreutils-stdbuf
            coreutils
            cpio
            cpp-symlinks
            cpp
            dosfstools
            elfutils
            g++-symlinks
            g++
            gawk
            gcc-symlinks
            gcc
            gdb
            gdbserver
            gettext
            glmark2
            gnu-config
            grub-common
            grub-editenv
            grub-efi
            gzip
            hidapi
            less
            libasm1
            libatomic-dev
            libatomic1
            libbfd
            libdebuginfod1
            libdw1
            libelf1
            libgcc-s-dev
            libgcc1
            libgdbm-compat4
            libgdbm-dev
            libgdbm6
            libgettextlib
            libgettextsrc
            libgmp10
            libidn2-0
            libmpc3
            libmpfr6
            libopcodes
            libqt5charts-examples
            libqt5charts-plugins
            libqt5charts-qmlplugins
            libqt5charts5
            libqt5sensors-plugins
            libqt5sensors-qmlplugins
            libqt5sensors5
            libqt5serialport-examples
            libqt5serialport-plugins
            libqt5serialport-qmlplugins
            libqt5serialport5
            libqt5svg-examples
            libqt5svg-plugins
            libqt5svg-qmlplugins
            libqt5svg5
            libqt5virtualkeyboard-plugins
            libqt5virtualkeyboard-qmlplugins
            libqt5virtualkeyboard5
            libqt5webchannel-plugins
            libqt5webchannel-qmlplugins
            libqt5webchannel5
            libreadline-dev
            libreadline8
            libstdc++-dev
            libstdc++6
            libunistring2
            m4-dev
            m4
            make
            nettle
            parted
            piglit
            qt3d-plugins
            qt3d-qmlplugins
            qt3d
            qtbase-examples
            qtbase-plugins
            qtbase-qmlplugins
            qtbase
            qtconnectivity-plugins
            qtconnectivity-qmlplugins
            qtconnectivity
            qtdeclarative-plugins
            qtdeclarative-qmlplugins
            qtdeclarative-tools
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            qtgraphicaleffects-qmlplugins
            qtlocation-examples
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            qtlocation
            qtmultimedia-examples
            qtmultimedia-plugins
            qtmultimedia-qmlplugins
            qtmultimedia
            qtquics-qmlplugins.control
            qtquics2-plugins.control
            qtquics2-qmlplugins.control
            qtquics2.control
            qtscript-examples
            qtscript-plugins
            qtscript-qmlplugins
            qtscript
            qtwayland-examples
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            which
    
    If you do not wish to distribute GPL-3.0 components please remove
    the above packages prior to distribution.  This can be done using
    the opkg remove command.  i.e.:
        opkg remove <package>
    Where <package> is the name printed in the list above
    
    NOTE: If the package is a dependency of another package you
          will be notified of the dependent packages.  You should
          use the --force-removal-of-dependent-packages option to
          also remove the dependent packages as well
    ***************************************************************
    ***************************************************************
    [  OK  ] Finished Print notice about GPLv3 packages.
    
     _____                    _____           _         _   
    |  _  |___ ___ ___ ___   |  _  |___ ___  |_|___ ___| |_
    |     |  _| .'| . | . |  |   __|  _| . | | | -_|  _|  _|
    |__|__|_| |__,|_  |___|  |__|  |_| |___|_| |___|___|_|  
                  |___|                    |___|            
    
    Arago Project am64xx-evm -
    
    Arago 2023.10 am64xx-evm -
    
    am64xx-evm login: [   16.201910] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
    [   16.449959] remoteproc remoteproc0: powering up 30034000.pru
    [   16.459232] remoteproc remoteproc0: Booting fw image ti-pruss/am65x-sr2-pru0-prueth-fw.elf, size 40816
    [   16.469172] remoteproc remoteproc0: unsupported resource 5
    [   16.474813] remoteproc remoteproc0: remote processor 30034000.pru is now up
    [   16.481987] remoteproc remoteproc1: powering up 30004000.rtu
    [   16.491954] remoteproc remoteproc1: Booting fw image ti-pruss/am65x-sr2-rtu0-prueth-fw.elf, size 30888
    [   16.501381] remoteproc remoteproc1: remote processor 30004000.rtu is now up
    [   16.514327] remoteproc remoteproc2: powering up 3000a000.txpru
    [   16.517300] xhci-hcd xhci-hcd.6.auto: xHCI Host Controller
    [   16.526139] remoteproc remoteproc2: Booting fw image ti-pruss/am65x-sr2-txpru0-prueth-fw.elf, size 36672
    [   16.537689] remoteproc remoteproc2: remote processor 3000a000.txpru is now up
    [   16.545281] remoteproc remoteproc3: powering up 30038000.pru
    [   16.555631] xhci-hcd xhci-hcd.6.auto: new USB bus registered, assigned bus number 1
    [   16.563870] remoteproc remoteproc3: Booting fw image ti-pruss/am65x-sr2-pru1-prueth-fw.elf, size 41092
    [   16.573506] remoteproc remoteproc3: unsupported resource 5
    [   16.579180] remoteproc remoteproc3: remote processor 30038000.pru is now up
    [   16.583580] xhci-hcd xhci-hcd.6.auto: hcc params 0x200073c9 hci version 0x100 quirks 0x0000002000018010
    [   16.586264] remoteproc remoteproc4: powering up 30006000.rtu
    [   16.603165] remoteproc remoteproc4: Booting fw image ti-pruss/am65x-sr2-rtu1-prueth-fw.elf, size 30124
    [   16.612755] remoteproc remoteproc4: remote processor 30006000.rtu is now up
    [   16.626907] remoteproc remoteproc5: powering up 3000c000.txpru
    [   16.635543] remoteproc remoteproc5: Booting fw image ti-pruss/am65x-sr2-txpru1-prueth-fw.elf, size 35184
    [   16.645257] remoteproc remoteproc5: remote processor 3000c000.txpru is now up
    [   16.652860] xhci-hcd xhci-hcd.6.auto: irq 525, io mem 0x0f410000
    [   16.656063] ksz-switch spi0.0: found switch: KSZ9477, rev 0
    [   16.659359] pps pps1: new PPS source ptp2
    [   16.669208] xhci-hcd xhci-hcd.6.auto: xHCI Host Controller
    [   16.675209] xhci-hcd xhci-hcd.6.auto: new USB bus registered, assigned bus number 2
    [   16.683897] xhci-hcd xhci-hcd.6.auto: Host supports USB 3.0 SuperSpeed
    [   16.690624] Unable to handle kernel NULL pointer dereference at virtual address 00000000000004e8
    [   16.692509] **Ankush** file = net/dsa/dsa2.c, line = 1783
    [   16.699462] Mem abort info:
    [   16.699465]   ESR = 0x0000000096000006
    [   16.699470]   EC = 0x25: DABT (current EL), IL = 32 bits
    [   16.699476]   SET = 0, FnV = 0
    [   16.699480]   EA = 0, S1PTW = 0
    [   16.699484]   FSC = 0x06: level 2 translation fault
    [   16.699489] Data abort info:
    [   16.699491]   ISV = 0, ISS = 0x00000006
    [   16.734689]   CM = 0, WnR = 0
    [   16.737994] user pgtable: 4k pages, 48-bit VAs, pgdp=00000000884e7000
    [   16.747536] [00000000000004e8] pgd=0800000087c50003, p4d=0800000087c50003, pud=08000000849ff003, pmd=0000000000000000
    [   16.760963] **Ankush** file = net/dsa/dsa2.c, line = 412
    [   16.766844] DSA: tree 0 has no CPU port
    [   16.770443] hub 1-0:1.0: USB hub found
    [   16.775679] **Ankush** file = net/dsa/dsa2.c, line = 1150, err = -22
    [   16.782662] **Ankush** file = net/dsa/dsa2.c, line = 1769,err = -22
    [   16.783771] Internal error: Oops: 0000000096000006 [#2] PREEMPT SMP
    [   16.789444] **Ankush** file = net/dsa/dsa2.c, line = 1785, err = -22
    [   16.795174] Modules linked in: ksz_spi(+) xhci_plat_hcd(+) ksz_switch mac80211(+) dsa_core rpmsg_ctrl rpmsg_char libarc4 cdns3 cdns_usb_common bridge stp llc wlcore_sdio crct10dif_ce cdns3_ti rti_wdt6
    [   16.801880] **Ankush** file = net/dsa/dsa2.c, line = 1789, err = -22
    [   16.840943] CPU: 1 PID: 228 Comm: systemd-network Tainted: G      D            6.1.83 #8
    [   16.840953] Hardware name: Texas Instruments AM642 SK (DT)
    [   16.840959] pstate: 80000005 (Nzcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
    [   16.840968] pc : mutex_lock+0x2c/0x6c
    [   16.840992] lr : phy_start+0x20/0xbc
    [   16.841006] sp : ffff80000b1e3480
    [   16.841010] x29: ffff80000b1e3480 x28: 0000000000000000 x27: ffff00000e098ed8
    [   16.841023] x26: 0000000000000001 x25: ffff00000e099480 x24: 0000000000000220
    [   16.841036] x23: ffff000005906c80 x22: 00000000000001e8 x21: 0000000000000001
    [   16.841048] x20: 00000000000004e8 x19: 0000000000000000 x18: ffffffffffffffff
    [   16.841060] x17: 6e20737562206465 x16: 6e6769737361202c x15: 00007b08a050e5b4
    [   16.841072] x14: 0000000000000209 x13: 0000000000000209 x12: 0000000000000000
    [   16.841084] x11: 0000000000000006
    [   16.853128] hub 1-0:1.0: 1 port detected
    [   16.855488]  x10: 0000000000000a60 x9 : ffff80000b1e32a0
    [   16.855498] x8 : ffff00007fbd3000
    [   16.864954] **Ankush** file = drivers/net/dsa/microchip/ksz_common.c, line = 3056, ret = -22
    [   16.867908]  x7 : 0008000000000020 x6 : 00000001218197b3
    [   16.867918] x5 : 03ffffffffffffff x4 : 0000000000000000 x3 : 00000000000004e8
    [   16.867930] x2 : ffff00000171bb00 x1 : 0000000000000000 x0 : 00000000000004e8
    [   16.867944] Call trace:
    [   16.867949]  mutex_lock+0x2c/0x6c
    [   16.867966]  emac_ndo_open+0x6f4/0xadc [icssg_prueth]
    [   16.868021]  __dev_open+0xec/0x1dc
    [   16.868035]  __dev_change_flags+0x190/0x20c
    [   16.868044]  dev_change_flags+0x24/0x64
    [   16.868053]  do_setlink+0x210/0xe50
    [   16.868062]  rtnl_setlink+0xe4/0x180
    [   16.868070]  rtnetlink_rcv_msg+0x12c/0x390
    [   16.868078]  netlink_rcv_skb+0x5c/0x130
    [   16.868091]  rtnetlink_rcv+0x18/0x24
    [   16.868097]  netlink_unicast+0x2e4/0x350
    [   16.868107]  netlink_sendmsg+0x1ac/0x410
    [   17.013481]  __sys_sendto+0x12c/0x170
    [   17.017143]  __arm64_sys_sendto+0x28/0x40
    [   17.021147]  invoke_syscall+0x48/0x114
    [   17.024893]  el0_svc_common.constprop.0+0xd4/0xfc
    [   17.029591]  do_el0_svc+0x30/0xd0
    [   17.032900]  el0_svc+0x2c/0x84
    [   17.035951]  el0t_64_sync_handler+0xbc/0x140
    [   17.040213]  el0t_64_sync+0x18c/0x190
    [   17.043876] Code: b5000140 d65f03c0 d2800001 f9800071 (c85ffc60)
    [   17.049959] ---[ end trace 0000000000000000 ]---
    [   17.069122] **Ankush** ret = -22, line = 97
    [   17.072946] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
    [   17.075942] ksz-switch: probe of spi0.0 failed with error -22
    [   17.104698] hub 2-0:1.0: USB hub found
    [   17.128681] hub 2-0:1.0: 1 port detected
    
    am64xx-evm login: root[   27.289201] platform led-controller: deferred probe pending
    [   27.294853] platform mux-controller: deferred probe pending
    [   27.300459] platform mdio-mux-2: deferred probe pending
    
    [   30.124116] audit: type=1334 audit(1651253856.780:6): prog-id=9 op=LOAD
    [   30.131462] audit: type=1334 audit(1651253856.788:7): prog-id=10 op=LOAD
    [   30.573455] audit: type=1006 audit(1651253857.224:8): pid=894 uid=0 old-auid=4294967295 auid=0 tty=(none) old-ses=4294967295 ses=1 res=1
    [   30.589349] audit: type=1300 audit(1651253857.224:8): arch=c00000b7 syscall=64 success=yes exit=1 a0=8 a1=fffff2818ae8 a2=1 a3=ffff86618020 items=0 ppid=1 pid=894 auid=0 uid=0 gid=0 euid=0 suid=0 fsu)
    [   30.615916] audit: type=1327 audit(1651253857.224:8): proctitle="(systemd)"
    [   30.645525] audit: type=1334 audit(1651253857.300:9): prog-id=11 op=LOAD
    [   30.652328] audit: type=1300 audit(1651253857.300:9): arch=c00000b7 syscall=280 success=yes exit=8 a0=5 a1=ffffc72da630 a2=78 a3=0 items=0 ppid=1 pid=894 auid=0 uid=0 gid=0 euid=0 suid=0 fsuid=0 egid)
    [   30.677695] audit: type=1327 audit(1651253857.300:9): proctitle="(systemd)"
    [   30.684861] audit: type=1334 audit(1651253857.300:10): prog-id=11 op=UNLOAD
    [   30.692023] audit: type=1334 audit(1651253857.300:11): prog-id=12 op=LOAD
    root@am64xx-evm:~#

    Regards,

    Ankush

  • Hello Ankush,

    I wanted to look through your code and output this Friday, but I ran out of time. Please ping the thread if I have not replied again by Tuesday.

    Regards,

    Nick

  • Hi Nick,

    Can u pls look into this issue and provide ur suggestions.?

    Regards,

    Ankush

  • Hello Ankush,

    How many PRU Ethernet ports are you connecting to external PHYs? 1? 2?

    The reason I ask is because in one part of the devicetree file, you only enable 1 PRU Ethernet interface:

    			icssg0_emac0: port@0 {
    				reg = <0>;
    				phy-handle = <&icssg0_phy1>;
    				phy-mode = "mii";
    				/*ti,syscon-rgmii-delay = <&main_conf 0x4110>;*/
    				/* Filled in by bootloader */
    				local-mac-address = [00 00 00 00 00 00];
    			};
    			icssg0_emac1: port@1 {
    				reg = <1>;
    				/*ti,syscon-rgmii-delay = <&main_conf 0x4114>;*/
    				/* Filled in by bootloader */
    				local-mac-address = [00 00 00 00 00 00];
    				status = "disabled";
    			};

    But then later in your devicetree file, you override those settings to enable both PRU Ethernet interfaces. I assume this code is a mistake based on your other code:

    &icssg0_emac0 {
    	phy-mode = "mii";
    };
    
    &icssg0_emac1 {
    	status = "okay";
    	phy-handle = <&icssg1_phy2>;
    	phy-mode = "mii";
    }; 

    Do you have a separate PHY between the AM64x MAC and the external ksz9477? Or are you directly connecting the Ethernet traces?

    Regards,

    Nick

  • Hi Nick,

    But then later in your devicetree file, you override those settings to enable both PRU Ethernet interfaces. I assume this code is a mistake based on your other code:

    The reason I had enabled both the PRU interfaces is that i was not sure which interfaces will be working for me. Please guide me on this part if any changes is needed to correct it. The Port 6 of KSZ9477 is connected to J10 connector PRG0_PRU1 interface pins over MII on the AM64x EVM. The same is updated in the pin_MUX setting in the dts file.

     

    Do you have a separate PHY between the AM64x MAC and the external ksz9477? Or are you directly connecting the Ethernet traces?

    There is no seperate PHY connected inbetween the AM64x MAC and the external KSZ9477 EVM. I have  a confusion, if the ksz node should be updated within the icssg0_eth node. Pls suggest me on this .

    Regards,

    ANkush

  • The latest dts file is attached for ur reference.

    // SPDX-License-Identifier: GPL-2.0
    /*
     * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
     */
    
    /dts-v1/;
    
    #include <dt-bindings/mux/ti-serdes.h>
    #include <dt-bindings/phy/phy.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/net/ti-dp83867.h>
    #include <dt-bindings/leds/common.h>
    #include "k3-am642.dtsi"
    
    / {
    	compatible = "ti,am642-sk", "ti,am642";
    	model = "Texas Instruments AM642 SK";
    
    	aliases {
    		ethernet1 = "/icssg0-eth/ethernet-ports/port@0";
    		ethernet2 = "/icssg0-eth/ethernet-ports/port@1";
    		spi0 = &main_spi0;
    		gpio1 = &main_gpio1;
    	};
    
    	chosen {
    		stdout-path = "serial2:115200n8";
    		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
    	};
    
    	memory@80000000 {
    		device_type = "memory";
    		/* 2G RAM */
    		reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
    
    	};
    
    	reserved-memory {
    		#address-cells = <2>;
    		#size-cells = <2>;
    		ranges;
    
    		secure_ddr: optee@9e800000 {
    			reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
    			alignment = <0x1000>;
    			no-map;
    		};
    
    		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa0000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa0100000 0x00 0xf00000>;
    			no-map;
    		};
    #if 0
    		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa1000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa1100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa2000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa2100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa3000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa3100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa4000000 0x00 0x100000>;
    			no-map;
    		};
    
    		mcu_m4fss_memory_region: m4f-memory@a4100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa4100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		rtos_ipc_memory_region: ipc-memories@a5000000 {
    			reg = <0x00 0xa5000000 0x00 0x00800000>;
    			alignment = <0x1000>;
    			no-map;
    		};
    #endif
    	};
    
    	vusb_main: fixed-regulator-vusb-main5v0 {
    		/* USB MAIN INPUT 5V DC */
    		compatible = "regulator-fixed";
    		regulator-name = "vusb_main5v0";
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vcc_3v3_sys: fixedregulator-vcc-3v3-sys {
    		/* output of LP8733xx */
    		compatible = "regulator-fixed";
    		regulator-name = "vcc_3v3_sys";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		vin-supply = <&vusb_main>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vdd_mmc1: fixed-regulator-sd {
    		/* TPS2051BD */
    		compatible = "regulator-fixed";
    		regulator-name = "vdd_mmc1";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-boot-on;
    		enable-active-high;
    		vin-supply = <&vcc_3v3_sys>;
    		gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
    	};
    
    	com8_ls_en: regulator-1 {
    		compatible = "regulator-fixed";
    		regulator-name = "com8_ls_en";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-always-on;
    		regulator-boot-on;
    		pinctrl-0 = <&main_com8_ls_en_pins_default>;
    		pinctrl-names = "default";
    		gpio = <&main_gpio0 62 GPIO_ACTIVE_LOW>;
    	};
    
    	wlan_en: regulator-2 {
    		/* output of SN74AVC4T245RSVR */
    		compatible = "regulator-fixed";
    		regulator-name = "wlan_en";
    		regulator-min-microvolt = <1800000>;
    		regulator-max-microvolt = <1800000>;
    		enable-active-high;
    		pinctrl-0 = <&main_wlan_en_pins_default>;
    		pinctrl-names = "default";
    		vin-supply = <&com8_ls_en>;
    		gpio = <&main_gpio0 48 GPIO_ACTIVE_HIGH>;
    	};
    
    	led-controller {
    		compatible = "gpio-leds";
    
    		led-0 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <1>;
    			gpios = <&exp2 0 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-1 {
    			color = <LED_COLOR_ID_RED>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <2>;
    			gpios = <&exp2 1 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-2 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <3>;
    			gpios = <&exp2 2 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-3 {
    			color = <LED_COLOR_ID_AMBER>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <4>;
    			gpios = <&exp2 3 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-4 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <5>;
    			gpios = <&exp2 4 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-5 {
    			color = <LED_COLOR_ID_RED>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <6>;
    			gpios = <&exp2 5 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-6 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <7>;
    			gpios = <&exp2 6 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-7 {
    			color = <LED_COLOR_ID_AMBER>;
    			function = LED_FUNCTION_HEARTBEAT;
    			function-enumerator = <8>;
    			linux,default-trigger = "heartbeat";
    			gpios = <&exp2 7 GPIO_ACTIVE_HIGH>;
    		};
    	};
    /*
    	mdio_mux: mux-controller {
    		compatible = "gpio-mux";
    		#mux-control-cells = <0>;
    
    		mux-gpios = <&exp1 12 GPIO_ACTIVE_HIGH>;
    	};
    */
    	icssg0_eth: icssg0-eth {
    		compatible = "ti,am642-icssg-prueth";
    		pinctrl-names = "default";
    		pinctrl-0 = <&kszpruicssg0miigrt1_pins_default>;
    //		pinctrl-0 = <&mypruicssg0rgmii1_pins_default>;
    		sram = <&oc_sram>;
    		ti,prus = <&pru0_0>, <&rtu0_0>, <&tx_pru0_0>, <&pru0_1>, <&rtu0_1>, <&tx_pru0_1>;
    		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";
    
    		ti,pruss-gp-mux-sel = <2>,	/* MII mode */
    				      <2>,
    				      <2>,
    				      <2>,	/* MII mode */
    				      <2>,
    				      <2>;
    
    		ti,mii-g-rt = <&icssg0_mii_g_rt>;
    		ti,mii-rt = <&icssg0_mii_rt>;
    		ti,pa-stats = <&icssg0_pa_stats>;
    		iep = <&icssg0_iep0>,  <&icssg0_iep1>;
    
    		interrupt-parent = <&icssg0_intc>;
    		interrupts = <24 0 2>, <25 1 3>;
    		interrupt-names = "tx_ts0", "tx_ts1";
    
    		dmas = <&main_pktdma 0xc100 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc101 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc102 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc103 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc104 15>, /* egress slice 1 */
    		       <&main_pktdma 0xc105 15>, /* egress slice 1 */
    		       <&main_pktdma 0xc106 15>, /* egress slice 1 */
    		       <&main_pktdma 0xc107 15>, /* egress slice 1 */
    		       <&main_pktdma 0x4100 15>, /* ingress slice 0 */
    		       <&main_pktdma 0x4101 15>, /* ingress slice 1 */
    		       <&main_pktdma 0x4102 0>, /* mgmnt rsp slice 0 */
    		       <&main_pktdma 0x4103 0>; /* mgmnt rsp slice 1 */
    		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
    			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
    			    "rx0", "rx1",
    				"rxmgm0", "rxmgm1";
    
    //		ethernet-ports {
    //			#address-cells = <1>;
    //			#size-cells = <0>;
    			icssg0_emac0: ethernet-mii0 {
    //				reg = <0>;
    				phy-handle = <&icssg0_phy1>;
    				phy-mode = "mii";
    				/*ti,syscon-rgmii-delay = <&main_conf 0x4110>;*/
    				/* Filled in by bootloader */
    				local-mac-address = [00 00 00 00 00 00];
    //				status = "okay";
    			};
    			icssg0_emac1: ethernet-mii1 {
    //				reg = <1>;
    				phy-mode = "mii";
    				/*ti,syscon-rgmii-delay = <&main_conf 0x4114>;*/
    				/* Filled in by bootloader */
    				local-mac-address = [00 00 00 00 00 00];
    				status = "disabled";
    			};
    //		};
    	};
    /*	
    	mdio-mux-2 {
    		compatible = "mdio-mux-multiplexer";
    		mux-controls = <&mdio_mux>;
    		mdio-parent-bus = <&icssg1_mdio>;
    		#address-cells = <1>;
    		#size-cells = <0>;
    
    		mdio@0 {
    			reg = <0x0>;
    			#address-cells = <1>;
    			#size-cells = <0>;
    
    			icssg1_phy2: ethernet-phy@3 {
    				reg = <3>;
    			};
    		};
    	}; */
    };
    
    &main_pmx0 {
    
    	pinctrl-names = "default";
    	pinctrl-0 = <&mygpio1_pins_default>;
    
    	main_mmc1_pins_default: main-mmc1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0294, PIN_INPUT, 0) /* (J19) MMC1_CMD */
    			AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */
    			AM64X_IOPAD(0x028c, PIN_INPUT, 0) /* (L20) MMC1_CLK */
    			AM64X_IOPAD(0x0288, PIN_INPUT, 0) /* (K21) MMC1_DAT0 */
    			AM64X_IOPAD(0x0284, PIN_INPUT, 0) /* (L21) MMC1_DAT1 */
    			AM64X_IOPAD(0x0280, PIN_INPUT, 0) /* (K19) MMC1_DAT2 */
    			AM64X_IOPAD(0x027c, PIN_INPUT, 0) /* (K18) MMC1_DAT3 */
    			AM64X_IOPAD(0x0298, PIN_INPUT, 0) /* (D19) MMC1_SDCD */
    		>;
    	};
    
    	main_uart0_pins_default: main-uart0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
    			AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
    			AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
    			AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
    		>;
    	};
    
    	main_usb0_pins_default: main-usb0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
    		>;
    	};
    
    	main_i2c1_pins_default: main-i2c1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */
    			AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */
    		>;
    	};
    
    	mdio1_pins_default: mdio1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
    			AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
    		>;
    	};
    
    	rgmii1_pins_default: rgmii1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x011c, PIN_INPUT, 4) /* (AA13) PRG1_PRU1_GPO5.RGMII1_RD0 */
    			AM64X_IOPAD(0x0128, PIN_INPUT, 4) /* (U12) PRG1_PRU1_GPO8.RGMII1_RD1 */
    			AM64X_IOPAD(0x0150, PIN_INPUT, 4) /* (Y13) PRG1_PRU1_GPO18.RGMII1_RD2 */
    			AM64X_IOPAD(0x0154, PIN_INPUT, 4) /* (V12) PRG1_PRU1_GPO19.RGMII1_RD3 */
    			AM64X_IOPAD(0x00d8, PIN_INPUT, 4) /* (W13) PRG1_PRU0_GPO8.RGMII1_RXC */
    			AM64X_IOPAD(0x00cc, PIN_INPUT, 4) /* (V13) PRG1_PRU0_GPO5.RGMII1_RX_CTL */
    			AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
    			AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
    			AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
    			AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
    			AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
    			AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
    		>;
    	};
    
           rgmii2_pins_default: rgmii2-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
    			AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
    			AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */
    			AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */
    			AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */
    			AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */
    			AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */
    			AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */
    			AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */
    			AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */
    			AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */
    			AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
    		>;
    	};
    
    	ospi0_pins_default: ospi0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */
    			AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */
    			AM64X_IOPAD(0x000c, PIN_INPUT, 0) /* (M19) OSPI0_D0 */
    			AM64X_IOPAD(0x0010, PIN_INPUT, 0) /* (M18) OSPI0_D1 */
    			AM64X_IOPAD(0x0014, PIN_INPUT, 0) /* (M20) OSPI0_D2 */
    			AM64X_IOPAD(0x0018, PIN_INPUT, 0) /* (M21) OSPI0_D3 */
    			AM64X_IOPAD(0x001c, PIN_INPUT, 0) /* (P21) OSPI0_D4 */
    			AM64X_IOPAD(0x0020, PIN_INPUT, 0) /* (P20) OSPI0_D5 */
    			AM64X_IOPAD(0x0024, PIN_INPUT, 0) /* (N18) OSPI0_D6 */
    			AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */
    			AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
    		>;
    	};
    
    	main_ecap0_pins_default: main-ecap0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
    		>;
    	};
    	main_wlan_en_pins_default: main-wlan-en-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */
    		>;
    	};
    
    	main_com8_ls_en_pins_default: main-com8-ls-en-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00fc, PIN_OUTPUT, 7) /* (U7) PRG1_PRU0_GPO17.GPIO0_62 */
    		>;
    	};
    
    	main_wlan_pins_default: main-wlan-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00bc, PIN_INPUT, 7) /* (U8) GPIO0_46 */
    		>;
    	};
    
    	main_eqep0_pins_default: main-eqep0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00a0, PIN_INPUT, 3) /* (N16) GPMC0_WPn.EQEP0_A */
    			AM64X_IOPAD(0x00a4, PIN_INPUT, 3) /* (N17) GPMC0_DIR.EQEP0_B */
    			AM64X_IOPAD(0x00ac, PIN_INPUT, 3) /* (R20) GPMC0_CSn1.EQEP0_I */
    			AM64X_IOPAD(0x00a8, PIN_INPUT, 3) /* (R19) GPMC0_CSn0.EQEP0_S */
    		>;
    	};
    
    	main_spi0_pins_default: myspi0ksz-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0210, PIN_INPUT, 0) /* (D13) SPI0_CLK */
    			AM64X_IOPAD(0x0214, PIN_INPUT, 0) /* (A13) SPI0_D0 */
    			AM64X_IOPAD(0x0218, PIN_INPUT, 0) /* (A14) SPI0_D1 */
    			AM64X_IOPAD(0x0208, PIN_INPUT, 0) /* (D12) SPI0_CS0 */
    		>;
    	};
    #if 1
    	kszpruicssg0miigrt1_pins_default: kszpruicssg0miigrt1-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x01f0, PIN_INPUT, 1) /* (AA4) PRG0_PRU1_GPO16.PR0_MII_MT1_CLK */
    			AM64X_IOPAD(0x01ec, PIN_OUTPUT, 0) /* (U5) PRG0_PRU1_GPO15.PR0_MII1_TXEN */
    			AM64X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (U6) PRG0_PRU1_GPO14.PR0_MII1_TXD3 */
    			AM64X_IOPAD(0x01e4, PIN_OUTPUT, 0) /* (T6) PRG0_PRU1_GPO13.PR0_MII1_TXD2 */
    			AM64X_IOPAD(0x01e0, PIN_OUTPUT, 0) /* (Y4) PRG0_PRU1_GPO12.PR0_MII1_TXD1 */
    			AM64X_IOPAD(0x01dc, PIN_OUTPUT, 0) /* (W4) PRG0_PRU1_GPO11.PR0_MII1_TXD0 */
    			AM64X_IOPAD(0x01c0, PIN_INPUT, 1) /* (W3) PRG0_PRU1_GPO4.PR0_MII1_RXDV */
    			AM64X_IOPAD(0x01c8, PIN_INPUT, 1) /* (R5) PRG0_PRU1_GPO6.PR0_MII_MR1_CLK */
    			AM64X_IOPAD(0x01bc, PIN_INPUT, 1) /* (T4) PRG0_PRU1_GPO3.PR0_MII1_RXD3 */
    			AM64X_IOPAD(0x01b8, PIN_INPUT, 1) /* (V3) PRG0_PRU1_GPO2.PR0_MII1_RXD2 */
    			AM64X_IOPAD(0x01c4, PIN_INPUT, 1) /* (P4) PRG0_PRU1_GPO5.PR0_MII1_RXER */
    			AM64X_IOPAD(0x01b4, PIN_INPUT, 1) /* (W2) PRG0_PRU1_GPO1.PR0_MII1_RXD1 */
    			AM64X_IOPAD(0x01b0, PIN_INPUT, 1) /* (Y2) PRG0_PRU1_GPO0.PR0_MII1_RXD0 */
    			AM64X_IOPAD(0x01d0, PIN_INPUT, 1) /* (R1) PRG0_PRU1_GPO8.PR0_MII1_RXLINK */
    		>;
    	};
    #endif
    #if 0
    	mypruicssg0rgmii1_pins_default: mypruicssg0rgmii1-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x01b0, PIN_INPUT, 2) /* (Y2) PRG0_PRU1_GPO0.PRG0_RGMII2_RD0 */
    			AM64X_IOPAD(0x01b4, PIN_INPUT, 2) /* (W2) PRG0_PRU1_GPO1.PRG0_RGMII2_RD1 */
    			AM64X_IOPAD(0x01b8, PIN_INPUT, 2) /* (V3) PRG0_PRU1_GPO2.PRG0_RGMII2_RD2 */
    			AM64X_IOPAD(0x01bc, PIN_INPUT, 2) /* (T4) PRG0_PRU1_GPO3.PRG0_RGMII2_RD3 */
    			AM64X_IOPAD(0x01c8, PIN_INPUT, 2) /* (R5) PRG0_PRU1_GPO6.PRG0_RGMII2_RXC */
    			AM64X_IOPAD(0x01c0, PIN_INPUT, 2) /* (W3) PRG0_PRU1_GPO4.PRG0_RGMII2_RX_CTL */
    			AM64X_IOPAD(0x01dc, PIN_INPUT, 2) /* (W4) PRG0_PRU1_GPO11.PRG0_RGMII2_TD0 */
    			AM64X_IOPAD(0x01e0, PIN_INPUT, 2) /* (Y4) PRG0_PRU1_GPO12.PRG0_RGMII2_TD1 */
    			AM64X_IOPAD(0x01e4, PIN_INPUT, 2) /* (T6) PRG0_PRU1_GPO13.PRG0_RGMII2_TD2 */
    			AM64X_IOPAD(0x01e8, PIN_INPUT, 2) /* (U6) PRG0_PRU1_GPO14.PRG0_RGMII2_TD3 */
    			AM64X_IOPAD(0x01f0, PIN_INPUT, 2) /* (AA4) PRG0_PRU1_GPO16.PRG0_RGMII2_TXC */
    			AM64X_IOPAD(0x01ec, PIN_INPUT, 2) /* (U5) PRG0_PRU1_GPO15.PRG0_RGMII2_TX_CTL */
    		>;
    	};
    #endif
    	mygpio1_pins_default: mygpio1-default-pins {
    		pinctrl-single,pins = <
    //			AM64X_IOPAD(0x01d8, PIN_OUTPUT, 7) /* (V6) PRG0_PRU1_GPO10.GPIO1_30 */
    			AM64X_IOPAD(0x01cc, PIN_OUTPUT, 7) /* (W5) PRG0_PRU1_GPO7.GPIO1_27 */
    		>;
    	};
    #if 1
    	mypruicssg0mdio1_pins_default: mypruicssg0mdio1-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0204, PIN_OUTPUT, 0) /* (P3) PRG0_MDIO0_MDC */
    			AM64X_IOPAD(0x0200, PIN_INPUT, 0) /* (P2) PRG0_MDIO0_MDIO */
    		>;
    	};
    #endif
    };
    
    &main_uart0 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_uart0_pins_default>;
    };
    
    &main_uart1 {
    	/* main_uart1 is reserved for firmware usage */
    	status = "reserved";
    };
    
    &main_i2c1 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_i2c1_pins_default>;
    	clock-frequency = <400000>;
    
    	exp1: gpio@70 {
    		compatible = "nxp,pca9538";
    		reg = <0x70>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
    				  "PRU_DETECT", "MMC1_SD_EN",
    				  "VPP_LDO_EN", "RPI_PS_3V3_En",
    				  "RPI_PS_5V0_En", "RPI_HAT_DETECT";
    	};
    
    	exp2: gpio@60 {
    		compatible = "ti,tpic2810";
    		reg = <0x60>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		gpio-line-names = "LED1","LED2","LED3","LED4","LED5","LED6","LED7","LED8";
    	};
    };
    
    /* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */
    &mcu_gpio0 {
    	status = "reserved";
    };
    
    &mcu_gpio_intr {
    	status = "reserved";
    };
    
    &sdhci0 {
    	status = "okay";
    	vmmc-supply = <&wlan_en>;
    	bus-width = <4>;
    	non-removable;
    	cap-power-off-card;
    	keep-power-in-suspend;
    	ti,driver-strength-ohm = <50>;
    
    	#address-cells = <1>;
    	#size-cells = <0>;
    	wlcore: wlcore@2 {
    		compatible = "ti,wl1837";
    		reg = <2>;
    		pinctrl-0 = <&main_wlan_pins_default>;
    		pinctrl-names = "default";
    		interrupt-parent = <&main_gpio0>;
    		interrupts = <46 IRQ_TYPE_EDGE_FALLING>;
    	};
    };
    
    &sdhci1 {
    	/* SD/MMC */
    	status = "okay";
    	vmmc-supply = <&vdd_mmc1>;
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mmc1_pins_default>;
    	disable-wp;
    };
    
    &serdes_ln_ctrl {
    	idle-states = <AM64_SERDES0_LANE0_USB>;
    };
    
    &serdes0 {
    	serdes0_usb_link: phy@0 {
    		reg = <0>;
    		cdns,num-lanes = <1>;
    		#phy-cells = <0>;
    		cdns,phy-type = <PHY_TYPE_USB3>;
    		resets = <&serdes_wiz0 1>;
    	};
    };
    
    &usbss0 {
    	ti,vbus-divider;
    };
    
    &usb0 {
    	dr_mode = "host";
    	maximum-speed = "super-speed";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_usb0_pins_default>;
    	phys = <&serdes0_usb_link>;
    	phy-names = "cdns3,usb3-phy";
    };
    
    &cpsw3g {
    	pinctrl-names = "default";
    	pinctrl-0 = <&rgmii1_pins_default
    		     &rgmii2_pins_default>;
    
    	/* Map HW8_TS_PUSH to GENF1 */
    	cpts@3d000 {
    		ti,pps = <7 1>;
    	};
    };
    
    &cpsw_port1 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&cpsw3g_phy0>;
    };
    
    &cpsw_port2 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&cpsw3g_phy1>;
    };
    
    &cpsw3g_mdio {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&mdio1_pins_default>;
    
    	cpsw3g_phy0: ethernet-phy@0 {
    		reg = <0>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    	};
    
    	cpsw3g_phy1: ethernet-phy@1 {
    		reg = <1>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    	};
    };
    
    &tscadc0 {
    	status = "disabled";
    };
    
    &ospi0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&ospi0_pins_default>;
    
    	flash@0 {
    		compatible = "jedec,spi-nor";
    		reg = <0x0>;
    		spi-tx-bus-width = <8>;
    		spi-rx-bus-width = <8>;
    		spi-max-frequency = <25000000>;
    		cdns,tshsl-ns = <60>;
    		cdns,tsd2d-ns = <60>;
    		cdns,tchsh-ns = <60>;
    		cdns,tslch-ns = <60>;
    		cdns,read-delay = <4>;
    
    		partitions {
    			compatible = "fixed-partitions";
    			#address-cells = <1>;
    			#size-cells = <1>;
    
    			partition@0 {
    				label = "ospi.tiboot3";
    				reg = <0x0 0x100000>;
    			};
    
    			partition@100000 {
    				label = "ospi.tispl";
    				reg = <0x100000 0x200000>;
    			};
    
    			partition@300000 {
    				label = "ospi.u-boot";
    				reg = <0x300000 0x400000>;
    			};
    
    			partition@700000 {
    				label = "ospi.env";
    				reg = <0x700000 0x40000>;
    			};
    
    			partition@740000 {
    				label = "ospi.env.backup";
    				reg = <0x740000 0x40000>;
    			};
    
    			partition@800000 {
    				label = "ospi.rootfs";
    				reg = <0x800000 0x37c0000>;
    			};
    
    			partition@3fc0000 {
    				label = "ospi.phypattern";
    				reg = <0x3fc0000 0x40000>;
    			};
    		};
    	};
    };
    
    &mailbox0_cluster2 {
    	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
    		ti,mbox-rx = <0 0 2>;
    		ti,mbox-tx = <1 0 2>;
    	};
    /*
    	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
    		ti,mbox-rx = <2 0 2>;
    		ti,mbox-tx = <3 0 2>;
    	};*/
    };
    
    &mailbox0_cluster3 {
    	status = "disabled";
    };
    /*
    &mailbox0_cluster4 {
    	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
    		ti,mbox-rx = <0 0 2>;
    		ti,mbox-tx = <1 0 2>;
    	};
    
    	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
    		ti,mbox-rx = <2 0 2>;
    		ti,mbox-tx = <3 0 2>;
    	};
    }; */
    
    &mailbox0_cluster5 {
    	status = "disabled";
    };
    /*
    &mailbox0_cluster6 {
    	mbox_m4_0: mbox-m4-0 {
    		ti,mbox-rx = <0 0 2>;
    		ti,mbox-tx = <1 0 2>;
    	};
    }; */
    
    &mailbox0_cluster7 {
    	status = "disabled";
    };
    
    /* set R5F subsystem 0 to single-CPU mode */
    &main_r5fss0 {
    	ti,cluster-mode = <2>;
    };
    
    &main_r5fss0_core0 {
    	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
    	memory-region = <&main_r5fss0_core0_dma_memory_region>,
    			<&main_r5fss0_core0_memory_region>;
    };
    /*
    &main_r5fss0_core1 {
    	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
    	memory-region = <&main_r5fss0_core1_dma_memory_region>,
    			<&main_r5fss0_core1_memory_region>;
    };
    
    &main_r5fss1_core0 {
    	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
    	memory-region = <&main_r5fss1_core0_dma_memory_region>,
    			<&main_r5fss1_core0_memory_region>;
    };
    
    &main_r5fss1_core1 {
    	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
    	memory-region = <&main_r5fss1_core1_dma_memory_region>,
    			<&main_r5fss1_core1_memory_region>;
    }; */
    
    /* disable R5F subsystem 1 */
    &main_r5fss1 {
    	status = "disabled";
    };
    
    &mcu_m4fss {
    /*	mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
    	memory-region = <&mcu_m4fss_dma_memory_region>,
    			<&mcu_m4fss_memory_region>; */
    	status = "disabled";
    };
    
    &ecap0 {
    	status = "okay";
    	/* PWM is available on Pin 1 of header J3 */
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_ecap0_pins_default>;
    };
    
    &eqep0 {
    	/* EQEP0_A is available on Pin 18 of header J4 */
    	/* EQEP0_B is available on Pin 22 of header J4 */
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_eqep0_pins_default>;
    };
    
    #define TS_OFFSET(pa, val)     (0x4+(pa)*4) (0x10000 | val)
    
    &timesync_router {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&cpsw_cpts_pps>;
    
    	/*
    	 * Use Time Sync Router to map GENF1 input to HW8_TS_PUSH output as well
    	 * as the PRU ICSSG0 SYNC1 output.
    	 */
    	cpsw_cpts_pps: cpsw-cpts-pps {
    		pinctrl-single,pins = <
    			/* pps [cpts genf1] in22 -> out37 [cpts hw8_push] */
    			TS_OFFSET(37, 22)
    			/* pps [cpts genf1] in22 -> out26 [SYNC1_OUT pin] */
    			TS_OFFSET(26, 22)
    			>;
    	};
    };
    /*
    &main_gpio1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mygpio1_pins_default>;
    }; */
    
    &main_spi0 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_spi0_pins_default>;
    
    	ksz9477: ksz9477@0 {
    		compatible = "microchip,ksz9477";
    		reg = <0>;
    		spi-max-frequency = <1000000>;
    		spi-cpha;
    		spi-cpol;
    		reset-gpios = <&main_gpio1 27 GPIO_ACTIVE_LOW>;
    		status = "okay";
    
    		ports {
    				#address-cells = <1>;
    				#size-cells = <0>;
    				port@0 {
    						reg = <0>;
    						label = "lan1";
    				};
    				port@1 {
    						reg = <1>;
    						label = "lan2";
    				};
    				port@2 {
    						reg = <2>;
    						label = "lan3";
    				};
    				port@3 {
    						reg = <3>;
    						label = "lan4";
    				};
    				port@4 {
    						reg = <4>;
    						label = "lan5";
    				};
    				port@5 {
    					    reg = <5>;
    						label = "cpu";
    						/*ethernet = <&mac>;*/
    						phy-mode = "mii";
    						/*tx-internal-delay-ps = <2000>;*/
    						fixed-link {
    								speed = <100>;
    								full-duplex;
    						};
    				};
    				/*port@6 {
    						reg = <6>;
    						label = "lan6";
    				};*/
    			};
    	};
    	
    };
    
    &cpsw3g {
    	pinctrl-0 = <&rgmii1_pins_default>;
    };
    
    &cpsw_port2 {
    	status = "disabled";
    };
    
    &icssg0_eth {
    	pinctrl-0 = <&kszpruicssg0miigrt1_pins_default>;
    	status = "okay";
    };
    
    &icssg0_emac0 {
    	phy-mode = "mii";
    };
    
    &icssg0_emac1 {
    	status = "okay";
    	/*phy-handle = <&icssg1_phy2>;*/
    	phy-mode = "mii";
    }; 
    
    &icssg0_mdio {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&mypruicssg0mdio1_pins_default>;
    
    	icssg0_phy1: ethernet-phy@0 {
    		reg = <0xf>;
    		tx-internal-delay-ps = <250>;
    		rx-internal-delay-ps = <2000>;
    	};
    };

    I want to drive the ICSSG0 PRU inetrface in the MAC mode and KSZ9477 in the PHY mode. Is this setting in my dts file correct ? Pls suggest.

    Below is the kernel log messages related to KSZ9477 and ICSSG

    root@am64xx-evm:~# 
    root@am64xx-evm:~# 
    root@am64xx-evm:~# dmesg | grep -i icssg
    [   10.792070] icssg-prueth: probe of icssg0-eth failed with error -2
    root@am64xx-evm:~# dmesg | grep -i spi
    [    0.000000] GICv3: 256 SPIs implemented
    [    0.000000] GICv3: 0 Extended SPIs implemented
    [    1.734550] spi-nor spi1.0: s28hs512t (65536 Kbytes)
    [    1.739682] 7 fixed-partitions partitions found on MTD device fc40000.spi.0
    [    1.746663] Creating 7 MTD partitions on "fc40000.spi.0":
    [    1.752061] 0x000000000000-0x000000100000 : "ospi.tiboot3"
    [    1.759065] 0x000000100000-0x000000300000 : "ospi.tispl"
    [    1.765876] 0x000000300000-0x000000700000 : "ospi.u-boot"
    [    1.772725] 0x000000700000-0x000000740000 : "ospi.env"
    [    1.779339] 0x000000740000-0x000000780000 : "ospi.env.backup"
    [    1.786577] 0x000000800000-0x000003fc0000 : "ospi.rootfs"
    [    1.793540] 0x000003fc0000-0x000004000000 : "ospi.phypattern"
    [   15.497247] ksz-switch spi0.0: found switch: KSZ9477, rev 0
    [   15.597155] ksz-switch: probe of spi0.0 failed with error -22
    root@am64xx-evm:~# 
    root@am64xx-evm:~# 
    root@am64xx-evm:~# dmesg | grep -i pru
    [    1.497520] remoteproc remoteproc0: 30034000.pru is available
    [    1.516181] remoteproc remoteproc2: 3000a000.txpru is available
    [    1.525827] remoteproc remoteproc3: 30038000.pru is available
    [    1.544530] remoteproc remoteproc5: 3000c000.txpru is available
    [    1.638986] remoteproc remoteproc6: 300b4000.pru is available
    [    1.657791] remoteproc remoteproc8: 3008a000.txpru is available
    [    1.667333] remoteproc remoteproc9: 300b8000.pru is available
    [    1.686194] remoteproc remoteproc11: 3008c000.txpru is available
    [   10.792070] icssg-prueth: probe of icssg0-eth failed with error -2
    root@am64xx-evm:~# dmesg | grep -i ksz
    [   15.497247] ksz-switch spi0.0: found switch: KSZ9477, rev 0
    [   15.574663] **Ankush** file = drivers/net/dsa/microchip/ksz_common.c, line = 3056, ret = -22
    [   15.597155] ksz-switch: probe of spi0.0 failed with error -22
    root@am64xx-evm:~# 
    root@am64xx-evm:~# 
    root@am64xx-evm:~# dmesg | grep -i remoteproc
    [    1.497520] remoteproc remoteproc0: 30034000.pru is available
    [    1.506875] remoteproc remoteproc1: 30004000.rtu is available
    [    1.516181] remoteproc remoteproc2: 3000a000.txpru is available
    [    1.525827] remoteproc remoteproc3: 30038000.pru is available
    [    1.535234] remoteproc remoteproc4: 30006000.rtu is available
    [    1.544530] remoteproc remoteproc5: 3000c000.txpru is available
    [    1.638986] remoteproc remoteproc6: 300b4000.pru is available
    [    1.648364] remoteproc remoteproc7: 30084000.rtu is available
    [    1.657791] remoteproc remoteproc8: 3008a000.txpru is available
    [    1.667333] remoteproc remoteproc9: 300b8000.pru is available
    [    1.676716] remoteproc remoteproc10: 30086000.rtu is available
    [    1.686194] remoteproc remoteproc11: 3008c000.txpru is available
    [   12.423662] platform 78000000.r5f: configured R5F for remoteproc mode
    [   12.558676] remoteproc remoteproc12: 78000000.r5f is available
    [   12.606968] remoteproc remoteproc12: powering up 78000000.r5f
    [   12.612911] remoteproc remoteproc12: Booting fw image am64-main-r5f0_0-fw, size 86352
    [   12.657925] remoteproc remoteproc12: remote processor 78000000.r5f is now up
    root@am64xx-evm:~# 
    root@am64xx-evm:~# dmesg | grep -i icssg     
    [   10.792070] icssg-prueth: probe of icssg0-eth failed with error -2
    root@am64xx-evm:~# 
    root@am64xx-evm:~# 
    root@am64xx-evm:~# dmesg | grep -i dsa  
    [   15.503664] **Ankush** file = net/dsa/dsa2.c, line = 1783
    [   15.522459] **Ankush** file = net/dsa/dsa2.c, line = 412
    [   15.528507] DSA: tree 0 has no CPU port
    [   15.533310] **Ankush** file = net/dsa/dsa2.c, line = 1150, err = -22
    [   15.541439] **Ankush** file = net/dsa/dsa2.c, line = 1769,err = -22
    [   15.554282] **Ankush** file = net/dsa/dsa2.c, line = 1785, err = -22
    [   15.561275] **Ankush** file = net/dsa/dsa2.c, line = 1789, err = -22
    [   15.574663] **Ankush** file = drivers/net/dsa/microchip/ksz_common.c, line = 3056, ret = -22
    root@am64xx-evm:~# 
    root@am64xx-evm:~# 
    root@am64xx-evm:~# ls -l /sys/bus/spi/devices/spi0.0/
    total 0
    -rw-r--r-- 1 root root 4096 Apr 30 00:01 driver_override
    -r--r--r-- 1 root root 4096 Apr 30 00:01 modalias
    lrwxrwxrwx 1 root root    0 Apr 30 00:01 of_node -> ../../../../../../../firmware/devicetree/base/bus@f4000/spi@20100000/ksz9477@0
    drwxr-xr-x 2 root root    0 Apr 30 00:01 power
    drwxr-xr-x 2 root root    0 Apr 30 00:01 statistics
    lrwxrwxrwx 1 root root    0 Apr 29 23:51 subsystem -> ../../../../../../../bus/spi
    lrwxrwxrwx 1 root root    0 Apr 30 00:01 supplier:platform:601000.gpio -> ../../../../../../virtual/devlink/platform:601000.gpio--spi:spi0.0
    -rw-r--r-- 1 root root 4096 Apr 29 23:51 uevent
    -r--r--r-- 1 root root 4096 Apr 30 00:01 waiting_for_supplier
    root@am64xx-evm:~# 
    

    Regards,

    ANkush

  • Hello Ankush,

    I will comment on things that do not look correct to me in the devicetree file. However, please keep in mind that TI does not produce the KSZ9477, and we cannot support questions about getting it working with a Linux processor. We have gotten regular PHYs to work with our chips, but I have no idea if KSZ9477 behaves like a regular PHY. You would need to get support for that from Microchip.

    I only see one example of using the device, at
    arm/boot/dts/microchip/at91-sama5d3_ksz9477_evb.dts

    Other devicetree notes

    ethernet-ports { should probably NOT be commented out.

    Look at the MII pinmuxing that you are setting in the datasheet - which PRU core is associated with those signals? Make sure that PRU interface is enabled, and the other one is disabled (i.e., the other emacX node in the devicetree file should be disabled).

    Regards,

    Nick

  • Hi Nick,

    Thanks for ur valuable suggestion.

    Here  the AM642 Processor ICSSG0 PRU behaves as integrated MAC and KSZ9477 (Port 6) behaves as PHY (port@5 setting in the dts file). For this combination is the dts setting proper or not for MII ,is my concern. I have also disabled / commented unused remote cores (Link: https://dev.ti.com/tirex/explore/node?a=7qm9DIS__LATEST&node=A__Af8fKrelrD3vCdWjTx7.ww__AM64-ACADEMY__WI1KRXP__LATEST) in the dts. Is this causing any issue

    I want to link icssg0_emac0 to port@5 of the ksz9477S node in the dts.

    Can u pls suggest on this pls.

    Updated dts file is below:

    // SPDX-License-Identifier: GPL-2.0
    /*
     * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
     */
    
    /dts-v1/;
    
    #include <dt-bindings/mux/ti-serdes.h>
    #include <dt-bindings/phy/phy.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/net/ti-dp83867.h>
    #include <dt-bindings/leds/common.h>
    #include "k3-am642.dtsi"
    
    / {
    	compatible = "ti,am642-sk", "ti,am642";
    	model = "Texas Instruments AM642 SK";
    
    	aliases {
    		/*ethernet1 = "/icssg0-eth/ethernet-ports/port@0";
    		ethernet2 = "/icssg0-eth/ethernet-ports/port@1";*/
    		spi0 = &main_spi0;
    		gpio1 = &main_gpio1;
    	};
    
    	chosen {
    		stdout-path = "serial2:115200n8";
    		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
    	};
    
    	memory@80000000 {
    		device_type = "memory";
    		/* 2G RAM */
    		reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
    
    	};
    
    	reserved-memory {
    		#address-cells = <2>;
    		#size-cells = <2>;
    		ranges;
    
    		secure_ddr: optee@9e800000 {
    			reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
    			alignment = <0x1000>;
    			no-map;
    		};
    
    		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa0000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa0100000 0x00 0xf00000>;
    			no-map;
    		};
    #if 0
    		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa1000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa1100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa2000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa2100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa3000000 0x00 0x100000>;
    			no-map;
    		};
    
    		main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa3100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa4000000 0x00 0x100000>;
    			no-map;
    		};
    
    		mcu_m4fss_memory_region: m4f-memory@a4100000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00 0xa4100000 0x00 0xf00000>;
    			no-map;
    		};
    
    		rtos_ipc_memory_region: ipc-memories@a5000000 {
    			reg = <0x00 0xa5000000 0x00 0x00800000>;
    			alignment = <0x1000>;
    			no-map;
    		};
    #endif
    	};
    
    	vusb_main: fixed-regulator-vusb-main5v0 {
    		/* USB MAIN INPUT 5V DC */
    		compatible = "regulator-fixed";
    		regulator-name = "vusb_main5v0";
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vcc_3v3_sys: fixedregulator-vcc-3v3-sys {
    		/* output of LP8733xx */
    		compatible = "regulator-fixed";
    		regulator-name = "vcc_3v3_sys";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		vin-supply = <&vusb_main>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vdd_mmc1: fixed-regulator-sd {
    		/* TPS2051BD */
    		compatible = "regulator-fixed";
    		regulator-name = "vdd_mmc1";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-boot-on;
    		enable-active-high;
    		vin-supply = <&vcc_3v3_sys>;
    		gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
    	};
    
    	com8_ls_en: regulator-1 {
    		compatible = "regulator-fixed";
    		regulator-name = "com8_ls_en";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-always-on;
    		regulator-boot-on;
    		pinctrl-0 = <&main_com8_ls_en_pins_default>;
    		pinctrl-names = "default";
    		gpio = <&main_gpio0 62 GPIO_ACTIVE_LOW>;
    	};
    
    	wlan_en: regulator-2 {
    		/* output of SN74AVC4T245RSVR */
    		compatible = "regulator-fixed";
    		regulator-name = "wlan_en";
    		regulator-min-microvolt = <1800000>;
    		regulator-max-microvolt = <1800000>;
    		enable-active-high;
    		pinctrl-0 = <&main_wlan_en_pins_default>;
    		pinctrl-names = "default";
    		vin-supply = <&com8_ls_en>;
    		gpio = <&main_gpio0 48 GPIO_ACTIVE_HIGH>;
    	};
    
    	led-controller {
    		compatible = "gpio-leds";
    
    		led-0 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <1>;
    			gpios = <&exp2 0 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-1 {
    			color = <LED_COLOR_ID_RED>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <2>;
    			gpios = <&exp2 1 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-2 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <3>;
    			gpios = <&exp2 2 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-3 {
    			color = <LED_COLOR_ID_AMBER>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <4>;
    			gpios = <&exp2 3 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-4 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <5>;
    			gpios = <&exp2 4 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-5 {
    			color = <LED_COLOR_ID_RED>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <6>;
    			gpios = <&exp2 5 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-6 {
    			color = <LED_COLOR_ID_GREEN>;
    			function = LED_FUNCTION_INDICATOR;
    			function-enumerator = <7>;
    			gpios = <&exp2 6 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-7 {
    			color = <LED_COLOR_ID_AMBER>;
    			function = LED_FUNCTION_HEARTBEAT;
    			function-enumerator = <8>;
    			linux,default-trigger = "heartbeat";
    			gpios = <&exp2 7 GPIO_ACTIVE_HIGH>;
    		};
    	};
    
    	icssg0_eth: icssg0-eth {
    		compatible = "ti,am642-icssg-prueth";
    		pinctrl-names = "default";
    		pinctrl-0 = <&kszpruicssg0miigrt1_pins_default>;
    		
    		sram = <&oc_sram>;
    		ti,prus = <&pru0_0>, <&rtu0_0>, <&tx_pru0_0>, <&pru0_1>, <&rtu0_1>, <&tx_pru0_1>;
    		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
    				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";
    
    		ti,pruss-gp-mux-sel = <2>,	/* MII mode */
    				      <2>,
    				      <2>,
    				      <2>,	/* MII mode */
    				      <2>,
    				      <2>;
    
    		ti,mii-g-rt = <&icssg0_mii_g_rt>;
    		ti,mii-rt = <&icssg0_mii_rt>;
    		ti,pa-stats = <&icssg0_pa_stats>;
    		iep = <&icssg0_iep0>,  <&icssg0_iep1>;
    
    		interrupt-parent = <&icssg0_intc>;
    		interrupts = <24 0 2>, <25 1 3>;
    		interrupt-names = "tx_ts0", "tx_ts1";
    
    		dmas = <&main_pktdma 0xc100 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc101 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc102 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc103 15>, /* egress slice 0 */
    		       <&main_pktdma 0xc104 15>, /* egress slice 1 */
    		       <&main_pktdma 0xc105 15>, /* egress slice 1 */
    		       <&main_pktdma 0xc106 15>, /* egress slice 1 */
    		       <&main_pktdma 0xc107 15>, /* egress slice 1 */
    		       <&main_pktdma 0x4100 15>, /* ingress slice 0 */
    		       <&main_pktdma 0x4101 15>, /* ingress slice 1 */
    		       <&main_pktdma 0x4102 0>, /* mgmnt rsp slice 0 */
    		       <&main_pktdma 0x4103 0>; /* mgmnt rsp slice 1 */
    		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
    			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
    			    "rx0", "rx1",
    				"rxmgm0", "rxmgm1";
    
    		ethernet-ports {
    			#address-cells = <1>;
    			#size-cells = <0>;
    			icssg0_emac0: ethernet-mii0 {
    				phy-handle = <&icssg0_phy1>;
    				phy-mode = "mii";
    				/* Filled in by bootloader */
    				local-mac-address = [00 00 00 00 00 00];
    				status = "okay";
    			};
    			icssg0_emac1: ethernet-mii1 {
    				phy-mode = "mii";
    				/* Filled in by bootloader */
    				local-mac-address = [00 00 00 00 00 00];
    				status = "disabled";
    			};
    		};
    	};
    };
    
    &main_pmx0 {
    
    	pinctrl-names = "default";
    	pinctrl-0 = <&mygpio1_pins_default>;
    
    	main_mmc1_pins_default: main-mmc1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0294, PIN_INPUT, 0) /* (J19) MMC1_CMD */
    			AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */
    			AM64X_IOPAD(0x028c, PIN_INPUT, 0) /* (L20) MMC1_CLK */
    			AM64X_IOPAD(0x0288, PIN_INPUT, 0) /* (K21) MMC1_DAT0 */
    			AM64X_IOPAD(0x0284, PIN_INPUT, 0) /* (L21) MMC1_DAT1 */
    			AM64X_IOPAD(0x0280, PIN_INPUT, 0) /* (K19) MMC1_DAT2 */
    			AM64X_IOPAD(0x027c, PIN_INPUT, 0) /* (K18) MMC1_DAT3 */
    			AM64X_IOPAD(0x0298, PIN_INPUT, 0) /* (D19) MMC1_SDCD */
    		>;
    	};
    
    	main_uart0_pins_default: main-uart0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
    			AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
    			AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
    			AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
    		>;
    	};
    
    	main_usb0_pins_default: main-usb0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
    		>;
    	};
    
    	main_i2c1_pins_default: main-i2c1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */
    			AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */
    		>;
    	};
    
    	mdio1_pins_default: mdio1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
    			AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
    		>;
    	};
    
    	rgmii1_pins_default: rgmii1-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x011c, PIN_INPUT, 4) /* (AA13) PRG1_PRU1_GPO5.RGMII1_RD0 */
    			AM64X_IOPAD(0x0128, PIN_INPUT, 4) /* (U12) PRG1_PRU1_GPO8.RGMII1_RD1 */
    			AM64X_IOPAD(0x0150, PIN_INPUT, 4) /* (Y13) PRG1_PRU1_GPO18.RGMII1_RD2 */
    			AM64X_IOPAD(0x0154, PIN_INPUT, 4) /* (V12) PRG1_PRU1_GPO19.RGMII1_RD3 */
    			AM64X_IOPAD(0x00d8, PIN_INPUT, 4) /* (W13) PRG1_PRU0_GPO8.RGMII1_RXC */
    			AM64X_IOPAD(0x00cc, PIN_INPUT, 4) /* (V13) PRG1_PRU0_GPO5.RGMII1_RX_CTL */
    			AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
    			AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
    			AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
    			AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
    			AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
    			AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
    		>;
    	};
    
           rgmii2_pins_default: rgmii2-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
    			AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
    			AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */
    			AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */
    			AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */
    			AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */
    			AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */
    			AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */
    			AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */
    			AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */
    			AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */
    			AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
    		>;
    	};
    
    	ospi0_pins_default: ospi0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */
    			AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */
    			AM64X_IOPAD(0x000c, PIN_INPUT, 0) /* (M19) OSPI0_D0 */
    			AM64X_IOPAD(0x0010, PIN_INPUT, 0) /* (M18) OSPI0_D1 */
    			AM64X_IOPAD(0x0014, PIN_INPUT, 0) /* (M20) OSPI0_D2 */
    			AM64X_IOPAD(0x0018, PIN_INPUT, 0) /* (M21) OSPI0_D3 */
    			AM64X_IOPAD(0x001c, PIN_INPUT, 0) /* (P21) OSPI0_D4 */
    			AM64X_IOPAD(0x0020, PIN_INPUT, 0) /* (P20) OSPI0_D5 */
    			AM64X_IOPAD(0x0024, PIN_INPUT, 0) /* (N18) OSPI0_D6 */
    			AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */
    			AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
    		>;
    	};
    
    	main_ecap0_pins_default: main-ecap0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
    		>;
    	};
    	main_wlan_en_pins_default: main-wlan-en-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */
    		>;
    	};
    
    	main_com8_ls_en_pins_default: main-com8-ls-en-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00fc, PIN_OUTPUT, 7) /* (U7) PRG1_PRU0_GPO17.GPIO0_62 */
    		>;
    	};
    
    	main_wlan_pins_default: main-wlan-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00bc, PIN_INPUT, 7) /* (U8) GPIO0_46 */
    		>;
    	};
    
    	main_eqep0_pins_default: main-eqep0-pins-default {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x00a0, PIN_INPUT, 3) /* (N16) GPMC0_WPn.EQEP0_A */
    			AM64X_IOPAD(0x00a4, PIN_INPUT, 3) /* (N17) GPMC0_DIR.EQEP0_B */
    			AM64X_IOPAD(0x00ac, PIN_INPUT, 3) /* (R20) GPMC0_CSn1.EQEP0_I */
    			AM64X_IOPAD(0x00a8, PIN_INPUT, 3) /* (R19) GPMC0_CSn0.EQEP0_S */
    		>;
    	};
    
    	main_spi0_pins_default: myspi0ksz-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0210, PIN_INPUT, 0) /* (D13) SPI0_CLK */
    			AM64X_IOPAD(0x0214, PIN_INPUT, 0) /* (A13) SPI0_D0 */
    			AM64X_IOPAD(0x0218, PIN_INPUT, 0) /* (A14) SPI0_D1 */
    			AM64X_IOPAD(0x0208, PIN_INPUT, 0) /* (D12) SPI0_CS0 */
    		>;
    	};
    #if 1
    	kszpruicssg0miigrt1_pins_default: kszpruicssg0miigrt1-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x01f0, PIN_INPUT, 1) /* (AA4) PRG0_PRU1_GPO16.PR0_MII_MT1_CLK */
    			AM64X_IOPAD(0x01ec, PIN_OUTPUT, 0) /* (U5) PRG0_PRU1_GPO15.PR0_MII1_TXEN */
    			AM64X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (U6) PRG0_PRU1_GPO14.PR0_MII1_TXD3 */
    			AM64X_IOPAD(0x01e4, PIN_OUTPUT, 0) /* (T6) PRG0_PRU1_GPO13.PR0_MII1_TXD2 */
    			AM64X_IOPAD(0x01e0, PIN_OUTPUT, 0) /* (Y4) PRG0_PRU1_GPO12.PR0_MII1_TXD1 */
    			AM64X_IOPAD(0x01dc, PIN_OUTPUT, 0) /* (W4) PRG0_PRU1_GPO11.PR0_MII1_TXD0 */
    			AM64X_IOPAD(0x01c0, PIN_INPUT, 1) /* (W3) PRG0_PRU1_GPO4.PR0_MII1_RXDV */
    			AM64X_IOPAD(0x01c8, PIN_INPUT, 1) /* (R5) PRG0_PRU1_GPO6.PR0_MII_MR1_CLK */
    			AM64X_IOPAD(0x01bc, PIN_INPUT, 1) /* (T4) PRG0_PRU1_GPO3.PR0_MII1_RXD3 */
    			AM64X_IOPAD(0x01b8, PIN_INPUT, 1) /* (V3) PRG0_PRU1_GPO2.PR0_MII1_RXD2 */
    			AM64X_IOPAD(0x01c4, PIN_INPUT, 1) /* (P4) PRG0_PRU1_GPO5.PR0_MII1_RXER */
    			AM64X_IOPAD(0x01b4, PIN_INPUT, 1) /* (W2) PRG0_PRU1_GPO1.PR0_MII1_RXD1 */
    			AM64X_IOPAD(0x01b0, PIN_INPUT, 1) /* (Y2) PRG0_PRU1_GPO0.PR0_MII1_RXD0 */
    			AM64X_IOPAD(0x01d0, PIN_INPUT, 1) /* (R1) PRG0_PRU1_GPO8.PR0_MII1_RXLINK */
    			AM64X_IOPAD(0x01d4, PIN_INPUT, 1) /* (Y5) PRG0_PRU1_GPO9.PR0_MII1_COL */
    		>;
    	};
    #endif
    #if 0
    	mypruicssg0rgmii1_pins_default: mypruicssg0rgmii1-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x01b0, PIN_INPUT, 2) /* (Y2) PRG0_PRU1_GPO0.PRG0_RGMII2_RD0 */
    			AM64X_IOPAD(0x01b4, PIN_INPUT, 2) /* (W2) PRG0_PRU1_GPO1.PRG0_RGMII2_RD1 */
    			AM64X_IOPAD(0x01b8, PIN_INPUT, 2) /* (V3) PRG0_PRU1_GPO2.PRG0_RGMII2_RD2 */
    			AM64X_IOPAD(0x01bc, PIN_INPUT, 2) /* (T4) PRG0_PRU1_GPO3.PRG0_RGMII2_RD3 */
    			AM64X_IOPAD(0x01c8, PIN_INPUT, 2) /* (R5) PRG0_PRU1_GPO6.PRG0_RGMII2_RXC */
    			AM64X_IOPAD(0x01c0, PIN_INPUT, 2) /* (W3) PRG0_PRU1_GPO4.PRG0_RGMII2_RX_CTL */
    			AM64X_IOPAD(0x01dc, PIN_INPUT, 2) /* (W4) PRG0_PRU1_GPO11.PRG0_RGMII2_TD0 */
    			AM64X_IOPAD(0x01e0, PIN_INPUT, 2) /* (Y4) PRG0_PRU1_GPO12.PRG0_RGMII2_TD1 */
    			AM64X_IOPAD(0x01e4, PIN_INPUT, 2) /* (T6) PRG0_PRU1_GPO13.PRG0_RGMII2_TD2 */
    			AM64X_IOPAD(0x01e8, PIN_INPUT, 2) /* (U6) PRG0_PRU1_GPO14.PRG0_RGMII2_TD3 */
    			AM64X_IOPAD(0x01f0, PIN_INPUT, 2) /* (AA4) PRG0_PRU1_GPO16.PRG0_RGMII2_TXC */
    			AM64X_IOPAD(0x01ec, PIN_INPUT, 2) /* (U5) PRG0_PRU1_GPO15.PRG0_RGMII2_TX_CTL */
    		>;
    	};
    #endif
    	mygpio1_pins_default: mygpio1-default-pins {
    		pinctrl-single,pins = <
    //			AM64X_IOPAD(0x01d8, PIN_OUTPUT, 7) /* (V6) PRG0_PRU1_GPO10.GPIO1_30 */
    			AM64X_IOPAD(0x01cc, PIN_OUTPUT, 7) /* (W5) PRG0_PRU1_GPO7.GPIO1_27 */
    		>;
    	};
    #if 1
    	mypruicssg0mdio1_pins_default: mypruicssg0mdio1-default-pins {
    		pinctrl-single,pins = <
    			AM64X_IOPAD(0x0204, PIN_OUTPUT, 0) /* (P3) PRG0_MDIO0_MDC */
    			AM64X_IOPAD(0x0200, PIN_INPUT, 0) /* (P2) PRG0_MDIO0_MDIO */
    		>;
    	};
    #endif
    };
    
    &main_uart0 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_uart0_pins_default>;
    };
    
    &main_uart1 {
    	/* main_uart1 is reserved for firmware usage */
    	status = "reserved";
    };
    
    &main_i2c1 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_i2c1_pins_default>;
    	clock-frequency = <400000>;
    
    	exp1: gpio@70 {
    		compatible = "nxp,pca9538";
    		reg = <0x70>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
    				  "PRU_DETECT", "MMC1_SD_EN",
    				  "VPP_LDO_EN", "RPI_PS_3V3_En",
    				  "RPI_PS_5V0_En", "RPI_HAT_DETECT";
    	};
    
    	exp2: gpio@60 {
    		compatible = "ti,tpic2810";
    		reg = <0x60>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		gpio-line-names = "LED1","LED2","LED3","LED4","LED5","LED6","LED7","LED8";
    	};
    };
    
    /* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */
    &mcu_gpio0 {
    	status = "reserved";
    };
    
    &mcu_gpio_intr {
    	status = "reserved";
    };
    
    &sdhci0 {
    	status = "okay";
    	vmmc-supply = <&wlan_en>;
    	bus-width = <4>;
    	non-removable;
    	cap-power-off-card;
    	keep-power-in-suspend;
    	ti,driver-strength-ohm = <50>;
    
    	#address-cells = <1>;
    	#size-cells = <0>;
    	wlcore: wlcore@2 {
    		compatible = "ti,wl1837";
    		reg = <2>;
    		pinctrl-0 = <&main_wlan_pins_default>;
    		pinctrl-names = "default";
    		interrupt-parent = <&main_gpio0>;
    		interrupts = <46 IRQ_TYPE_EDGE_FALLING>;
    	};
    };
    
    &sdhci1 {
    	/* SD/MMC */
    	status = "okay";
    	vmmc-supply = <&vdd_mmc1>;
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_mmc1_pins_default>;
    	disable-wp;
    };
    
    &serdes_ln_ctrl {
    	idle-states = <AM64_SERDES0_LANE0_USB>;
    };
    
    &serdes0 {
    	serdes0_usb_link: phy@0 {
    		reg = <0>;
    		cdns,num-lanes = <1>;
    		#phy-cells = <0>;
    		cdns,phy-type = <PHY_TYPE_USB3>;
    		resets = <&serdes_wiz0 1>;
    	};
    };
    
    &usbss0 {
    	ti,vbus-divider;
    };
    
    &usb0 {
    	dr_mode = "host";
    	maximum-speed = "super-speed";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_usb0_pins_default>;
    	phys = <&serdes0_usb_link>;
    	phy-names = "cdns3,usb3-phy";
    };
    
    &cpsw3g {
    	pinctrl-names = "default";
    	pinctrl-0 = <&rgmii1_pins_default
    		     &rgmii2_pins_default>;
    
    	/* Map HW8_TS_PUSH to GENF1 */
    	cpts@3d000 {
    		ti,pps = <7 1>;
    	};
    };
    
    &cpsw_port1 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&cpsw3g_phy0>;
    };
    
    &cpsw_port2 {
    	phy-mode = "rgmii-rxid";
    	phy-handle = <&cpsw3g_phy1>;
    };
    
    &cpsw3g_mdio {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&mdio1_pins_default>;
    
    	cpsw3g_phy0: ethernet-phy@0 {
    		reg = <0>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    	};
    
    	cpsw3g_phy1: ethernet-phy@1 {
    		reg = <1>;
    		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    	};
    };
    
    &tscadc0 {
    	status = "disabled";
    };
    
    &ospi0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&ospi0_pins_default>;
    
    	flash@0 {
    		compatible = "jedec,spi-nor";
    		reg = <0x0>;
    		spi-tx-bus-width = <8>;
    		spi-rx-bus-width = <8>;
    		spi-max-frequency = <25000000>;
    		cdns,tshsl-ns = <60>;
    		cdns,tsd2d-ns = <60>;
    		cdns,tchsh-ns = <60>;
    		cdns,tslch-ns = <60>;
    		cdns,read-delay = <4>;
    
    		partitions {
    			compatible = "fixed-partitions";
    			#address-cells = <1>;
    			#size-cells = <1>;
    
    			partition@0 {
    				label = "ospi.tiboot3";
    				reg = <0x0 0x100000>;
    			};
    
    			partition@100000 {
    				label = "ospi.tispl";
    				reg = <0x100000 0x200000>;
    			};
    
    			partition@300000 {
    				label = "ospi.u-boot";
    				reg = <0x300000 0x400000>;
    			};
    
    			partition@700000 {
    				label = "ospi.env";
    				reg = <0x700000 0x40000>;
    			};
    
    			partition@740000 {
    				label = "ospi.env.backup";
    				reg = <0x740000 0x40000>;
    			};
    
    			partition@800000 {
    				label = "ospi.rootfs";
    				reg = <0x800000 0x37c0000>;
    			};
    
    			partition@3fc0000 {
    				label = "ospi.phypattern";
    				reg = <0x3fc0000 0x40000>;
    			};
    		};
    	};
    };
    
    &mailbox0_cluster2 {
    	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
    		ti,mbox-rx = <0 0 2>;
    		ti,mbox-tx = <1 0 2>;
    	};
    /*
    	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
    		ti,mbox-rx = <2 0 2>;
    		ti,mbox-tx = <3 0 2>;
    	};*/
    };
    
    &mailbox0_cluster3 {
    	status = "disabled";
    };
    /*
    &mailbox0_cluster4 {
    	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
    		ti,mbox-rx = <0 0 2>;
    		ti,mbox-tx = <1 0 2>;
    	};
    
    	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
    		ti,mbox-rx = <2 0 2>;
    		ti,mbox-tx = <3 0 2>;
    	};
    }; */
    
    &mailbox0_cluster5 {
    	status = "disabled";
    };
    /*
    &mailbox0_cluster6 {
    	mbox_m4_0: mbox-m4-0 {
    		ti,mbox-rx = <0 0 2>;
    		ti,mbox-tx = <1 0 2>;
    	};
    }; */
    
    &mailbox0_cluster7 {
    	status = "disabled";
    };
    
    /* set R5F subsystem 0 to single-CPU mode */
    &main_r5fss0 {
    	ti,cluster-mode = <2>;
    };
    
    &main_r5fss0_core0 {
    	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
    	memory-region = <&main_r5fss0_core0_dma_memory_region>,
    			<&main_r5fss0_core0_memory_region>;
    };
    /*
    &main_r5fss0_core1 {
    	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
    	memory-region = <&main_r5fss0_core1_dma_memory_region>,
    			<&main_r5fss0_core1_memory_region>;
    };
    
    &main_r5fss1_core0 {
    	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
    	memory-region = <&main_r5fss1_core0_dma_memory_region>,
    			<&main_r5fss1_core0_memory_region>;
    };
    
    &main_r5fss1_core1 {
    	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
    	memory-region = <&main_r5fss1_core1_dma_memory_region>,
    			<&main_r5fss1_core1_memory_region>;
    }; */
    
    /* disable R5F subsystem 1 */
    &main_r5fss1 {
    	status = "disabled";
    };
    
    &mcu_m4fss {
    /*	mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
    	memory-region = <&mcu_m4fss_dma_memory_region>,
    			<&mcu_m4fss_memory_region>; */
    	status = "disabled";
    };
    
    &ecap0 {
    	status = "okay";
    	/* PWM is available on Pin 1 of header J3 */
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_ecap0_pins_default>;
    };
    
    &eqep0 {
    	/* EQEP0_A is available on Pin 18 of header J4 */
    	/* EQEP0_B is available on Pin 22 of header J4 */
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_eqep0_pins_default>;
    };
    
    #define TS_OFFSET(pa, val)     (0x4+(pa)*4) (0x10000 | val)
    
    &timesync_router {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&cpsw_cpts_pps>;
    
    	/*
    	 * Use Time Sync Router to map GENF1 input to HW8_TS_PUSH output as well
    	 * as the PRU ICSSG0 SYNC1 output.
    	 */
    	cpsw_cpts_pps: cpsw-cpts-pps {
    		pinctrl-single,pins = <
    			/* pps [cpts genf1] in22 -> out37 [cpts hw8_push] */
    			TS_OFFSET(37, 22)
    			/* pps [cpts genf1] in22 -> out26 [SYNC1_OUT pin] */
    			TS_OFFSET(26, 22)
    			>;
    	};
    };
    /*
    &main_gpio1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mygpio1_pins_default>;
    }; */
    
    &main_spi0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&main_spi0_pins_default>;
    	status = "okay";
    
    	ksz9477S: ksz9477@0 {
    		compatible = "microchip,ksz9477";
    		reg = <0>;
    		spi-max-frequency = <1000000>;
    		spi-cpha;
    		spi-cpol;
    		reset-gpios = <&main_gpio1 27 GPIO_ACTIVE_LOW>;
    		status = "okay";
    
    		ports {
    				#address-cells = <1>;
    				#size-cells = <0>;
    				port@0 {
    						reg = <0>;
    						label = "lan1";
    						phy-mode = "internal";
    				};
    				port@1 {
    						reg = <1>;
    						label = "lan2";
    						phy-mode = "internal";
    				};
    				port@2 {
    						reg = <2>;
    						label = "lan3";
    						phy-mode = "internal";
    				};
    				port@3 {
    						reg = <3>;
    						label = "lan4";
    						phy-mode = "internal";
    				};
    				port@4 {
    						reg = <4>;
    						label = "lan5";
    						phy-mode = "internal";
    				};
    				port@5 {
    					    reg = <5>;
    						label = "cpu";
    						ethernet = <&icssg0_emac0>;
    						phy-mode = "mii";
    //						fixed-link {
    //								speed = <100>;
    //								full-duplex;
    //						};
    				};
    				/*port@6 {
    						reg = <6>;
    						label = "lan6";
    				};*/
    			};
    	};
    	
    };
    
    &icssg0_mdio {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mypruicssg0mdio1_pins_default>;
    	status = "okay";
    
    	icssg0_phy1: ethernet-phy@0 {
    		reg = <0x0>;
    		tx-internal-delay-ps = <250>;
    		rx-internal-delay-ps = <2000>;
    	};
    };

    Regards,

    Ankush

  • Hi Nick,

    Awaiting for ur response pls.

  • Nick,

    Can u pls suggest , as am stuck at this issue.

  • Hi,

    Any update on this pls.?