AM5748: AM5748

/**********************************************************************
 ************************* Standard Includes **************************
 **********************************************************************/
#include <xdc/std.h> /* initializes XDCtools */
#include <ti/sysbios/BIOS.h> /* initializes SYS/BIOS */
#include <ti/sysbios/knl/Task.h> /* initializes Task module */
#include <xdc/runtime/IHeap.h>
#include <xdc/runtime/System.h>
#include <xdc/runtime/Error.h>
#include <xdc/cfg/global.h>
#include <ti/board/board.h>
#include <string.h>

#include <ti/sysbios/utils/Load.h> /* To get  CPU load */
#include <ti/drv/uart/UART_stdio.h> /* UART Headers*/

/* CSL Chip Functional Layer */
#include <ti/csl/csl_chip.h>
#include <ti/csl/csl_cpswAux.h>
#include <ti/csl/soc.h>

/* EMAC Driver Header File. */
#include <ti/drv/emac/emac_drv.h>
#include <ti/drv/emac/src/v4/emac_drv_v4.h>

#include <ti/drv/emac/soc/emac_soc_v4.h>

#include <ti/sysbios/family/arm/arm9/Cache.h>

/**********************************************************************
 ************************* User Includes ******************************
 **********************************************************************/

int main()
{
    Task_Params taskParams;
    EMAC_DRV_ERR_E returnValue;
    Board_STATUS boardInitStatus = 0;
    Error_Block eb;
    Error_init(&eb);
    EMAC_HwAttrs_V4 emac_cfg;
    EMAC_OPEN_CONFIG_INFO_T open_cfg;
    EMAC_CHAN_MAC_ADDR_T chan_cfg[APP_EMAC_NUM_CHANS_PER_CORE];
    EMAC_CONFIG_INFO_T cfg_info;
    uint32_t port_num = 0;

    /* Board Initialization*/
    Board_initCfg cfg = BOARD_INIT_UART_STDIO | BOARD_INIT_PINMUX_CONFIG
            | BOARD_INIT_MODULE_CLOCK;
    boardInitStatus = Board_init(cfg);
    if (boardInitStatus != 0)
    {
        UART_printf("Board Initialization failure\n");
        return (0);
    }
    UART_printf("Board Initialization success\n");

    /* Interrupt Crossbar Configuration*/
    CSL_xbarMpuIrqConfigure(CSL_XBAR_INST_MPU_IRQ_92,
                            CSL_XBAR_GMAC_SW_IRQ_RX_PULSE);
    CSL_xbarMpuIrqConfigure(CSL_XBAR_INST_MPU_IRQ_93,
                            CSL_XBAR_GMAC_SW_IRQ_TX_PULSE);

    /* Select RGMII Mode for both the ports GMIIx_SEL = 2 (CTRL_CORE_CONTROL_IO_1)*/
    CSL_FINS(
            ((CSL_control_coreRegs *) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS)->CONTROL_IO_1,
            CONTROL_CORE_CONTROL_IO_1_GMII1_SEL, 0x02U);
    CSL_FINS(
            ((CSL_control_coreRegs *) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS)->CONTROL_IO_1,
            CONTROL_CORE_CONTROL_IO_1_GMII2_SEL, 0x02U);

    /*GMAC RESET ISOLATION Enable*/
    CSL_FINS(
            ((CSL_control_coreRegs *) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS)->CONTROL_IO_2,
            CONTROL_CORE_CONTROL_IO_2_GMAC_RESET_ISOLATION_ENABLE, 0U);
    CSL_FINS(
            ((CSL_control_coreRegs *) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS)->CONTROL_IO_2,
            CONTROL_CORE_CONTROL_IO_2_GMAC_RESET_ISOLATION_ENABLE, 1U);

    ethernetBufferInit();

    EMAC_socGetInitCfg(port_num, &emac_cfg);

    emac_cfg.port[0].phy_addr = EMAC_CPSW_PORT0_PHY_ADDR;
    emac_cfg.port[1].phy_addr = EMAC_CPSW_PORT1_PHY_ADDR;
    emac_cfg.numPorts = MAX_NUM_EMAC_PORTS;
    emac_cfg.macModeFlags =
            EMAC_CPSW_CONFIG_MODEFLG_GIGABIT | EMAC_CPSW_CONFIG_MODEFLG_FULLDUPLEX;

    EMAC_socSetInitCfg(port_num, &emac_cfg);

    open_cfg.hwAttrs = (void*) &emac_cfg;
    open_cfg.loop_back = 0;
    open_cfg.controller_core_flag = 1;
    open_cfg.max_pkt_size = APP_EMAC_INIT_PKT_SIZE;
    open_cfg.mdio_flag = 1;
    open_cfg.num_of_chans = 1;
    open_cfg.num_of_rx_pkt_desc = 256;
    open_cfg.num_of_tx_pkt_desc = 256;
    open_cfg.p_chan_mac_addr = &chan_cfg[0];
    open_cfg.alloc_pkt_cb = app_alloc_pkt;
    open_cfg.free_pkt_cb = app_free_pkt;


    if (port_num == 0)
    {
        open_cfg.phy_addr = 0x0;
        open_cfg.rx_pkt_cb = (EMAC_RX_PKT_CALLBACK_FN_T*) ethernet_callback1;
        chan_cfg[0].chan_num = 0;
        chan_cfg[0].num_of_mac_addrs = 1;
        chan_cfg[0].p_mac_addr = &macId[0];

    }

    if ((returnValue = emac_open(port_num, &open_cfg))
            == EMAC_DRV_RESULT_OPEN_PORT_ERR)
    {
        UART_printf("main: emac_open failure: %d\n", returnValue);
        return FAILURE;
    }
    else
    {
        UART_printf("main: emac_open success\n");
        cfg_info.rx_filter = EMAC_PKTFLT_ALL; //promisc mode
        cfg_info.mcast_cnt = 0;
        cfg_info.p_mcast_list = NULL;
        emac_config(port_num, &cfg_info);
    }

    emacInitStatus = 1;

    printEMACRegisters();

    Task_Params_init(&taskParams);
    taskParams.priority = 15;
    taskParams.instance->name = "EmacRxPkt";
    Task_create(app_test_task_poll_pkt, &taskParams, NULL);

    /* Start BIOS */
    BIOS_start();

    return 0;
}