PROCESSOR-SDK-AM335X: Control GPIOs NOT directly connected to PRUs using OCP when debugging PRU via CCS

Hello,

First off, are you trying to read and write to a GPIO pin through a GPIO module (this actually takes a bit of time since the signal has to travel through the processor, then to the GPIO module, and then the GPIO module is the thing actually reading or writing to the pin), or are you trying to follow the Hands-on Labs to program the PRU GPI / PRU GPO signals? These signals are directly connected to the PRU core, so reads and writes happen super quickly. For more information, please refer to this FAQ:

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1269989/faq-what-is-a-pru-core-why-are-pru-gpio-signals-different-from-regular-gpios

For an example of reading and writing to PRU GPI / PRU GPO signals, the hands-on labs are a great starting point. You might also want to try toggling every single GPO signal, just to make it easier to program since you don't have to worry about exactly which pin you are reading:
https://git.ti.com/cgit/pru-software-support-package/pru-software-support-package/tree/examples/am335x/PRU_gpioToggle/PRU_gpioToggle.c

Regards,

Nick

Hi Nick,

Thank you for the reply. Unfortunately, yes due to the hardware design I need to use the GPIO which is not mapped to the PRU muxes. I was able to easily control the PRU GPOs without issue per the example.

I have searched the forums and the SDK as well as the AM335x PRU-ICSS Reference Guide and AM335x Technical Reference manual, but have not yet figured out what is missing when I use CCS to load this.

Thanks again!

Hello,

Heads up, I will be on vacation all next week. I will be back on the forums the week of October 14.

1) Let's discuss your use case to make sure a GPIO module makes sense 

Usually I see PRU being used to either directly bitbang a protocol (for example, Ethernet over PRU, or this custom SPI implementation to sample multiple ADC instances: https://www.ti.com/tool/TIDA-01555 and https://git.ti.com/cgit/apps/tida01555 ), or I see PRU being used to control another peripheral on the chip (for example, the on-chip ADC here: https://git.ti.com/cgit/pru-software-support-package/pru-software-support-package/tree/examples/am335x/PRU_ADC_onChip).

If the PRU is being used to control another peripheral on the chip, then it does not matter so much that it takes a couple extra nanoseconds for the signals to travel through the processor's internal bus structure to reach the peripheral.

However, if you are trying to bitbang a communication protocol, you need to keep in mind that it WILL take longer than a couple of PRU clock cycles to access the GPIO module. Also, I am not certain that the access latency to the GPIO module is fixed - some busses inside the processor allow for multiple simultaneous accesses, but some only allow a single access at a time - if any of those single-access busses are in the signal path, some accesses to the GPIO could be faster or slower than others.

So it becomes difficult to precisely time output waveforms from the GPIO module, and precisely timestamp input waveforms relative to other inputs and other PRU code. I do not think we can support bitbanging protocols over the GPIO module because of that lack of precision.

Also keep in mind that if PRU is using that GPIO module, I would expect that Linux or whatever OS is running on the ARM core should NOT be using that GPIO module.

2) with the above caveats in mind, I am not aware of any TI examples of PRU using a GPIO module - we always write bitbanging code to use the PRU GPI/PRU GPO signals, since that is a huge part of what makes the PRU cores unique and useful. 

I will double-check with the team just in case there is an internal example somewhere that I am unaware of.

3) double-checking on Pinmuxing 

If you are not already using the pinmux tool to coordinate your pinmux settings, I highly suggest it:
dev.ti.com/sysconfig

like this:

Regards,

Nick

Hi Nick,

I understand the limitations and the valid concerns you have presented. Unfortunately as stated above, I am limited by the hardware design of the product already in the field. I am new to this product my company produces and have been tasked with adding extra processioning of the data to the existing PRU code which reads an external ADC chip over parallel port. The production code already uses these non PRU GPIOs like P8_8 to read data from the external ADC. The PRU code when started from Linux, functions correctly with sufficient timings for our project requirements. No issues there.

My goal was to follow the the examples in the SDK to set up CCS so I can debug my added changes to the PRU code in isolation using IDE and not worry about Linux for now. 

Maybe something in the GEL scripts loaded onto the Cortex-A8 is wrong or missing and maybe I need to modify the memory map file?

I will take a look at the pinmux tool and see if it produces a different result versus what I added to the PINMUX in the GEL script.

In the future we will be designing our own PCB potently around the am335x or similar and will definitely make sure to utilize the full potential of the PRUs by using the correct pins.

Thank you for help,

Ilya.

Hi Ilya,

the thread owner is out of office this week. Feel free to ping the thread during the week of 14-Oct if you do not get a response.

Regards, Andreas

Hi Nick,

Just wanted to follow up on this. The goal is to use Code Composer to start and debug this code instead of having to start it through Linux to have it function correctly. I feel it is something basic that needs to be added in the config or startup scripts.

Thank you for looking into this,

Hi,

Any recommendation or pointers to look into and try would be greatly appreciated.

Thank you! 

Hello Ilya,

Apologies for the delayed response, and thank you for the pings.

If you have already validated that longer and non-deterministic read & write times are ok for your usecase, then at least from a conceptual standpoint I would expect you to be ok.

You can still use CCS to debug the PRU cores during a Linux boot

If your Linux boot is already initializing things as expected, then it might be easiest to just use Linux to initialize the system. You can still use CCS to connect to PRU firmware that is already running and initialized by Linux.

The PRU Getting Started Labs may have some helpful ideas for you in the debug process:
https://software-dl.ti.com/processor-sdk-linux/esd/AM335X/09_01_00_001/exports/docs/common/PRU-ICSS/PRU-Getting-Started-Labs_Lab5.html

One thing that I do NOT comment on in those labs is how you can connect CCS to the running AM335x, and then do Load > Load Symbols in order to attach CCS to the currently running PRU code. You can either just start looking at the code wherever it happens to be when you connect the debugger, or you can do something like adding an infinite loop to make sure that the PRU firmware is in a known location when you connect the debugger.

You can find an example of what that looks like on a different processor here:
https://dev.ti.com/tirex/explore/node?a=7qm9DIS__LATEST&node=A__AZVLTFgnCWyMV5cDwLf4gg__AM64-ACADEMY__WI1KRXP__LATEST

There is a lot of stuff on that page that does not apply to AM335x. Just ignore the second half of that page which is specific to AM64x.

But... I should be able to use GEL files to initialize too, right? 

I think so. But I do not personally have experience with doing anything with GEL files other than setting up pinmuxing (i.e., what you find here: https://software-dl.ti.com/processor-sdk-linux/esd/AM335X/09_01_00_001/exports/docs/common/PRU-ICSS/PRU-Hands-on-Labs.html). If Linux is the one turning on the clocks and initializing the GPIO module, then you will need to do that in your GEL file as well.

It has been years since most of my team members used GEL files for more than just basic initialization. I can ask around if you want, but I am not sure how much additional information is out there.

Regards,

Nick

Hi Nick,

Thank you for the reply. I will try loading Linux to configure the PRUs instead of the provided GEL scripts and report back to close out this thread as well as to document the solution for others. It is unfortunate that the GEL scripts are apparently not sufficient to use CCS as a true IDE solution to develop and debug PRU's in isolation.

Do please ask your team members about this. If they determine that the solution is a few changes in the GEL script, I think that would be the right solution for everyone following the SDK guides who expect the PRU's to fully function using the same methods.

Ilya,

Ok I have kicked your question about GEL files out to the broader team - if I get any helpful pointers I will pass them along.

In the meantime,

1) Which version of Linux are you planning to run on the AM335x?

2) Are you planning to use RPMsg to communicate with Linux?

Regards,

Nick

Hi Nick,

Regarding #1: Currently the beaglebone black is booting the linux image found in tisdk-default-image-am335x-evm.tar.xz from the PROCESSOR-SDK-LINUX-RT-AM335X version 09_01_00_001. The linux version in this image is 6.1.46.

Regarding #2: I plan to use RPMsg in the future. Is RPMsg necessary to get the basic GPIO example working above?

Please let me know if you see anything apparent? Once debugging works, I will update the device tree to set the GPIO settings.

Thank you,  

Hello Ilya,

Gel files

On GEL files, it looks like they are in the CCS installation under ti/ccs<version>/ccs/ccs_base/emulation/gel. However, it does not look like we have detailed GEL files for AM335x relative to newer devices. I checked CCS 1020 and 1260, I have not checked older versions of CCS to see if they have different AM335x GEL files.

RPMsg is NOT required if your application does not want to use RPMsg to communicate between Linux and PRU 

For more details on which resource table you should use for your project, please refer to this here:
https://software-dl.ti.com/processor-sdk-linux/esd/AM335X/09_01_00_001/exports/docs/common/PRU-ICSS/Resource_Tables.html

Connecting CCS to the PRU core after Linux initializes the PRU? 

I have an AM57x customer who is also doing some debug work with RPMsg (FYI, PRU RPMsg does not work out-of-the-box on AM335x SDK 9.1, you need to make some small tweaks. It will work out-of-the-box in the upcoming AM335x Linux SDK 9.3. Ask if you need further details). I have asked him to confirm if he needed to follow any additional steps to get CCS connected:
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1432897/am5728-pru_rpmsg_echo_interrupt1_0-unable-to-get-vring-interrupt-status--6/5501517#5501517

Search function broken 

yeah, that is a known bug with SDK 9.1 release documentation :/ 

We fixed it for later versions of the SDK, so the search will work again in the upcoming SDK 9.3 release (and it should actually work a bit better than before)

Any other debugging ideas? 

Here's another way to debug the PRU core from Linux by reading and writing to known memory locations:
https://software-dl.ti.com/processor-sdk-linux/esd/AM335X/09_01_00_001/exports/docs/common/PRU-ICSS/PRU-Getting-Started-Labs_Lab5.html#debugging-the-pru-from-linux-core

Regards,

Nick

Hi Nick,

Hello,

Pinmux settings

Please attach your devicetree updates so that I can double-check your pinmuxing settings. It is possible that the settings are either wrong, or not actually getting applied (the pinmux settings have to be associated with a devicetree node that gets probed, otherwise they are not actually set).

Based on your terminal output, it looks like the PRU firmware is loading as expected. I would expect that everything other than PRU RPMsg should work fine on SDK 9.1 - we just finished testing PRU functionality on AM335x SDK 9.3, and it works as expected when we applied the patches needed to finish enabling RPMsg functionality.

Gel files 

Nobody on my team has any expertise at this point on GEL files for AM335x. What I told you is what I learned - you can find TI-provided GEL files at the file location I discussed in the previous response, but I did not see any pre-written GEL files that do the GPIO initialization you were looking for.

What to put in each boot partition? 

The SD card is divided into 2 partitions: The boot partition, and the root filesystem.

The boot partition includes files and information used by uboot.

The root filesystem includes things that get loaded for Linux boot, including the Linux devicetree file (under [root_filesystem]/boot), and the PRU examples (typically under [root_filesystem]/lib/firmware).

Regards,

Nick

Hi Nick,

I do not see how to attach files here so below is a google drive folder. It includes the generated am335x-boneblack.dtb, the copied am335x-boneblack-prucape.dtsi, and the updated am335x-boneblack.dts with the added line: #include "am335x-boneblack-prucape.dtsi."

https://drive.google.com/drive/folders/1zahtjB13PwpsA9trXip_Xpclt6DXr32w?usp=sharing

The serial output on boot is below. I completely erased the 4GB EMMC, and booted from the generated SD card with the updated am335x-boneblack.dtb in /rootfs/boot/dtb/  

U-Boot SPL 2023.04-gd74d0993e2 (Oct 18 2023 - 17:49:46 +0000)
Trying to boot from MMC1


U-Boot 2023.04-gd74d0993e2 (Oct 18 2023 - 17:49:46 +0000)

CPU  : AM335X-GP rev 2.1
Model: TI AM335x BeagleBone Black
DRAM:  512 MiB
Core:  160 devices, 18 uclasses, devicetree: separate
WDT:   Started wdt@44e35000 with servicing every 1000ms (60s timeout)
NAND:  0 MiB
MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
Loading Environment from FAT... Unable to read "uboot.env" from mmc0:1... 
<ethaddr> not set. Validating first E-fuse MAC
Net:   eth2: ethernet@4a100000, eth3: usb_ether
Hit any key to stop autoboot:  0 
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
Found /extlinux/extlinux.conf
Retrieving file: /extlinux/extlinux.conf
1:      Arago
Retrieving file: /extlinux/../zImage
append: root=PARTUUID=879aa4c2-02 rootwait rw earlycon console=ttyO0,115200n8,115200
Retrieving file: /extlinux/../am335x-boneblack.dtb
Kernel image @ 0x82000000 [ 0x000000 - 0x737200 ]
## Flattened Device Tree blob at 88000000
   Booting using the fdt blob at 0x88000000
Working FDT set to 88000000
   Loading Device Tree to 8ffe5000, end 8ffffed3 ... OK
Working FDT set to 8ffe5000

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 6.1.46-rt13-gccf548983b (oe-user@oe-host) (arm-oe-linux-gnueabi-gcc (GCC) 11.4.0, GNU ld (GNU Binutils) 2.38.20220708) #1 PREEMPT_RT Thu Oct 19 10:23:11 UTC 2023
[    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[    0.000000] OF: fdt: Machine model: TI AM335x BeagleBone Black
[    0.000000] earlycon: omap8250 at MMIO 0x44e09000 (options '')
[    0.000000] printk: bootconsole [omap8250] enabled
[    0.000000] Memory policy: Data cache writeback
[    0.000000] efi: UEFI not found.
[    0.000000] cma: Reserved 64 MiB at 0x9b800000
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000080000000-0x000000009fdfffff]
[    0.000000]   HighMem  empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000080000000-0x000000009fdfffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x000000009fdfffff]
[    0.000000] CPU: All CPU(s) started in SVC mode.
[    0.000000] AM335X ES2.1 (sgx neon)
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 129540
[    0.000000] Kernel command line: root=PARTUUID=879aa4c2-02 rootwait rw earlycon console=ttyO0,115200n8,115200
[    0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 433552K/522240K available (11264K kernel code, 1469K rwdata, 3224K rodata, 1024K init, 297K bss, 23152K reserved, 65536K cma-reserved, 0K highmem)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] trace event string verifier disabled
[    0.000000] rcu: Preemptible hierarchical RCU implementation.
[    0.000000] rcu:     RCU event tracing is enabled.
[    0.000000] rcu:     RCU priority boosting: priority 1 delay 500 ms.
[    0.000000] rcu:     RCU_SOFTIRQ processing moved to rcuc kthreads.
[    0.000000]  No expedited grace period (rcu_normal_after_boot).
[    0.000000]  Trampoline variant of Tasks RCU enabled.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[    0.000000] IRQ: Found an INTC at 0x(ptrval) (revision 5.0) with 128 interrupts
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000000] TI gptimer clocksource: always-on /ocp/interconnect@44c00000/segment@200000/target-module@31000
[    0.000002] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
[    0.000024] clocksource: dmtimer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
[    0.000453] TI gptimer clockevent: 24000000 Hz at /ocp/interconnect@48000000/segment@0/target-module@40000
[    0.002202] Console: colour dummy device 80x30
[    0.231917] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0'
[    0.231924] This ensures that you still see kernel messages. Please
[    0.231927] update your kernel commandline.
[    0.231959] Calibrating delay loop... 996.14 BogoMIPS (lpj=4980736)
[    0.270543] CPU: Testing write buffer coherency: ok
[    0.270609] CPU0: Spectre v2: using BPIALL workaround
[    0.270617] pid_max: default: 32768 minimum: 301
[    0.270782] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.270798] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.272513] cblist_init_generic: Setting adjustable number of callback queues.
[    0.334204] cblist_init_generic: Setting shift to 0 and lim to 1.
[    0.340644] Setting up static identity map for 0x80100000 - 0x80100060
[    0.347734] rcu: Hierarchical SRCU implementation.
[    0.347741] rcu:     Max phase no-delay instances is 1000.
[    0.347835] printk: bootconsole [omap8250] printing thread started
[    0.362489] EFI services will not be available.
[    0.363124] devtmpfs: initialized
[    0.394296] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
[    0.394527] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.394555] futex hash table entries: 256 (order: 0, 6144 bytes, linear)
[    0.399543] pinctrl core: initialized pinctrl subsystem
[    0.400500] DMI not present or invalid.
[    0.411246] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[    0.413444] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.414762] thermal_sys: Registered thermal governor 'step_wise'
[    0.439870] No ATAGs?
[    0.439889] hw-breakpoint: debug architecture 0x4 unsupported.
[    0.452000] Serial: AMBA PL011 UART driver
[    0.495064] SCSI subsystem initialized
[    0.510989] usbcore: registered new interface driver usbfs
[    0.511052] usbcore: registered new interface driver hub
[    0.511104] usbcore: registered new device driver usb
[    0.511602] pps_core: LinuxPPS API ver. 1 registered
[    0.511610] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.511633] PTP clock support registered
[    0.511788] EDAC MC: Ver: 3.0.0
[    0.514348] clocksource: Switched to clocksource dmtimer
[    0.537959] NET: Registered PF_INET protocol family
[    0.538275] IP idents hash table entries: 8192 (order: 4, 65536 bytes, linear)
[    0.545046] tcp_listen_portaddr_hash hash table entries: 256 (order: 0, 4096 bytes, linear)
[    0.545081] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    0.545097] TCP established hash table entries: 4096 (order: 2, 16384 bytes, linear)
[    0.545140] TCP bind hash table entries: 4096 (order: 5, 131072 bytes, linear)
[    0.545280] TCP: Hash tables configured (established 4096 bind 4096)
[    0.545394] UDP hash table entries: 256 (order: 1, 12288 bytes, linear)
[    0.545430] UDP-Lite hash table entries: 256 (order: 1, 12288 bytes, linear)
[    0.545607] NET: Registered PF_UNIX/PF_LOCAL protocol family
[    0.546227] RPC: Registered named UNIX socket transport module.
[    0.546237] RPC: Registered udp transport module.
[    0.546240] RPC: Registered tcp transport module.
[    0.546244] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.546257] PCI: CLS 0 bytes, default 64
[    0.547625] Initialise system trusted keyrings
[    0.547924] workingset: timestamp_bits=30 max_order=17 bucket_order=0
[    0.575402] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.576328] NFS: Registering the id_resolver key type
[    0.576386] Key type id_resolver registered
[    0.576392] Key type id_legacy registered
[    0.576513] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[    0.576522] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
[    0.576564] ntfs: driver 2.1.32 [Flags: R/O].
[    0.577190] Key type asymmetric registered
[    0.577201] Asymmetric key parser 'x509' registered
[    0.577396] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247)
[    0.577408] io scheduler mq-deadline registered
[    0.577414] io scheduler kyber registered
[    0.727309] Serial: 8250/16550 driver, 5 ports, IRQ sharing enabled
[    0.729628] STMicroelectronics ASC driver initialized
[    0.764976] brd: module loaded
[    0.788822] loop: module loaded
[    0.814736] CAN device driver interface
[    0.815119] e1000e: Intel(R) PRO/1000 Network Driver
[    0.815124] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
[    0.815219] igb: Intel(R) Gigabit Ethernet Network Driver
[    0.815226] igb: Copyright (c) 2007-2014 Intel Corporation.
[    0.816085] pegasus: Pegasus/Pegasus II USB Ethernet driver
[    0.816141] usbcore: registered new interface driver pegasus
[    0.816201] usbcore: registered new interface driver asix
[    0.816241] usbcore: registered new interface driver ax88179_178a
[    0.816278] usbcore: registered new interface driver cdc_ether
[    0.816331] usbcore: registered new interface driver smsc75xx
[    0.816381] usbcore: registered new interface driver smsc95xx
[    0.816419] usbcore: registered new interface driver net1080
[    0.816455] usbcore: registered new interface driver cdc_subset
[    0.816504] usbcore: registered new interface driver zaurus
[    1.474462] printk: console [ttyS0] enabled
[    1.474476] printk: bootconsole [omap8250] disabled
[    1.474513] printk: console [ttyS0] printing thread started
[    1.484410] printk: bootconsole [omap8250] printing thread stopped
[    1.554542] tps65217-pmic: Failed to locate of_node [id: -1]
[    1.561163] tps65217-bl: Failed to locate of_node [id: -1]
[    1.575740] tps65217 0-0024: TPS65217 ID 0xe version 1.2
[    1.584611] at24 0-0050: 32768 byte 24c256 EEPROM, writable, 1 bytes/write
[    1.585339] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
[    1.587260] omap_gpio 44e07000.gpio: Could not set line 6 debounce to 200000 microseconds (-22)
[    1.587284] sdhci-omap 48060000.mmc: Got CD GPIO
[    1.587479] sdhci-omap 48060000.mmc: supply pbias not found, using dummy regulator
[    1.594586] sdhci-omap 48060000.mmc: supply vqmmc not found, using dummy regulator
[    1.598590] sdhci-omap 481d8000.mmc: supply pbias not found, using dummy regulator
[    1.599013] sdhci-omap 481d8000.mmc: supply vqmmc not found, using dummy regulator
[    1.641396] mmc1: SDHCI controller on 481d8000.mmc [481d8000.mmc] using External DMA
[    1.643990] mmc0: SDHCI controller on 48060000.mmc [48060000.mmc] using External DMA
[    1.687375] mmc1: new high speed MMC card at address 0001
[    1.696842] mmcblk1: mmc1:0001 MK2704 3.53 GiB 
[    1.699921] mmcblk1boot0: mmc1:0001 MK2704 2.00 MiB 
[    1.701807] mmcblk1boot1: mmc1:0001 MK2704 2.00 MiB 
[    1.706586] mmc0: new high speed SDHC card at address aaaa
[    1.707714] mmcblk1rpmb: mmc1:0001 MK2704 512 KiB, chardev (243:0)
[    1.708271] mmcblk0: mmc0:aaaa SK32G 29.7 GiB 
[    1.710669]  mmcblk0: p1 p2
[    2.454047] EXT4-fs (mmcblk0p2): mounting ext3 file system using the ext4 subsystem
[    3.522908] EXT4-fs (mmcblk0p2): recovery complete
[    3.529417] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Quota mode: disabled.
[    3.529526] VFS: Mounted root (ext3 filesystem) on device 179:50.
[    3.538458] devtmpfs: mounted
[    3.539955] Freeing unused kernel image (initmem) memory: 1024K
[    3.540526] Run /sbin/init as init process
[    3.939804] systemd[1]: System time before build time, advancing clock.
[    3.973101] systemd[1]: systemd 250.5+ running in system mode (+PAM -AUDIT -SELINUX -APPARMOR +IMA -SMACK +SECCOMP -GCRYPT -GNUTLS -OPENSSL +ACL +BLKID -CURL -ELFUTILS -FIDO2 -IDN2 -IDN -IPTC +KMOD -LIBCRYPTSETUP +LIBFDISK -PCRE2 -PWQUALITY -P11KIT -QRENCODE -BZIP2 -LZ4 -XZ -ZLIB +ZSTD -BPF_FRAMEWORK +XKBCOMMON +UTMP +SYSVINIT default-hierarchy=hybrid)

[    3.973833] systemd[1]: Detected architecture arm.
Welcome to Arago 2023.04!

[    4.036183] systemd[1]: Hostname set to <am335x-evm>.
[    4.382365] systemd-sysv-generator[102]: SysV service '/etc/init.d/sysrepo' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    4.383242] systemd-sysv-generator[102]: SysV service '/etc/init.d/thermal-zone-init' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    4.383645] systemd-sysv-generator[102]: SysV service '/etc/init.d/netopeer2-server' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    4.883356] systemd[1]: /lib/systemd/system/bt-enable.service:9: Standard output type syslog is obsolete, automatically updating to journal. Please update your unit file, and consider removing the setting altogether.
[    4.992361] systemd[1]: /etc/systemd/system/sync-clocks.service:11: Standard output type syslog is obsolete, automatically updating to journal. Please update your unit file, and consider removing the setting altogether.
[    5.138399] systemd[1]: Queued start job for default target Graphical Interface.
[    5.144118] systemd[1]: Created slice Slice /system/getty.
[  OK  ] Created slice Slice /system/getty.
[  OK  ] Created slice Slice /system/modprobe.
[    5.186922] systemd[1]: Created slice Slice /system/modprobe.
[  OK  ] Created slice Slice /system/serial-getty.
[    5.216668] systemd[1]: Created slice Slice /system/serial-getty.
[  OK  ] Created slice User and Session Slice.
[    5.245673] systemd[1]: Created slice User and Session Slice.
[  OK  ] Started Dispatch Password …ts to Console Directory Watch.
[    5.275209] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
[  OK  ] Started Forward Password R…uests to Wall Directory Watch.
[    5.305140] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
[  OK  ] Reached target Path Units.
[    5.335422] systemd[1]: Reached target Path Units.
[  OK  ] Reached target Remote File Systems.
[    5.364773] systemd[1]: Reached target Remote File Systems.
[  OK  ] Reached target Slice Units.
[    5.394762] systemd[1]: Reached target Slice Units.
[  OK  ] Reached target Swaps.
[    5.424872] systemd[1]: Reached target Swaps.
[  OK  ] Listening on RPCbind Server Activation Socket.
[    5.465982] systemd[1]: Listening on RPCbind Server Activation Socket.
[  OK  ] Reached target RPC Port Mapper.
[    5.494829] systemd[1]: Reached target RPC Port Mapper.
[  OK  ] Listening on Process Core Dump Sock[    5.540182] systemd[1]: Listening on Process Core Dump Socket.
et.
[  OK  ] Listening on initctl Compatibility Named Pipe.
[    5.575371] systemd[1]: Listening on initctl Compatibility Named Pipe.
[  OK  ] Listening on Journal Socket (/dev/log).
[    5.655411] systemd[1]: Journal Audit Socket was skipped because of a failed condition check (ConditionSecurity=audit).
[    5.656890] systemd[1]: Listening on Journal Socket (/dev/log).
[  OK  ] Listening on Journal Socket.
[    5.685929] systemd[1]: Listening on Journal Socket.
[  OK  ] Listening on Network Service Netlink Socket.
[    5.716098] systemd[1]: Listening on Network Service Netlink Socket.
[  OK  ] Listening on udev Control Socket.
[    5.746037] systemd[1]: Listening on udev Control Socket.
[  OK  ] Listening on udev Kernel Socket.
[    5.775625] systemd[1]: Listening on udev Kernel Socket.
[  OK  ] Listening on User Database Manager Socket.
[    5.805753] systemd[1]: Listening on User Database Manager Socket.
[    5.835524] systemd[1]: Huge Pages File System was skipped because of a failed condition check (ConditionPathExists=/sys/kernel/mm/hugepages).
[    5.836240] systemd[1]: POSIX Message Queue File System was skipped because of a failed condition check (ConditionPathExists=/proc/sys/fs/mqueue).
         Mounting Kernel Debug File System...[    5.865394] systemd[1]: Mounting Kernel Debug File System...

         Mounting Kernel Trace File System...[    5.909045] systemd[1]: Mounting Kernel Trace File System...

         Mounting Temporary Directory /tmp...
[    5.985201] systemd[1]: Mounting Temporary Directory /tmp...
         Starting Create List of Static Device Nodes    6.021998] systemd[1]: Starting Create List of Static Device Nodes...
m...
         Starting Load Kernel Module configfs...
[    6.095720] systemd[1]: Starting Load Kernel Module configfs...
         Starting Load Kernel Module drm...[    6.130591] systemd[1]: Starting Load Kernel Module drm...

         Starting Load Kernel Module fuse...
[    6.157478] systemd[1]: Starting Load Kernel Module fuse...
         Starting Start psplash boot splash screen...
[    6.215777] systemd[1]: Starting Start psplash boot splash screen...
         Starting RPC Bind...
[    6.255654] systemd[1]: Starting RPC Bind...
[    6.285344] systemd[1]: File System Check on Root Device was skipped because of a failed condition check (ConditionPathIsReadWrite=!/).
[    6.287406] systemd[1]: systemd-journald.service: unit configures an IP firewall, but the local system does not support BPF/cgroup firewalling.
         Starting Journal Service...[    6.287440] systemd[1]: (This warning is only shown for the first unit using IP firewalling.)

[    6.325739] systemd[1]: Starting Journal Service...
         Starting Load Kernel Modules...
[    6.416257] systemd[1]: Starting Load Kernel Modules...
         Starting Generate network …ts from Kernel co[    6.459586] systemd[1]: Starting Generate network units from Kernel command line...
mmand line...
[    6.528301] cryptodev: loading out-of-tree module taints kernel.
         Starting Remount Root and Kernel File Systems systemd[1]: Starting Remount Root and Kernel File Systems...
[0m...
[    6.550461] cryptodev: driver 1.12 loaded.
         Starting Coldplug All udev Devices...[    6.628099] systemd[1]: Starting Coldplug All udev Devices...

[  OK  ] Started RPC Bind.[    6.753301] systemd[1]: Started RPC Bind.

[    6.796026] EXT4-fs (mmcblk0p2): re-mounted. Quota mode: disabled.
[  OK  ] Mounted Kernel Debug File System    6.818740] systemd[1]: Mounted Kernel Debug File System.
m.
[  OK  ] Mounted Kernel Trace File System.
[    6.865917] systemd[1]: Mounted Kernel Trace File System.
[  OK  ] Mounted Temporary Directory /tmp.
[    6.896114] systemd[1]: Mounted Temporary Directory /tmp.
[  OK  ] Finished Create List of Static Device Nodes.
[    6.926714] systemd[1]: Finished Create List of Static Device Nodes.
[    6.957496] systemd[1]: modprobe@configfs.service: Deactivated successfully.
[  OK  ] Finished Load Kernel Module configfs.
[    6.974756] systemd[1]: Finished Load Kernel Module configfs.
[    7.007158] systemd[1]: modprobe@drm.service: Deactivated successfully.
[  OK  ] Finished Load Kernel Module drm[    7.021645] systemd[1]: Finished Load Kernel Module drm.
.
[  OK  ] Started Journal Service.[    7.055889] systemd[1]: Started Journal Service.

[  OK  ] Finished Load Kernel Module fuse.
[FAILED] Failed to start Start psplash boot splash screen.
See 'systemctl status psplash-start.service' for details.
[DEPEND] Dependency failed for Star…progress communication helper.
[  OK  ] Finished Load Kernel Modules.
[  OK  ] Finished Generate network units from Kernel command line.
[  OK  ] Finished Remount Root and Kernel File Systems.
         Mounting Kernel Configuration File System...
         Starting Flush Journal to Persistent Storage...
[    7.535353] systemd-journald[113]: Received client request to flush runtime journal.
         Starting Apply Kernel Variables...
         Starting Create Static Device Nodes in /dev...
[  OK  ] Mounted Kernel Configuration File System.
[  OK  ] Finished Flush Journal to Persistent Storage.
[  OK  ] Finished Apply Kernel Variables.
[  OK  ] Finished Create Static Device Nodes in /dev.
[  OK  ] Reached target Preparation for Local File Systems.
         Mounting /media/ram...
         Mounting /var/volatile...
         Starting Rule-based Manage…for Device Events and Files...
[  OK  ] Mounted /media/ram.
[  OK  ] Mounted /var/volatile.
         Starting Load/Save Random Seed...
[  OK  ] Reached target Local File Systems.
         Starting Create Volatile Files and Directories...
[  OK  ] Finished Load/Save Random Seed.
[  OK  ] Finished Create Volatile Files and Directories.
         Starting Network Time Synchronization...
         Starting Record System Boot/Shutdown in UTMP...
[  OK  ] Finished Record System Boot/Shutdown in UTMP.
[  OK  ] Started Rule-based Manager for Device Events and Files.
[   10.396131] systemd-journald[113]: Oldest entry in /run/log/journal/b5e12c2bcb4245fb9932f6057a755fa8/system.journal is older than the configured file retention duration (1month), suggesting rotation.
[  OK  ] Finished Coldplug All udev Devices systemd-journald[113]: /run/log/journal/b5e12c2bcb4245fb9932f6057a755fa8/system.journal: Journal header limits reached or header out-of-date, rotating.
[0m.
[  OK  ] Started Network Time Synchronization.
[  OK  ] Reached target System Initialization.
[  OK  ] Started Daily Cleanup of Temporary Directories.
[  OK  ] Reached target System Time Set.
[  OK  ] Started Daily rotation of log files.
[  OK  ] Reached target Timer Units.
[  OK  ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket.
[  OK  ] Listening on D-Bus System Message Bus Socket.
         Starting Docker Socket for the API...
[  OK  ] Listening on dropbear.socket.
[  OK  ] Listening on PC/SC Smart Card Daemon Activation Socket.
         Starting Weston socket...
         Starting D-Bus System Message Bus...
         Starting Reboot and dump vmcore via kexec...
[  OK  ] Listening on Docker Socket for the API.
[  OK  ] Listening on Weston socket.
[   11.457105] tda998x 0-0070: found TDA19988
[   11.605036] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec
[   11.650869] am335x-phy-driver 47401300.usb-phy: supply vcc not found, using dummy regulator
[  OK  ] Found device /dev/ttyS0.[   11.651200] am335x-phy-driver 47401300.usb-phy: dummy supplies not allowed for exclusive requests

[   11.652292] am335x-phy-driver 47401b00.usb-phy: supply vcc not found, using dummy regulator
[  OK  ] Finished Reboot and dump vmcore via kexec.
[   11.652612] am335x-phy-driver 47401b00.usb-phy: dummy supplies not allowed for exclusive requests
[  OK  ] Reached target Socket Units.[   11.772516] omap_rtc 44e3e000.rtc: registered as rtc0

[   11.772580] omap_rtc 44e3e000.rtc: setting system clock to 2000-01-01T00:00:00 UTC (946684800)
[   11.786636] systemd-journald[113]: Time jumped backwards, rotating.
[   11.844661] musb-hdrc musb-hdrc.1: MUSB HDRC host driver
[   11.844746] musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 1
[   11.845861] hub 1-0:1.0: USB hub found
[   11.845919] hub 1-0:1.0: 1 port detected
[  OK  ] Started D-Bus System Message Bus.
[   12.976171] tilcdc 4830e000.lcdc: bound 0-0070 (ops tda998x_audio_codec_init [tda998x])
[   13.019793] [drm] Initialized tilcdc 1.0.0 20121205 for 4830e000.lcdc on minor 0
[  OK  ] Reached target Basic System.[   13.020097] tilcdc 4830e000.lcdc: [drm] Cannot find any crtc or sizes

[   13.216446] tilcdc 4830e000.lcdc: [drm] Cannot find any crtc or sizes
[  OK  ] Started Job spooling tools.
[  OK  ] Started Periodic Command Scheduler.
         Starting Print notice about GPLv3 packages...
         Starting IPv6 Packet Filtering Framework...
         Starting IPv4 Packet Filtering Framework...
         Starting Lighttpd Daemon...
[   13.996130] [drm] Initialized pvr 1.17.4948957 20110701 for 56000000.gpu on minor 1
[  OK  ] Started strongSwan IPsec I…IKEv2 daemon using ipsec.conf.
         Starting User Login Management...
         Starting Telnet Server...
[FAILED] Failed to start Print notice about GPLv3 packages.
See 'systemctl status gplv3-notice.service' for details.
[  OK  ] Finished IPv6 Packet Filtering Framework.
[  OK  ] Finished IPv4 Packet Filtering Framework.
[  OK  ] Started Lighttpd Daemon.
[  OK  ] Finished Telnet Server.
[  OK  ] Reached target Preparation for Network.
         Starting Network Configuration...
[  OK  ] Started User Login Management.
[  OK  ] Listening on Load/Save RF …itch Status /dev/rfkill Watch.
[   21.007458] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[   21.521354] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
[  OK  ] Started Network Configuration.
[   22.264773] cpsw-switch 4a100000.switch: starting ndev. mode: dual_mac
[   22.406224] SMSC LAN8710/LAN8720 4a101000.mdio:00: attached PHY driver (mii_bus:phy_addr=4a101000.mdio:00, irq=POLL)
[   23.387365] remoteproc remoteproc0: 4a334000.pru is available
[   23.428186] remoteproc remoteproc1: 4a338000.pru is available
[   23.640328] PVR_K: UM DDK-(4948957) and KM DDK-(4948957) match. [ OK ]
[   24.485296] cpsw-switch 4a100000.switch eth0: Link is Up - 100Mbps/Full - flow control off
[   24.485368] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[  OK  ] Created slice Slice /system/systemd-fsck.
[  OK  ] Reached target Hardware activated USB gadget.
         Starting Save/Restore Sound Card State...
         Starting File System Check on /dev/mmcblk0p1...
         Starting File System Check on /dev/mmcblk1...
         Starting Hostname Service...
         Starting Network Name Resolution...
[  OK  ] Finished Save/Restore Sound Card State.
[  OK  ] Reached target Sound Card.
[  OK  ] Finished File System Check on /dev/mmcblk0p1.
         Mounting /run/media/boot-mmcblk0p1...
[  OK  ] Finished File System Check on /dev/mmcblk1.
         Mounting /run/media/mmcblk1...
[   27.557184] EXT4-fs (mmcblk1): mounting ext3 file system using the ext4 subsystem
[  OK  ] Mounted /run/media/boot-mmcblk0p1.
[   27.595648] EXT4-fs (mmcblk1): mounted filesystem with ordered data mode. Quota mode: disabled.
[  OK  ] Mounted /run/media/mmcblk1.
[  OK  ] Started Hostname Service.
[  OK  ] Started Network Name Resolution.
[  OK  ] Reached target Network.
[  OK  ] Reached target Host and Network Name Lookups.
         Starting Avahi mDNS/DNS-SD Stack...
         Starting Enable and configure wl18xx bluetooth stack...
         Starting containerd container runtime...
[  OK  ] Started Netperf Benchmark Server.
[  OK  ] Started NFS status monitor for NFSv2/3 locking..
         Starting Simple Network Ma…ent Protocol (SNMP) Daemon....
         Starting Permit User Sessions...
[FAILED] Failed to start Enable and…figure wl18xx bluetooth stack.
See 'systemctl status bt-enable.service' for details.
[  OK  ] Finished Permit User Sessions.
[  OK  ] Started Avahi mDNS/DNS-SD Stack.
[  OK  ] Started Getty on tty1.
[  OK  ] Started Serial Getty on ttyS0.
[  OK  ] Reached target Login Prompts.
         Starting Synchronize System and HW clocks...
         Starting Weston, a Wayland…ositor, as a system service...
         Starting User Database Manager...
[  OK  ] Started Simple Network Man…ement Protocol (SNMP) Daemon..
[  OK  ] Started User Database Manager.
[  OK  ] Finished Synchronize System and HW clocks.
[  OK  ] Created slice User Slice of UID 1000.
         Starting User Runtime Directory /run/user/1000...
[  OK  ] Finished User Runtime Directory /run/user/1000.
         Starting User Manager for UID 1000...
[  OK  ] Started containerd container runtime.

 _____                    _____           _         _   
|  _  |___ ___ ___ ___   |  _  |___ ___  |_|___ ___| |_ 
|     |  _| .'| . | . |  |   __|  _| . | | | -_|  _|  _|
|__|__|_| |__,|_  |___|  |__|  |_| |___|_| |___|___|_|  
              |___|                    |___|            

Thank you,

I did a dtc on the am335x-boneblack.dtb. Output is below. I see "pru_cape_bone_pins" referenced on line 1409 and 3878.

<stdout>: Warning (unit_address_vs_reg): /target-module@4b000000/target-module@140000/pmu@0: node has a unit name, but no reg or ranges property
<stdout>: Warning (unit_address_vs_reg): /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70/ports/port@0: node has a unit name, but no reg or ranges property
<stdout>: Warning (unit_address_vs_reg): /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70/ports/port@0/endpoint@0: node has a unit name, but no reg or ranges property
<stdout>: Warning (unit_address_vs_reg): /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/phy-gmii-sel: node has a reg or ranges property, but no unit name
<stdout>: Warning (unit_address_vs_reg): /ocp/interconnect@48000000/segment@200000/target-module@0/mpu@0: node has a unit name, but no reg or ranges property
<stdout>: Warning (unit_address_vs_reg): /ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0/port/endpoint@0: node has a unit name, but no reg or ranges property
<stdout>: Warning (unit_address_vs_reg): /ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/slave@200: node has a unit name, but no reg or ranges property
<stdout>: Warning (unit_address_vs_reg): /ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/slave@300: node has a unit name, but no reg or ranges property
<stdout>: Warning (simple_bus_reg): /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks: missing or empty reg/ranges property
<stdout>: Warning (simple_bus_reg): /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clockdomains: missing or empty reg/ranges property
<stdout>: Warning (simple_bus_reg): /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/phy-gmii-sel: simple-bus unit address format error, expected "650"
<stdout>: Warning (simple_bus_reg): /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks: missing or empty reg/ranges property
<stdout>: Warning (simple_bus_reg): /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/clockdomains: missing or empty reg/ranges property
<stdout>: Warning (simple_bus_reg): /ocp/interconnect@4b140000/segment@0: simple-bus unit address format error, expected "4800"
<stdout>: Warning (unique_unit_address): /ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0: duplicate unit-address (also used in node /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0)
<stdout>: Warning (interrupt_provider): /ocp/interconnect@44c00000/segment@200000/target-module@7000/gpio@0: Missing #address-cells in interrupt provider
<stdout>: Warning (interrupt_provider): /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24: Missing #address-cells in interrupt provider
<stdout>: Warning (interrupt_provider): /ocp/interconnect@48000000/segment@0/target-module@4c000/gpio@0: Missing #address-cells in interrupt provider
<stdout>: Warning (interrupt_provider): /ocp/interconnect@48000000/segment@100000/target-module@ac000/gpio@0: Missing #address-cells in interrupt provider
<stdout>: Warning (interrupt_provider): /ocp/interconnect@48000000/segment@100000/target-module@ae000/gpio@0: Missing #address-cells in interrupt provider
<stdout>: Warning (interrupt_provider): /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/interrupt-controller@20000: Missing #address-cells in interrupt provider
<stdout>: Warning (interrupt_provider): /ocp/interrupt-controller@48200000: Missing #address-cells in interrupt provider
/dts-v1/;

/ {
	compatible = "ti,am335x-bone-black\0ti,am335x-bone\0ti,am33xx";
	interrupt-parent = <0x01>;
	#address-cells = <0x01>;
	#size-cells = <0x01>;
	model = "TI AM335x BeagleBone Black";

	chosen {
		stdout-path = "/ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0";
	};

	aliases {
		i2c0 = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0";
		i2c1 = "/ocp/interconnect@48000000/segment@0/target-module@2a000/i2c@0";
		i2c2 = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0";
		serial0 = "/ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0";
		serial1 = "/ocp/interconnect@48000000/segment@0/target-module@22000/serial@0";
		serial2 = "/ocp/interconnect@48000000/segment@0/target-module@24000/serial@0";
		serial3 = "/ocp/interconnect@48000000/segment@100000/target-module@a6000/serial@0";
		serial4 = "/ocp/interconnect@48000000/segment@100000/target-module@a8000/serial@0";
		serial5 = "/ocp/interconnect@48000000/segment@100000/target-module@aa000/serial@0";
		d-can0 = "/ocp/interconnect@48000000/segment@100000/target-module@cc000/can@0";
		d-can1 = "/ocp/interconnect@48000000/segment@100000/target-module@d0000/can@0";
		usb0 = "/ocp/target-module@47400000/usb@1400";
		usb1 = "/ocp/target-module@47400000/usb@1800";
		phy0 = "/ocp/target-module@47400000/usb-phy@1300";
		phy1 = "/ocp/target-module@47400000/usb-phy@1b00";
		ethernet0 = "/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@1";
		ethernet1 = "/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@2";
		spi0 = "/ocp/interconnect@48000000/segment@0/target-module@30000/spi@0";
		spi1 = "/ocp/interconnect@48000000/segment@100000/target-module@a0000/spi@0";
		mmc0 = "/ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0";
		mmc1 = "/ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0";
		mmc2 = "/ocp/target-module@47810000/mmc@0";
	};

	cpus {
		#address-cells = <0x01>;
		#size-cells = <0x00>;

		cpu@0 {
			compatible = "arm,cortex-a8";
			enable-method = "ti,am3352";
			device_type = "cpu";
			reg = <0x00>;
			operating-points-v2 = <0x02>;
			clocks = <0x03>;
			clock-names = "cpu";
			clock-latency = <0x493e0>;
			cpu-idle-states = <0x04>;
			cpu0-supply = <0x05>;
		};

		idle-states {

			mpu_gate {
				compatible = "arm,idle-state";
				entry-latency-us = <0x28>;
				exit-latency-us = <0x5a>;
				min-residency-us = <0x12c>;
				ti,idle-wkup-m3;
				phandle = <0x04>;
			};
		};
	};

	opp-table {
		compatible = "operating-points-v2-ti-cpu";
		syscon = <0x06>;
		phandle = <0x02>;

		opp50-300000000 {
			opp-hz = <0x00 0x11e1a300>;
			opp-microvolt = <0xe7ef0 0xe34b8 0xec928>;
			opp-supported-hw = <0x06 0x10>;
			opp-suspend;
		};

		opp100-275000000 {
			opp-hz = <0x00 0x10642ac0>;
			opp-microvolt = <0x10c8e0 0x1072f0 0x111ed0>;
			opp-supported-hw = <0x01 0xff>;
			opp-suspend;
		};

		opp100-300000000 {
			opp-hz = <0x00 0x11e1a300>;
			opp-microvolt = <0x10c8e0 0x1072f0 0x111ed0>;
			opp-supported-hw = <0x06 0x20>;
			opp-suspend;
		};

		opp100-500000000 {
			opp-hz = <0x00 0x1dcd6500>;
			opp-microvolt = <0x10c8e0 0x1072f0 0x111ed0>;
			opp-supported-hw = <0x01 0xffff>;
		};

		opp100-600000000 {
			opp-hz = <0x00 0x23c34600>;
			opp-microvolt = <0x10c8e0 0x1072f0 0x111ed0>;
			opp-supported-hw = <0x06 0x40>;
		};

		opp120-600000000 {
			opp-hz = <0x00 0x23c34600>;
			opp-microvolt = <0x124f80 0x11f1c0 0x12ad40>;
			opp-supported-hw = <0x01 0xffff>;
		};

		opp120-720000000 {
			opp-hz = <0x00 0x2aea5400>;
			opp-microvolt = <0x124f80 0x11f1c0 0x12ad40>;
			opp-supported-hw = <0x06 0x80>;
		};

		oppturbo-720000000 {
			opp-hz = <0x00 0x2aea5400>;
			opp-microvolt = <0x1339e0 0x12d770 0x139c50>;
			opp-supported-hw = <0x01 0xffff>;
		};

		oppturbo-800000000 {
			opp-hz = <0x00 0x2faf0800>;
			opp-microvolt = <0x1339e0 0x12d770 0x139c50>;
			opp-supported-hw = <0x06 0x100>;
		};

		oppnitro-1000000000 {
			opp-hz = <0x00 0x3b9aca00>;
			opp-microvolt = <0x1437c8 0x13d044 0x149f4c>;
			opp-supported-hw = <0x06 0x100>;
		};
	};

	target-module@4b000000 {
		compatible = "ti,sysc-omap4-simple\0ti,sysc";
		clocks = <0x07 0xb8 0x00>;
		clock-names = "fck";
		ti,no-idle;
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		ranges = <0x00 0x4b000000 0x1000000>;

		target-module@140000 {
			compatible = "ti,sysc-omap4-simple\0ti,sysc";
			clocks = <0x08 0x00 0x00>;
			clock-names = "fck";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x140000 0xec0000>;

			pmu@0 {
				compatible = "arm,cortex-a8-pmu";
				interrupts = <0x03>;
			};
		};
	};

	soc {
		compatible = "ti,omap-infra";
	};

	ocp {
		compatible = "simple-pm-bus";
		power-domains = <0x09>;
		clocks = <0x07 0xbc 0x00>;
		clock-names = "fck";
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		ranges;
		phandle = <0x6b>;

		interconnect@44c00000 {
			compatible = "ti,am33xx-l4-wkup\0simple-pm-bus";
			power-domains = <0x0a>;
			clocks = <0x0b 0x0c 0x00>;
			clock-names = "fck";
			reg = <0x44c00000 0x800 0x44c00800 0x800 0x44c01000 0x400 0x44c01400 0x400>;
			reg-names = "ap\0la\0ia0\0ia1";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x44c00000 0x100000 0x100000 0x44d00000 0x100000 0x200000 0x44e00000 0x100000>;
			phandle = <0x6c>;

			segment@0 {
				compatible = "simple-pm-bus";
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				ranges = <0x00 0x00 0x800 0x800 0x800 0x800 0x1000 0x1000 0x400 0x1400 0x1400 0x400>;
			};

			segment@100000 {
				compatible = "simple-pm-bus";
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				ranges = <0x00 0x100000 0x4000 0x4000 0x104000 0x1000 0x80000 0x180000 0x2000 0x82000 0x182000 0x1000>;

				target-module@0 {
					compatible = "ti,sysc-omap4\0ti,sysc";
					reg = <0x00 0x04>;
					reg-names = "rev";
					clocks = <0x0c 0x00 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x00 0x4000 0x80000 0x80000 0x2000>;

					cpu@0 {
						compatible = "ti,am3352-wkup-m3";
						reg = <0x00 0x4000 0x80000 0x2000>;
						reg-names = "umem\0dmem";
						resets = <0x0a 0x03>;
						reset-names = "rstctrl";
						ti,pm-firmware = "am335x-pm-firmware.elf";
						phandle = <0x33>;
					};
				};
			};

			segment@200000 {
				compatible = "simple-pm-bus";
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				ranges = <0x00 0x200000 0x2000 0x2000 0x202000 0x1000 0x3000 0x203000 0x1000 0x4000 0x204000 0x1000 0x5000 0x205000 0x1000 0x6000 0x206000 0x1000 0x7000 0x207000 0x1000 0x8000 0x208000 0x1000 0x9000 0x209000 0x1000 0xa000 0x20a000 0x1000 0xb000 0x20b000 0x1000 0xc000 0x20c000 0x1000 0xd000 0x20d000 0x1000 0xf000 0x20f000 0x1000 0x10000 0x210000 0x10000 0x20000 0x220000 0x10000 0x30000 0x230000 0x1000 0x31000 0x231000 0x1000 0x32000 0x232000 0x1000 0x33000 0x233000 0x1000 0x34000 0x234000 0x1000 0x35000 0x235000 0x1000 0x36000 0x236000 0x1000 0x37000 0x237000 0x1000 0x38000 0x238000 0x1000 0x39000 0x239000 0x1000 0x3a000 0x23a000 0x1000 0x3e000 0x23e000 0x1000 0x3f000 0x23f000 0x1000 0xe000 0x20e000 0x1000 0x40000 0x240000 0x40000 0x80000 0x280000 0x1000>;

				target-module@0 {
					compatible = "ti,sysc-omap4\0ti,sysc";
					reg = <0x00 0x04>;
					reg-names = "rev";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x00 0x2000>;

					prcm@0 {
						compatible = "ti,am3-prcm\0simple-bus";
						reg = <0x00 0x2000>;
						#address-cells = <0x01>;
						#size-cells = <0x01>;
						ranges = <0x00 0x00 0x2000>;
						phandle = <0x6d>;

						clocks {
							#address-cells = <0x01>;
							#size-cells = <0x00>;
							phandle = <0x6e>;

							clock-clk-32768 {
								#clock-cells = <0x00>;
								compatible = "fixed-clock";
								clock-output-names = "clk_32768_ck";
								clock-frequency = <0x8000>;
								phandle = <0x1c>;
							};

							clock-clk-rc32k {
								#clock-cells = <0x00>;
								compatible = "fixed-clock";
								clock-output-names = "clk_rc32k_ck";
								clock-frequency = <0x7d00>;
								phandle = <0x1b>;
							};

							clock-virt-19200000 {
								#clock-cells = <0x00>;
								compatible = "fixed-clock";
								clock-output-names = "virt_19200000_ck";
								clock-frequency = <0x124f800>;
								phandle = <0x2e>;
							};

							clock-virt-24000000 {
								#clock-cells = <0x00>;
								compatible = "fixed-clock";
								clock-output-names = "virt_24000000_ck";
								clock-frequency = <0x16e3600>;
								phandle = <0x2f>;
							};

							clock-virt-25000000 {
								#clock-cells = <0x00>;
								compatible = "fixed-clock";
								clock-output-names = "virt_25000000_ck";
								clock-frequency = <0x17d7840>;
								phandle = <0x30>;
							};

							clock-virt-26000000 {
								#clock-cells = <0x00>;
								compatible = "fixed-clock";
								clock-output-names = "virt_26000000_ck";
								clock-frequency = <0x18cba80>;
								phandle = <0x31>;
							};

							clock-tclkin {
								#clock-cells = <0x00>;
								compatible = "fixed-clock";
								clock-output-names = "tclkin_ck";
								clock-frequency = <0xb71b00>;
								phandle = <0x1a>;
							};

							clock@490 {
								#clock-cells = <0x00>;
								compatible = "ti,am3-dpll-core-clock";
								clock-output-names = "dpll_core_ck";
								clocks = <0x0d 0x0d>;
								reg = <0x490 0x45c 0x468 0x460 0x464>;
								phandle = <0x0e>;
							};

							clock-dpll-core-x2 {
								#clock-cells = <0x00>;
								compatible = "ti,am3-dpll-x2-clock";
								clock-output-names = "dpll_core_x2_ck";
								clocks = <0x0e>;
								phandle = <0x0f>;
							};

							clock-dpll-core-m4@480 {
								#clock-cells = <0x00>;
								compatible = "ti,divider-clock";
								clock-output-names = "dpll_core_m4_ck";
								clocks = <0x0f>;
								ti,max-div = <0x1f>;
								reg = <0x480>;
								ti,index-starts-at-one;
								phandle = <0x16>;
							};

							clock-dpll-core-m5@484 {
								#clock-cells = <0x00>;
								compatible = "ti,divider-clock";
								clock-output-names = "dpll_core_m5_ck";
								clocks = <0x0f>;
								ti,max-div = <0x1f>;
								reg = <0x484>;
								ti,index-starts-at-one;
								phandle = <0x1e>;
							};

							clock-dpll-core-m6@4d8 {
								#clock-cells = <0x00>;
								compatible = "ti,divider-clock";
								clock-output-names = "dpll_core_m6_ck";
								clocks = <0x0f>;
								ti,max-div = <0x1f>;
								reg = <0x4d8>;
								ti,index-starts-at-one;
								phandle = <0x6f>;
							};

							clock@488 {
								#clock-cells = <0x00>;
								compatible = "ti,am3-dpll-clock";
								clock-output-names = "dpll_mpu_ck";
								clocks = <0x0d 0x0d>;
								reg = <0x488 0x420 0x42c 0x424 0x428>;
								phandle = <0x03>;
							};

							clock-dpll-mpu-m2@4a8 {
								#clock-cells = <0x00>;
								compatible = "ti,divider-clock";
								clock-output-names = "dpll_mpu_m2_ck";
								clocks = <0x03>;
								ti,max-div = <0x1f>;
								reg = <0x4a8>;
								ti,index-starts-at-one;
								phandle = <0x70>;
							};

							clock@494 {
								#clock-cells = <0x00>;
								compatible = "ti,am3-dpll-no-gate-clock";
								clock-output-names = "dpll_ddr_ck";
								clocks = <0x0d 0x0d>;
								reg = <0x494 0x434 0x440 0x438 0x43c>;
								phandle = <0x10>;
							};

							clock-dpll-ddr-m2@4a0 {
								#clock-cells = <0x00>;
								compatible = "ti,divider-clock";
								clock-output-names = "dpll_ddr_m2_ck";
								clocks = <0x10>;
								ti,max-div = <0x1f>;
								reg = <0x4a0>;
								ti,index-starts-at-one;
								phandle = <0x11>;
							};

							clock-dpll-ddr-m2-div2 {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "dpll_ddr_m2_div2_ck";
								clocks = <0x11>;
								clock-mult = <0x01>;
								clock-div = <0x02>;
								phandle = <0x71>;
							};

							clock@498 {
								#clock-cells = <0x00>;
								compatible = "ti,am3-dpll-no-gate-clock";
								clock-output-names = "dpll_disp_ck";
								clocks = <0x0d 0x0d>;
								reg = <0x498 0x448 0x454 0x44c 0x450>;
								phandle = <0x12>;
							};

							clock-dpll-disp-m2@4a4 {
								#clock-cells = <0x00>;
								compatible = "ti,divider-clock";
								clock-output-names = "dpll_disp_m2_ck";
								clocks = <0x12>;
								ti,max-div = <0x1f>;
								reg = <0x4a4>;
								ti,index-starts-at-one;
								ti,set-rate-parent;
								phandle = <0x18>;
							};

							clock@48c {
								#clock-cells = <0x00>;
								compatible = "ti,am3-dpll-no-gate-j-type-clock";
								clock-output-names = "dpll_per_ck";
								clocks = <0x0d 0x0d>;
								reg = <0x48c 0x470 0x49c 0x474 0x478>;
								phandle = <0x13>;
							};

							clock-dpll-per-m2@4ac {
								#clock-cells = <0x00>;
								compatible = "ti,divider-clock";
								clock-output-names = "dpll_per_m2_ck";
								clocks = <0x13>;
								ti,max-div = <0x1f>;
								reg = <0x4ac>;
								ti,index-starts-at-one;
								phandle = <0x14>;
							};

							clock-dpll-per-m2-div4-wkupdm {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "dpll_per_m2_div4_wkupdm_ck";
								clocks = <0x14>;
								clock-mult = <0x01>;
								clock-div = <0x04>;
								phandle = <0x72>;
							};

							clock-dpll-per-m2-div4 {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "dpll_per_m2_div4_ck";
								clocks = <0x14>;
								clock-mult = <0x01>;
								clock-div = <0x04>;
								phandle = <0x73>;
							};

							clock-clk-24mhz {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "clk_24mhz";
								clocks = <0x14>;
								clock-mult = <0x01>;
								clock-div = <0x08>;
								phandle = <0x15>;
							};

							clock-clkdiv32k {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "clkdiv32k_ck";
								clocks = <0x15>;
								clock-mult = <0x01>;
								clock-div = <0x2dc>;
								phandle = <0x74>;
							};

							clock-l3-gclk {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "l3_gclk";
								clocks = <0x16>;
								clock-mult = <0x01>;
								clock-div = <0x01>;
								phandle = <0x17>;
							};

							clock-pruss-ocp-gclk@530 {
								#clock-cells = <0x00>;
								compatible = "ti,mux-clock";
								clock-output-names = "pruss_ocp_gclk";
								clocks = <0x17 0x18>;
								reg = <0x530>;
								phandle = <0x59>;
							};

							clock-mmu-fck-1@914 {
								#clock-cells = <0x00>;
								compatible = "ti,gate-clock";
								clock-output-names = "mmu_fck";
								clocks = <0x16>;
								ti,bit-shift = <0x01>;
								reg = <0x914>;
								phandle = <0x75>;
							};

							clock-timer1-fck@528 {
								#clock-cells = <0x00>;
								compatible = "ti,mux-clock";
								clock-output-names = "timer1_fck";
								clocks = <0x0d 0x19 0x00 0x00 0x1a 0x1b 0x1c>;
								reg = <0x528>;
								phandle = <0x36>;
							};

							clock-timer2-fck@508 {
								#clock-cells = <0x00>;
								compatible = "ti,mux-clock";
								clock-output-names = "timer2_fck";
								clocks = <0x1a 0x0d 0x19 0x00 0x00>;
								reg = <0x508>;
								phandle = <0x3c>;
							};

							clock-timer3-fck@50c {
								#clock-cells = <0x00>;
								compatible = "ti,mux-clock";
								clock-output-names = "timer3_fck";
								clocks = <0x1a 0x0d 0x19 0x00 0x00>;
								reg = <0x50c>;
								phandle = <0x76>;
							};

							clock-timer4-fck@510 {
								#clock-cells = <0x00>;
								compatible = "ti,mux-clock";
								clock-output-names = "timer4_fck";
								clocks = <0x1a 0x0d 0x19 0x00 0x00>;
								reg = <0x510>;
								phandle = <0x77>;
							};

							clock-timer5-fck@518 {
								#clock-cells = <0x00>;
								compatible = "ti,mux-clock";
								clock-output-names = "timer5_fck";
								clocks = <0x1a 0x0d 0x19 0x00 0x00>;
								reg = <0x518>;
								phandle = <0x78>;
							};

							clock-timer6-fck@51c {
								#clock-cells = <0x00>;
								compatible = "ti,mux-clock";
								clock-output-names = "timer6_fck";
								clocks = <0x1a 0x0d 0x19 0x00 0x00>;
								reg = <0x51c>;
								phandle = <0x79>;
							};

							clock-timer7-fck@504 {
								#clock-cells = <0x00>;
								compatible = "ti,mux-clock";
								clock-output-names = "timer7_fck";
								clocks = <0x1a 0x0d 0x19 0x00 0x00>;
								reg = <0x504>;
								phandle = <0x7a>;
							};

							clock-usbotg-fck-8@47c {
								#clock-cells = <0x00>;
								compatible = "ti,gate-clock";
								clock-output-names = "usbotg_fck";
								clocks = <0x13>;
								ti,bit-shift = <0x08>;
								reg = <0x47c>;
								phandle = <0x7b>;
							};

							clock-dpll-core-m4-div2 {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "dpll_core_m4_div2_ck";
								clocks = <0x16>;
								clock-mult = <0x01>;
								clock-div = <0x02>;
								phandle = <0x1d>;
							};

							clock-ieee5000-fck-1@e4 {
								#clock-cells = <0x00>;
								compatible = "ti,gate-clock";
								clock-output-names = "ieee5000_fck";
								clocks = <0x1d>;
								ti,bit-shift = <0x01>;
								reg = <0xe4>;
								phandle = <0x7c>;
							};

							clock-wdt1-fck@538 {
								#clock-cells = <0x00>;
								compatible = "ti,mux-clock";
								clock-output-names = "wdt1_fck";
								clocks = <0x1b 0x19 0x00 0x00>;
								reg = <0x538>;
								phandle = <0x7d>;
							};

							clock-l4-rtc-gclk {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "l4_rtc_gclk";
								clocks = <0x16>;
								clock-mult = <0x01>;
								clock-div = <0x02>;
								phandle = <0x7e>;
							};

							clock-l4hs-gclk {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "l4hs_gclk";
								clocks = <0x16>;
								clock-mult = <0x01>;
								clock-div = <0x01>;
								phandle = <0x7f>;
							};

							clock-l3s-gclk {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "l3s_gclk";
								clocks = <0x1d>;
								clock-mult = <0x01>;
								clock-div = <0x01>;
								phandle = <0x80>;
							};

							clock-l4fw-gclk {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "l4fw_gclk";
								clocks = <0x1d>;
								clock-mult = <0x01>;
								clock-div = <0x01>;
								phandle = <0x81>;
							};

							clock-l4ls-gclk {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "l4ls_gclk";
								clocks = <0x1d>;
								clock-mult = <0x01>;
								clock-div = <0x01>;
								phandle = <0x32>;
							};

							clock-sysclk-div {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "sysclk_div_ck";
								clocks = <0x16>;
								clock-mult = <0x01>;
								clock-div = <0x01>;
								phandle = <0x82>;
							};

							clock-cpsw-125mhz-gclk {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "cpsw_125mhz_gclk";
								clocks = <0x1e>;
								clock-mult = <0x01>;
								clock-div = <0x02>;
								phandle = <0x4f>;
							};

							clock-cpsw-cpts-rft@520 {
								#clock-cells = <0x00>;
								compatible = "ti,mux-clock";
								clock-output-names = "cpsw_cpts_rft_clk";
								clocks = <0x1e 0x16>;
								reg = <0x520>;
								phandle = <0x50>;
							};

							clock-gpio0-dbclk-mux@53c {
								#clock-cells = <0x00>;
								compatible = "ti,mux-clock";
								clock-output-names = "gpio0_dbclk_mux_ck";
								clocks = <0x1b 0x1c 0x19 0x00 0x00>;
								reg = <0x53c>;
								phandle = <0x83>;
							};

							clock-lcd-gclk@534 {
								#clock-cells = <0x00>;
								compatible = "ti,mux-clock";
								clock-output-names = "lcd_gclk";
								clocks = <0x18 0x1e 0x14>;
								reg = <0x534>;
								ti,set-rate-parent;
								phandle = <0x20>;
							};

							clock-mmc {
								#clock-cells = <0x00>;
								compatible = "fixed-factor-clock";
								clock-output-names = "mmc_clk";
								clocks = <0x14>;
								clock-mult = <0x01>;
								clock-div = <0x02>;
								phandle = <0x84>;
							};

							clock@52c {
								compatible = "ti,clksel";
								reg = <0x52c>;
								#clock-cells = <0x02>;
								#address-cells = <0x00>;

								clock-gfx-fclk-clksel {
									#clock-cells = <0x00>;
									compatible = "ti,mux-clock";
									clock-output-names = "gfx_fclk_clksel_ck";
									clocks = <0x16 0x14>;
									ti,bit-shift = <0x01>;
									phandle = <0x1f>;
								};

								clock-gfx-fck-div {
									#clock-cells = <0x00>;
									compatible = "ti,divider-clock";
									clock-output-names = "gfx_fck_div_ck";
									clocks = <0x1f>;
									ti,max-div = <0x02>;
									phandle = <0x85>;
								};
							};

							clock@700 {
								compatible = "ti,clksel";
								reg = <0x700>;
								#clock-cells = <0x02>;
								#address-cells = <0x00>;

								clock-sysclkout-pre {
									#clock-cells = <0x00>;
									compatible = "ti,mux-clock";
									clock-output-names = "sysclkout_pre_ck";
									clocks = <0x1c 0x17 0x11 0x14 0x20>;
									phandle = <0x21>;
								};

								clock-clkout2-div {
									#clock-cells = <0x00>;
									compatible = "ti,divider-clock";
									clock-output-names = "clkout2_div_ck";
									clocks = <0x21>;
									ti,bit-shift = <0x03>;
									ti,max-div = <0x08>;
									phandle = <0x22>;
								};

								clock-clkout2 {
									#clock-cells = <0x00>;
									compatible = "ti,gate-clock";
									clock-output-names = "clkout2_ck";
									clocks = <0x22>;
									ti,bit-shift = <0x07>;
									phandle = <0x86>;
								};
							};
						};

						clockdomains {
							phandle = <0x87>;
						};

						clock@0 {
							compatible = "ti,omap4-cm";
							clock-output-names = "per_cm";
							reg = <0x00 0x400>;
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							ranges = <0x00 0x00 0x400>;
							phandle = <0x88>;

							clock@38 {
								compatible = "ti,clkctrl";
								clock-output-names = "l4ls_clkctrl";
								reg = <0x38 0x2c 0x6c 0x28 0xac 0x0c 0xc0 0x1c 0xec 0x0c 0x10c 0x08 0x130 0x04>;
								#clock-cells = <0x02>;
								phandle = <0x39>;
							};

							clock@1c {
								compatible = "ti,clkctrl";
								clock-output-names = "l3s_clkctrl";
								reg = <0x1c 0x04 0x30 0x08 0x68 0x04 0xf8 0x04>;
								#clock-cells = <0x02>;
								phandle = <0x3a>;
							};

							clock@24 {
								compatible = "ti,clkctrl";
								clock-output-names = "l3_clkctrl";
								reg = <0x24 0x0c 0x94 0x10 0xbc 0x04 0xdc 0x08 0xfc 0x08>;
								#clock-cells = <0x02>;
								phandle = <0x07>;
							};

							clock@120 {
								compatible = "ti,clkctrl";
								clock-output-names = "l4hs_clkctrl";
								reg = <0x120 0x04>;
								#clock-cells = <0x02>;
								phandle = <0x4d>;
							};

							clock@e8 {
								compatible = "ti,clkctrl";
								clock-output-names = "pruss_ocp_clkctrl";
								reg = <0xe8 0x04>;
								#clock-cells = <0x02>;
								phandle = <0x57>;
							};

							clock@0 {
								compatible = "ti,clkctrl";
								clock-output-names = "cpsw_125mhz_clkctrl";
								reg = <0x00 0x18>;
								#clock-cells = <0x02>;
								phandle = <0x4e>;
							};

							clock@18 {
								compatible = "ti,clkctrl";
								clock-output-names = "lcdc_clkctrl";
								reg = <0x18 0x04>;
								#clock-cells = <0x02>;
								phandle = <0x4b>;
							};

							clock@14c {
								compatible = "ti,clkctrl";
								clock-output-names = "clk_24mhz_clkctrl";
								reg = <0x14c 0x04>;
								#clock-cells = <0x02>;
								phandle = <0x19>;
							};
						};

						clock@400 {
							compatible = "ti,omap4-cm";
							clock-output-names = "wkup_cm";
							reg = <0x400 0x100>;
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							ranges = <0x00 0x400 0x100>;
							phandle = <0x89>;

							clock@0 {
								compatible = "ti,clkctrl";
								clock-output-names = "l4_wkup_clkctrl";
								reg = <0x00 0x10 0xb4 0x24>;
								#clock-cells = <0x02>;
								phandle = <0x0b>;
							};

							clock@14 {
								compatible = "ti,clkctrl";
								clock-output-names = "l3_aon_clkctrl";
								reg = <0x14 0x04>;
								#clock-cells = <0x02>;
								phandle = <0x08>;
							};

							clock@b0 {
								compatible = "ti,clkctrl";
								clock-output-names = "l4_wkup_aon_clkctrl";
								reg = <0xb0 0x04>;
								#clock-cells = <0x02>;
								phandle = <0x0c>;
							};
						};

						clock@600 {
							compatible = "ti,omap4-cm";
							clock-output-names = "mpu_cm";
							reg = <0x600 0x100>;
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							ranges = <0x00 0x600 0x100>;
							phandle = <0x8a>;

							clock@0 {
								compatible = "ti,clkctrl";
								clock-output-names = "mpu_clkctrl";
								reg = <0x00 0x08>;
								#clock-cells = <0x02>;
								phandle = <0x45>;
							};
						};

						clock@800 {
							compatible = "ti,omap4-cm";
							clock-output-names = "l4_rtc_cm";
							reg = <0x800 0x100>;
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							ranges = <0x00 0x800 0x100>;
							phandle = <0x8b>;

							clock@0 {
								compatible = "ti,clkctrl";
								clock-output-names = "l4_rtc_clkctrl";
								reg = <0x00 0x04>;
								#clock-cells = <0x02>;
								phandle = <0x38>;
							};
						};

						clock@900 {
							compatible = "ti,omap4-cm";
							clock-output-names = "gfx_l3_cm";
							reg = <0x900 0x100>;
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							ranges = <0x00 0x900 0x100>;
							phandle = <0x8c>;

							clock@0 {
								compatible = "ti,clkctrl";
								clock-output-names = "gfx_l3_clkctrl";
								reg = <0x00 0x08>;
								#clock-cells = <0x02>;
								phandle = <0x63>;
							};
						};

						clock@a00 {
							compatible = "ti,omap4-cm";
							clock-output-names = "l4_cefuse_cm";
							reg = <0xa00 0x100>;
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							ranges = <0x00 0xa00 0x100>;
							phandle = <0x8d>;

							clock@0 {
								compatible = "ti,clkctrl";
								clock-output-names = "l4_cefuse_clkctrl";
								reg = <0x00 0x24>;
								#clock-cells = <0x02>;
								phandle = <0x8e>;
							};
						};

						prm@c00 {
							compatible = "ti,am3-prm-inst\0ti,omap-prm-inst";
							reg = <0xc00 0x100>;
							#reset-cells = <0x01>;
							#power-domain-cells = <0x00>;
							phandle = <0x09>;
						};

						prm@d00 {
							compatible = "ti,am3-prm-inst\0ti,omap-prm-inst";
							reg = <0xd00 0x100>;
							#reset-cells = <0x01>;
							#power-domain-cells = <0x00>;
							phandle = <0x0a>;
						};

						prm@e00 {
							compatible = "ti,am3-prm-inst\0ti,omap-prm-inst";
							reg = <0xe00 0x100>;
							#power-domain-cells = <0x00>;
							phandle = <0x44>;
						};

						prm@f00 {
							compatible = "ti,am3-prm-inst\0ti,omap-prm-inst";
							reg = <0xf00 0x100>;
							#reset-cells = <0x01>;
							phandle = <0x8f>;
						};

						prm@1000 {
							compatible = "ti,am3-prm-inst\0ti,omap-prm-inst";
							reg = <0x1000 0x100>;
							#power-domain-cells = <0x00>;
							phandle = <0x37>;
						};

						prm@1100 {
							compatible = "ti,am3-prm-inst\0ti,omap-prm-inst";
							reg = <0x1100 0x100>;
							#power-domain-cells = <0x00>;
							#reset-cells = <0x01>;
							phandle = <0x64>;
						};

						prm@1200 {
							compatible = "ti,am3-prm-inst\0ti,omap-prm-inst";
							reg = <0x1200 0x100>;
							#power-domain-cells = <0x00>;
							phandle = <0x90>;
						};
					};
				};

				target-module@3000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x3000 0x1000>;
				};

				target-module@5000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x5000 0x1000>;
				};

				target-module@7000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0x7000 0x04 0x7010 0x04 0x7114 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x07>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					ti,syss-mask = <0x01>;
					clocks = <0x0b 0x08 0x00 0x0b 0x08 0x12>;
					clock-names = "fck\0dbclk";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x7000 0x1000>;
					phandle = <0x91>;

					gpio@0 {
						compatible = "ti,omap4-gpio";
						gpio-ranges = <0x23 0x00 0x52 0x08 0x23 0x08 0x34 0x04 0x23 0x0c 0x5e 0x04 0x23 0x10 0x47 0x02 0x23 0x12 0x87 0x01 0x23 0x13 0x6c 0x02 0x23 0x15 0x49 0x01 0x23 0x16 0x08 0x02 0x23 0x1a 0x0a 0x02 0x23 0x1c 0x4a 0x01 0x23 0x1d 0x51 0x01 0x23 0x1e 0x1c 0x02>;
						gpio-controller;
						#gpio-cells = <0x02>;
						interrupt-controller;
						#interrupt-cells = <0x02>;
						reg = <0x00 0x1000>;
						interrupts = <0x60>;
						gpio-line-names = "[mdio_data]\0[mdio_clk]\0P9_22 [spi0_sclk]\0P9_21 [spi0_d0]\0P9_18 [spi0_d1]\0P9_17 [spi0_cs0]\0[mmc0_cd]\0P8_42A [ecappwm0]\0P8_35 [lcd d12]\0P8_33 [lcd d13]\0P8_31 [lcd d14]\0P8_32 [lcd d15]\0P9_20 [i2c2_sda]\0P9_19 [i2c2_scl]\0P9_26 [uart1_rxd]\0P9_24 [uart1_txd]\0[rmii1_txd3]\0[rmii1_txd2]\0[usb0_drvvbus]\0[hdmi cec]\0P9_41B\0[rmii1_txd1]\0P8_19 [ehrpwm2a]\0P8_13 [ehrpwm2b]\0NC\0NC\0P8_14\0P8_17\0[rmii1_txd0]\0[rmii1_refclk]\0P9_11 [uart4_rxd]\0P9_13 [uart4_txd]";
						phandle = <0x3e>;
					};
				};

				target-module@9000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0x9050 0x04 0x9054 0x04 0x9058 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x07>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x0b 0xb4 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x9000 0x1000>;

					serial@0 {
						compatible = "ti,am3352-uart\0ti,omap3-uart";
						clock-frequency = <0x2dc6c00>;
						reg = <0x00 0x1000>;
						interrupts = <0x48>;
						status = "okay";
						dmas = <0x24 0x1a 0x00 0x24 0x1b 0x00>;
						dma-names = "tx\0rx";
						pinctrl-names = "default";
						pinctrl-0 = <0x25>;
						phandle = <0x92>;
					};
				};

				target-module@b000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0xb000 0x08 0xb010 0x08 0xb090 0x08>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x307>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					ti,syss-mask = <0x01>;
					clocks = <0x0b 0xb8 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xb000 0x1000>;

					i2c@0 {
						compatible = "ti,omap4-i2c";
						#address-cells = <0x01>;
						#size-cells = <0x00>;
						reg = <0x00 0x1000>;
						interrupts = <0x46>;
						status = "okay";
						pinctrl-names = "default";
						pinctrl-0 = <0x26>;
						clock-frequency = <0x61a80>;
						phandle = <0x93>;

						tps@24 {
							reg = <0x24>;
							compatible = "ti,tps65217";
							interrupt-controller;
							#interrupt-cells = <0x01>;
							interrupts = <0x07>;
							interrupt-parent = <0x01>;
							ti,pmic-shutdown-controller;
							phandle = <0x61>;

							charger {
								compatible = "ti,tps65217-charger";
								interrupts = <0x00 0x01>;
								interrupt-names = "USB\0AC";
								status = "okay";
							};

							pwrbutton {
								compatible = "ti,tps65217-pwrbutton";
								interrupts = <0x02>;
								status = "okay";
							};

							regulators {
								#address-cells = <0x01>;
								#size-cells = <0x00>;

								regulator@0 {
									reg = <0x00>;
									regulator-compatible = "dcdc1";
									regulator-name = "vdds_dpr";
									regulator-always-on;
									phandle = <0x94>;
								};

								regulator@1 {
									reg = <0x01>;
									regulator-compatible = "dcdc2";
									regulator-name = "vdd_mpu";
									regulator-min-microvolt = <0xe1d48>;
									regulator-max-microvolt = <0x149f4c>;
									regulator-boot-on;
									regulator-always-on;
									phandle = <0x05>;
								};

								regulator@2 {
									reg = <0x02>;
									regulator-compatible = "dcdc3";
									regulator-name = "vdd_core";
									regulator-min-microvolt = <0xe1d48>;
									regulator-max-microvolt = <0x118c30>;
									regulator-boot-on;
									regulator-always-on;
									phandle = <0x95>;
								};

								regulator@3 {
									reg = <0x03>;
									regulator-compatible = "ldo1";
									regulator-name = "vio,vrtc,vdds";
									regulator-always-on;
									phandle = <0x96>;
								};

								regulator@4 {
									reg = <0x04>;
									regulator-compatible = "ldo2";
									regulator-name = "vdd_3v3aux";
									regulator-always-on;
									phandle = <0x97>;
								};

								regulator@5 {
									reg = <0x05>;
									regulator-compatible = "ldo3";
									regulator-name = "vdd_1v8";
									regulator-always-on;
									regulator-min-microvolt = <0x1b7740>;
									regulator-max-microvolt = <0x1b7740>;
									phandle = <0x98>;
								};

								regulator@6 {
									reg = <0x06>;
									regulator-compatible = "ldo4";
									regulator-name = "vdd_3v3a";
									regulator-always-on;
									phandle = <0x27>;
								};
							};
						};

						baseboard_eeprom@50 {
							compatible = "atmel,24c256";
							reg = <0x50>;
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							vcc-supply = <0x27>;
							phandle = <0x99>;

							baseboard_data@0 {
								reg = <0x00 0x100>;
								phandle = <0x9a>;
							};
						};

						tda19988@70 {
							compatible = "nxp,tda998x";
							reg = <0x70>;
							nxp,calib-gpios = <0x28 0x19 0x00>;
							interrupts-extended = <0x28 0x19 0x08>;
							pinctrl-names = "default\0off";
							pinctrl-0 = <0x29>;
							pinctrl-1 = <0x2a>;
							#sound-dai-cells = <0x00>;
							audio-ports = <0x02 0x03>;
							status = "disabled";
							phandle = <0x6a>;

							ports {

								port@0 {

									endpoint@0 {
										remote-endpoint = <0x2b>;
										phandle = <0x4c>;
									};
								};
							};
						};
					};
				};

				target-module@d000 {
					compatible = "ti,sysc-omap4\0ti,sysc";
					reg = <0xd000 0x04 0xd010 0x04>;
					reg-names = "rev\0sysc";
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x0b 0xbc 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xd000 0x1000 0x1000 0xe000 0x1000>;

					tscadc@0 {
						compatible = "ti,am3359-tscadc";
						reg = <0x00 0x1000>;
						interrupts = <0x10>;
						clocks = <0x2c>;
						clock-names = "fck";
						status = "disabled";
						dmas = <0x24 0x35 0x00 0x24 0x39 0x00>;
						dma-names = "fifo0\0fifo1";
						phandle = <0x9b>;

						tsc {
							compatible = "ti,am3359-tsc";
						};

						adc {
							#io-channel-cells = <0x01>;
							compatible = "ti,am3359-adc";
							phandle = <0x9c>;
						};
					};
				};

				target-module@10000 {
					compatible = "ti,sysc-omap4\0ti,sysc";
					reg = <0x10000 0x04>;
					reg-names = "rev";
					clocks = <0x0b 0x04 0x00>;
					clock-names = "fck";
					ti,no-idle;
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x10000 0x10000 0x10000 0x20000 0x10000>;

					scm@0 {
						compatible = "ti,am3-scm\0simple-bus";
						reg = <0x00 0x2000>;
						#address-cells = <0x01>;
						#size-cells = <0x01>;
						#pinctrl-cells = <0x01>;
						ranges = <0x00 0x00 0x2000>;
						phandle = <0x9d>;

						pinmux@800 {
							compatible = "pinctrl-single";
							reg = <0x800 0x238>;
							#pinctrl-cells = <0x02>;
							pinctrl-single,register-width = <0x20>;
							pinctrl-single,function-mask = <0x7f>;
							pinctrl-names = "default";
							pinctrl-0 = <0x2d>;
							phandle = <0x23>;

							user_leds_s0 {
								pinctrl-single,pins = <0x54 0x00 0x07 0x58 0x10 0x07 0x5c 0x00 0x07 0x60 0x10 0x07>;
								phandle = <0x65>;
							};

							pinmux_i2c0_pins {
								pinctrl-single,pins = <0x188 0x30 0x00 0x18c 0x30 0x00>;
								phandle = <0x26>;
							};

							pinmux_i2c2_pins {
								pinctrl-single,pins = <0x178 0x30 0x03 0x17c 0x30 0x03>;
								phandle = <0x40>;
							};

							pinmux_uart0_pins {
								pinctrl-single,pins = <0x170 0x30 0x00 0x174 0x00 0x00>;
								phandle = <0x25>;
							};

							pinmux_clkout2_pin {
								pinctrl-single,pins = <0x1b4 0x00 0x03>;
								phandle = <0x2d>;
							};

							cpsw_default {
								pinctrl-single,pins = <0x110 0x30 0x00 0x114 0x00 0x00 0x118 0x30 0x00 0x11c 0x00 0x00 0x120 0x00 0x00 0x124 0x00 0x00 0x128 0x00 0x00 0x12c 0x30 0x00 0x130 0x30 0x00 0x134 0x30 0x00 0x138 0x30 0x00 0x13c 0x30 0x00 0x140 0x30 0x00>;
								phandle = <0x52>;
							};

							cpsw_sleep {
								pinctrl-single,pins = <0x110 0x20 0x07 0x114 0x20 0x07 0x118 0x20 0x07 0x11c 0x20 0x07 0x120 0x20 0x07 0x124 0x20 0x07 0x128 0x20 0x07 0x12c 0x20 0x07 0x130 0x20 0x07 0x134 0x20 0x07 0x138 0x20 0x07 0x13c 0x20 0x07 0x140 0x20 0x07>;
								phandle = <0x53>;
							};

							davinci_mdio_default {
								pinctrl-single,pins = <0x148 0x30 0x00 0x14c 0x10 0x00>;
								phandle = <0x55>;
							};

							davinci_mdio_sleep {
								pinctrl-single,pins = <0x148 0x20 0x07 0x14c 0x20 0x07>;
								phandle = <0x56>;
							};

							pinmux_mmc1_pins {
								pinctrl-single,pins = <0x160 0x28 0x07 0xfc 0x30 0x00 0xf8 0x30 0x00 0xf4 0x30 0x00 0xf0 0x30 0x00 0x104 0x30 0x00 0x100 0x30 0x00>;
								phandle = <0x3d>;
							};

							pinmux_emmc_pins {
								pinctrl-single,pins = <0x80 0x30 0x02 0x84 0x30 0x02 0x00 0x30 0x01 0x04 0x30 0x01 0x08 0x30 0x01 0x0c 0x30 0x01 0x10 0x30 0x01 0x14 0x30 0x01 0x18 0x30 0x01 0x1c 0x30 0x01>;
								phandle = <0x43>;
							};

							nxp_hdmi_bonelt_pins {
								pinctrl-single,pins = <0x1b0 0x00 0x03 0xa0 0x08 0x00 0xa4 0x08 0x00 0xa8 0x08 0x00 0xac 0x08 0x00 0xb0 0x08 0x00 0xb4 0x08 0x00 0xb8 0x08 0x00 0xbc 0x08 0x00 0xc0 0x08 0x00 0xc4 0x08 0x00 0xc8 0x08 0x00 0xcc 0x08 0x00 0xd0 0x08 0x00 0xd4 0x08 0x00 0xd8 0x08 0x00 0xdc 0x08 0x00 0xe0 0x00 0x00 0xe4 0x00 0x00 0xe8 0x00 0x00 0xec 0x00 0x00>;
								phandle = <0x29>;
							};

							nxp_hdmi_bonelt_off_pins {
								pinctrl-single,pins = <0x1b0 0x00 0x03>;
								phandle = <0x2a>;
							};

							mcasp0_pins {
								pinctrl-single,pins = <0x1ac 0x30 0x00 0x19c 0x00 0x02 0x194 0x10 0x00 0x190 0x00 0x00 0x6c 0x00 0x07>;
								phandle = <0x3b>;
							};

							pru_cape_bone_pins {
								pinctrl-single,pins = <0x1a4 0x2e 0x1ac 0x2e 0x19c 0x05 0x198 0x05 0x190 0x05 0x194 0x05 0xac 0x05 0xb0 0x05 0xb4 0x05 0xa0 0x05 0xa4 0x05 0xa8 0x05 0x184 0x05 0x180 0x2d 0x154 0x04 0x150 0x2c 0xb8 0x04 0xe8 0x04 0x158 0x06 0x15c 0x06 0xe0 0x04 0xe4 0x04 0x38 0x2e 0xec 0x04>;
								phandle = <0x58>;
							};
						};

						scm_conf@0 {
							compatible = "syscon\0simple-bus";
							reg = <0x00 0x800>;
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							ranges = <0x00 0x00 0x800>;
							phandle = <0x06>;

							phy-gmii-sel {
								compatible = "ti,am3352-phy-gmii-sel";
								reg = <0x650 0x04>;
								#phy-cells = <0x02>;
								phandle = <0x51>;
							};

							clocks {
								#address-cells = <0x01>;
								#size-cells = <0x00>;
								phandle = <0x9e>;

								clock-sys-clkin-22@40 {
									#clock-cells = <0x00>;
									compatible = "ti,mux-clock";
									clock-output-names = "sys_clkin_ck";
									clocks = <0x2e 0x2f 0x30 0x31>;
									ti,bit-shift = <0x16>;
									reg = <0x40>;
									phandle = <0x0d>;
								};

								clock-adc-tsc-fck {
									#clock-cells = <0x00>;
									compatible = "fixed-factor-clock";
									clock-output-names = "adc_tsc_fck";
									clocks = <0x0d>;
									clock-mult = <0x01>;
									clock-div = <0x01>;
									phandle = <0x2c>;
								};

								clock-dcan0-fck {
									#clock-cells = <0x00>;
									compatible = "fixed-factor-clock";
									clock-output-names = "dcan0_fck";
									clocks = <0x0d>;
									clock-mult = <0x01>;
									clock-div = <0x01>;
									phandle = <0x41>;
								};

								clock-dcan1-fck {
									#clock-cells = <0x00>;
									compatible = "fixed-factor-clock";
									clock-output-names = "dcan1_fck";
									clocks = <0x0d>;
									clock-mult = <0x01>;
									clock-div = <0x01>;
									phandle = <0x42>;
								};

								clock-mcasp0-fck {
									#clock-cells = <0x00>;
									compatible = "fixed-factor-clock";
									clock-output-names = "mcasp0_fck";
									clocks = <0x0d>;
									clock-mult = <0x01>;
									clock-div = <0x01>;
									phandle = <0x9f>;
								};

								clock-mcasp1-fck {
									#clock-cells = <0x00>;
									compatible = "fixed-factor-clock";
									clock-output-names = "mcasp1_fck";
									clocks = <0x0d>;
									clock-mult = <0x01>;
									clock-div = <0x01>;
									phandle = <0xa0>;
								};

								clock-smartreflex0-fck {
									#clock-cells = <0x00>;
									compatible = "fixed-factor-clock";
									clock-output-names = "smartreflex0_fck";
									clocks = <0x0d>;
									clock-mult = <0x01>;
									clock-div = <0x01>;
									phandle = <0xa1>;
								};

								clock-smartreflex1-fck {
									#clock-cells = <0x00>;
									compatible = "fixed-factor-clock";
									clock-output-names = "smartreflex1_fck";
									clocks = <0x0d>;
									clock-mult = <0x01>;
									clock-div = <0x01>;
									phandle = <0xa2>;
								};

								clock-sha0-fck {
									#clock-cells = <0x00>;
									compatible = "fixed-factor-clock";
									clock-output-names = "sha0_fck";
									clocks = <0x0d>;
									clock-mult = <0x01>;
									clock-div = <0x01>;
									phandle = <0xa3>;
								};

								clock-aes0-fck {
									#clock-cells = <0x00>;
									compatible = "fixed-factor-clock";
									clock-output-names = "aes0_fck";
									clocks = <0x0d>;
									clock-mult = <0x01>;
									clock-div = <0x01>;
									phandle = <0xa4>;
								};

								clock-rng-fck {
									#clock-cells = <0x00>;
									compatible = "fixed-factor-clock";
									clock-output-names = "rng_fck";
									clocks = <0x0d>;
									clock-mult = <0x01>;
									clock-div = <0x01>;
									phandle = <0xa5>;
								};

								clock@664 {
									compatible = "ti,clksel";
									reg = <0x664>;
									#clock-cells = <0x02>;
									#address-cells = <0x00>;

									clock-ehrpwm0-tbclk {
										#clock-cells = <0x00>;
										compatible = "ti,gate-clock";
										clock-output-names = "ehrpwm0_tbclk";
										clocks = <0x32>;
										ti,bit-shift = <0x00>;
										phandle = <0x48>;
									};

									clock-ehrpwm1-tbclk {
										#clock-cells = <0x00>;
										compatible = "ti,gate-clock";
										clock-output-names = "ehrpwm1_tbclk";
										clocks = <0x32>;
										ti,bit-shift = <0x01>;
										phandle = <0x49>;
									};

									clock-ehrpwm2-tbclk {
										#clock-cells = <0x00>;
										compatible = "ti,gate-clock";
										clock-output-names = "ehrpwm2_tbclk";
										clocks = <0x32>;
										ti,bit-shift = <0x02>;
										phandle = <0x4a>;
									};
								};
							};
						};

						control@620 {
							compatible = "ti,am335x-usb-ctrl-module";
							reg = <0x620 0x10 0x648 0x04>;
							reg-names = "phy_ctrl\0wakeup";
							phandle = <0x5e>;
						};

						wkup_m3_ipc@1324 {
							compatible = "ti,am3352-wkup-m3-ipc";
							reg = <0x1324 0x24>;
							interrupts = <0x4e>;
							ti,rproc = <0x33>;
							mboxes = <0x34 0x35>;
							firmware-name = "am335x-bone-scale-data.bin";
							phandle = <0xa6>;
						};

						dma-router@f90 {
							compatible = "ti,am335x-edma-crossbar";
							reg = <0xf90 0x40>;
							#dma-cells = <0x03>;
							dma-requests = <0x20>;
							dma-masters = <0x24>;
							phandle = <0xa7>;
						};

						clockdomains {
							phandle = <0xa8>;
						};
					};
				};

				target-module@31000 {
					compatible = "ti,sysc-omap2-timer\0ti,sysc";
					reg = <0x31000 0x04 0x31010 0x04 0x31014 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x303>;
					ti,sysc-sidle = <0x00 0x01 0x02>;
					ti,syss-mask = <0x01>;
					clocks = <0x0b 0xc4 0x00 0x0b 0x0c 0x00>;
					clock-names = "fck\0ick";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x31000 0x1000>;
					ti,no-reset-on-init;
					ti,no-idle;
					phandle = <0xa9>;

					timer@0 {
						compatible = "ti,am335x-timer-1ms";
						reg = <0x00 0x400>;
						interrupts = <0x43>;
						ti,timer-alwon;
						clocks = <0x36>;
						clock-names = "fck";
						assigned-clocks = <0x36>;
						assigned-clock-parents = <0x0d>;
						phandle = <0xaa>;
					};
				};

				target-module@33000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x33000 0x1000>;
				};

				target-module@35000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0x35000 0x04 0x35010 0x04 0x35014 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x22>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					ti,syss-mask = <0x01>;
					clocks = <0x0b 0xd4 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x35000 0x1000>;

					wdt@0 {
						compatible = "ti,omap3-wdt";
						reg = <0x00 0x1000>;
						interrupts = <0x5b>;
						phandle = <0xab>;
					};
				};

				target-module@37000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x37000 0x1000>;
				};

				target-module@39000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x39000 0x1000>;
				};

				target-module@3e000 {
					compatible = "ti,sysc-omap4-simple\0ti,sysc";
					reg = <0x3e074 0x04 0x3e078 0x04>;
					reg-names = "rev\0sysc";
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					power-domains = <0x37>;
					clocks = <0x38 0x00 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x3e000 0x1000>;

					rtc@0 {
						compatible = "ti,am3352-rtc\0ti,da830-rtc";
						reg = <0x00 0x1000>;
						interrupts = <0x4b 0x4c>;
						clocks = <0x1c 0x19 0x00 0x00>;
						clock-names = "ext-clk\0int-clk";
						system-power-controller;
						phandle = <0xac>;
					};
				};

				target-module@40000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x40000 0x40000>;
				};
			};
		};

		interconnect@48000000 {
			compatible = "ti,am33xx-l4-per\0simple-pm-bus";
			power-domains = <0x09>;
			clocks = <0x39 0x28 0x00>;
			clock-names = "fck";
			reg = <0x48000000 0x800 0x48000800 0x800 0x48001000 0x400 0x48001400 0x400 0x48001800 0x400 0x48001c00 0x400>;
			reg-names = "ap\0la\0ia0\0ia1\0ia2\0ia3";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x48000000 0x100000 0x100000 0x48100000 0x100000 0x200000 0x48200000 0x100000 0x300000 0x48300000 0x100000 0x46000000 0x46000000 0x400000 0x46400000 0x46400000 0x400000>;
			phandle = <0xad>;

			segment@0 {
				compatible = "simple-pm-bus";
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				ranges = <0x00 0x00 0x800 0x800 0x800 0x800 0x1000 0x1000 0x400 0x1400 0x1400 0x400 0x1800 0x1800 0x400 0x1c00 0x1c00 0x400 0x8000 0x8000 0x1000 0x9000 0x9000 0x1000 0x16000 0x16000 0x1000 0x17000 0x17000 0x1000 0x22000 0x22000 0x1000 0x23000 0x23000 0x1000 0x24000 0x24000 0x1000 0x25000 0x25000 0x1000 0x2a000 0x2a000 0x1000 0x2b000 0x2b000 0x1000 0x38000 0x38000 0x2000 0x3a000 0x3a000 0x1000 0x14000 0x14000 0x1000 0x15000 0x15000 0x1000 0x3c000 0x3c000 0x2000 0x3e000 0x3e000 0x1000 0x40000 0x40000 0x1000 0x41000 0x41000 0x1000 0x42000 0x42000 0x1000 0x43000 0x43000 0x1000 0x44000 0x44000 0x1000 0x45000 0x45000 0x1000 0x46000 0x46000 0x1000 0x47000 0x47000 0x1000 0x48000 0x48000 0x1000 0x49000 0x49000 0x1000 0x4c000 0x4c000 0x1000 0x4d000 0x4d000 0x1000 0x50000 0x50000 0x2000 0x52000 0x52000 0x1000 0x60000 0x60000 0x1000 0x61000 0x61000 0x1000 0x80000 0x80000 0x10000 0x90000 0x90000 0x1000 0xa0000 0xa0000 0x10000 0xb0000 0xb0000 0x1000 0x30000 0x30000 0x1000 0x31000 0x31000 0x1000 0x4a000 0x4a000 0x1000 0x4b000 0x4b000 0x1000 0xc8000 0xc8000 0x1000 0xc9000 0xc9000 0x1000 0xcc000 0xcc000 0x1000 0xcd000 0xcd000 0x1000 0xca000 0xca000 0x1000 0xcb000 0xcb000 0x1000 0x46000000 0x46000000 0x400000 0x46400000 0x46400000 0x400000>;

				target-module@8000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x8000 0x1000>;
				};

				target-module@14000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x14000 0x1000>;
				};

				target-module@16000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x16000 0x1000>;
				};

				target-module@22000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0x22050 0x04 0x22054 0x04 0x22058 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x07>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x39 0x34 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x22000 0x1000>;

					serial@0 {
						compatible = "ti,am3352-uart\0ti,omap3-uart";
						clock-frequency = <0x2dc6c00>;
						reg = <0x00 0x1000>;
						interrupts = <0x49>;
						status = "disabled";
						dmas = <0x24 0x1c 0x00 0x24 0x1d 0x00>;
						dma-names = "tx\0rx";
						phandle = <0xae>;
					};
				};

				target-module@24000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0x24050 0x04 0x24054 0x04 0x24058 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x07>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x39 0x38 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x24000 0x1000>;

					serial@0 {
						compatible = "ti,am3352-uart\0ti,omap3-uart";
						clock-frequency = <0x2dc6c00>;
						reg = <0x00 0x1000>;
						interrupts = <0x4a>;
						status = "disabled";
						dmas = <0x24 0x1e 0x00 0x24 0x1f 0x00>;
						dma-names = "tx\0rx";
						phandle = <0xaf>;
					};
				};

				target-module@2a000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0x2a000 0x08 0x2a010 0x08 0x2a090 0x08>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x307>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					ti,syss-mask = <0x01>;
					clocks = <0x39 0x10 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x2a000 0x1000>;

					i2c@0 {
						compatible = "ti,omap4-i2c";
						#address-cells = <0x01>;
						#size-cells = <0x00>;
						reg = <0x00 0x1000>;
						interrupts = <0x47>;
						status = "disabled";
						phandle = <0xb0>;
					};
				};

				target-module@30000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0x30000 0x04 0x30110 0x04 0x30114 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x303>;
					ti,sysc-sidle = <0x00 0x01 0x02>;
					ti,syss-mask = <0x01>;
					clocks = <0x39 0x14 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x30000 0x1000>;

					spi@0 {
						compatible = "ti,omap4-mcspi";
						#address-cells = <0x01>;
						#size-cells = <0x00>;
						reg = <0x00 0x400>;
						interrupts = <0x41>;
						ti,spi-num-cs = <0x02>;
						dmas = <0x24 0x10 0x00 0x24 0x11 0x00 0x24 0x12 0x00 0x24 0x13 0x00>;
						dma-names = "tx0\0rx0\0tx1\0rx1";
						status = "disabled";
						phandle = <0xb1>;
					};
				};

				target-module@38000 {
					compatible = "ti,sysc-omap4-simple\0ti,sysc";
					reg = <0x38000 0x04 0x38004 0x04>;
					reg-names = "rev\0sysc";
					ti,sysc-sidle = <0x00 0x01 0x02>;
					clocks = <0x3a 0x18 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x38000 0x2000 0x46000000 0x46000000 0x400000>;

					mcasp@0 {
						compatible = "ti,am33xx-mcasp-audio";
						reg = <0x00 0x2000 0x46000000 0x400000>;
						reg-names = "mpu\0dat";
						interrupts = <0x50 0x51>;
						interrupt-names = "tx\0rx";
						status = "disabled";
						dmas = <0x24 0x08 0x02 0x24 0x09 0x02>;
						dma-names = "tx\0rx";
						#sound-dai-cells = <0x00>;
						pinctrl-names = "default";
						pinctrl-0 = <0x3b>;
						op-mode = <0x00>;
						tdm-slots = <0x02>;
						serial-dir = <0x00 0x00 0x01 0x00>;
						tx-num-evt = <0x20>;
						rx-num-evt = <0x20>;
						phandle = <0x68>;
					};
				};

				target-module@3c000 {
					compatible = "ti,sysc-omap4-simple\0ti,sysc";
					reg = <0x3c000 0x04 0x3c004 0x04>;
					reg-names = "rev\0sysc";
					ti,sysc-sidle = <0x00 0x01 0x02>;
					clocks = <0x3a 0x4c 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x3c000 0x2000 0x46400000 0x46400000 0x400000>;

					mcasp@0 {
						compatible = "ti,am33xx-mcasp-audio";
						reg = <0x00 0x2000 0x46400000 0x400000>;
						reg-names = "mpu\0dat";
						interrupts = <0x52 0x53>;
						interrupt-names = "tx\0rx";
						status = "disabled";
						dmas = <0x24 0x0a 0x02 0x24 0x0b 0x02>;
						dma-names = "tx\0rx";
						phandle = <0xb2>;
					};
				};

				target-module@40000 {
					compatible = "ti,sysc-omap4-timer\0ti,sysc";
					reg = <0x40000 0x04 0x40010 0x04 0x40014 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x01>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x39 0x48 0x00 0x39 0x28 0x00>;
					clock-names = "fck\0ick";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x40000 0x1000>;
					ti,no-reset-on-init;
					ti,no-idle;
					phandle = <0xb3>;

					timer@0 {
						compatible = "ti,am335x-timer";
						reg = <0x00 0x400>;
						interrupts = <0x44>;
						clocks = <0x3c>;
						clock-names = "fck";
						assigned-clocks = <0x3c>;
						assigned-clock-parents = <0x0d>;
						phandle = <0xb4>;
					};
				};

				target-module@42000 {
					compatible = "ti,sysc-omap4-timer\0ti,sysc";
					reg = <0x42000 0x04 0x42010 0x04 0x42014 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x01>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x39 0x4c 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x42000 0x1000>;

					timer@0 {
						compatible = "ti,am335x-timer";
						reg = <0x00 0x400>;
						interrupts = <0x45>;
						phandle = <0xb5>;
					};
				};

				target-module@44000 {
					compatible = "ti,sysc-omap4-timer\0ti,sysc";
					reg = <0x44000 0x04 0x44010 0x04 0x44014 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x01>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x39 0x50 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x44000 0x1000>;

					timer@0 {
						compatible = "ti,am335x-timer";
						reg = <0x00 0x400>;
						interrupts = <0x5c>;
						ti,timer-pwm;
						phandle = <0xb6>;
					};
				};

				target-module@46000 {
					compatible = "ti,sysc-omap4-timer\0ti,sysc";
					reg = <0x46000 0x04 0x46010 0x04 0x46014 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x01>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x39 0xb4 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x46000 0x1000>;

					timer@0 {
						compatible = "ti,am335x-timer";
						reg = <0x00 0x400>;
						interrupts = <0x5d>;
						ti,timer-pwm;
						phandle = <0xb7>;
					};
				};

				target-module@48000 {
					compatible = "ti,sysc-omap4-timer\0ti,sysc";
					reg = <0x48000 0x04 0x48010 0x04 0x48014 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x01>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x39 0xb8 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x48000 0x1000>;

					timer@0 {
						compatible = "ti,am335x-timer";
						reg = <0x00 0x400>;
						interrupts = <0x5e>;
						ti,timer-pwm;
						phandle = <0xb8>;
					};
				};

				target-module@4a000 {
					compatible = "ti,sysc-omap4-timer\0ti,sysc";
					reg = <0x4a000 0x04 0x4a010 0x04 0x4a014 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x01>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x39 0x44 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x4a000 0x1000>;

					timer@0 {
						compatible = "ti,am335x-timer";
						reg = <0x00 0x400>;
						interrupts = <0x5f>;
						ti,timer-pwm;
						phandle = <0xb9>;
					};
				};

				target-module@4c000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0x4c000 0x04 0x4c010 0x04 0x4c114 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x07>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					ti,syss-mask = <0x01>;
					clocks = <0x39 0x74 0x00 0x39 0x74 0x12>;
					clock-names = "fck\0dbclk";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x4c000 0x1000>;

					gpio@0 {
						compatible = "ti,omap4-gpio";
						gpio-ranges = <0x23 0x00 0x00 0x08 0x23 0x08 0x5a 0x04 0x23 0x0c 0x0c 0x10 0x23 0x1c 0x1e 0x04>;
						gpio-controller;
						#gpio-cells = <0x02>;
						interrupt-controller;
						#interrupt-cells = <0x02>;
						reg = <0x00 0x1000>;
						interrupts = <0x62>;
						gpio-line-names = "P8_25 [mmc1_dat0]\0[mmc1_dat1]\0P8_5 [mmc1_dat2]\0P8_6 [mmc1_dat3]\0P8_23 [mmc1_dat4]\0P8_22 [mmc1_dat5]\0P8_3 [mmc1_dat6]\0P8_4 [mmc1_dat7]\0NC\0NC\0NC\0NC\0P8_12\0P8_11\0P8_16\0P8_15\0P9_15A\0P9_23\0P9_14 [ehrpwm1a]\0P9_16 [ehrpwm1b]\0[emmc rst]\0[usr0 led]\0[usr1 led]\0[usr2 led]\0[usr3 led]\0[hdmi irq]\0[usb vbus oc]\0[hdmi audio]\0P9_12\0P8_26\0P8_21 [emmc]\0P8_20 [emmc]";
						phandle = <0x28>;
					};
				};

				target-module@50000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x50000 0x2000>;
				};

				target-module@60000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0x602fc 0x04 0x60110 0x04 0x60114 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x307>;
					ti,sysc-sidle = <0x00 0x01 0x02>;
					ti,syss-mask = <0x01>;
					clocks = <0x39 0x04 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x60000 0x1000>;

					mmc@0 {
						compatible = "ti,am335-sdhci";
						ti,needs-special-reset;
						dmas = <0x24 0x18 0x00 0x24 0x19 0x00>;
						dma-names = "tx\0rx";
						interrupts = <0x40>;
						reg = <0x00 0x1000>;
						status = "okay";
						bus-width = <0x04>;
						pinctrl-names = "default";
						pinctrl-0 = <0x3d>;
						cd-gpios = <0x3e 0x06 0x01>;
						vmmc-supply = <0x3f>;
						phandle = <0xba>;
					};
				};

				target-module@80000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0x80000 0x04 0x80010 0x04 0x80014 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x303>;
					ti,sysc-sidle = <0x00 0x01 0x02>;
					ti,syss-mask = <0x01>;
					clocks = <0x39 0x08 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x80000 0x10000>;

					elm@0 {
						compatible = "ti,am3352-elm";
						reg = <0x00 0x2000>;
						interrupts = <0x04>;
						status = "disabled";
						phandle = <0xbb>;
					};
				};

				target-module@a0000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xa0000 0x10000>;
				};

				target-module@c8000 {
					compatible = "ti,sysc-omap4\0ti,sysc";
					reg = <0xc8000 0x04 0xc8010 0x04>;
					reg-names = "rev\0sysc";
					ti,sysc-mask = <0x01>;
					ti,sysc-sidle = <0x00 0x01 0x02>;
					clocks = <0x39 0xd8 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xc8000 0x1000>;

					mailbox@0 {
						compatible = "ti,omap4-mailbox";
						reg = <0x00 0x200>;
						interrupts = <0x4d>;
						#mbox-cells = <0x01>;
						ti,mbox-num-users = <0x04>;
						ti,mbox-num-fifos = <0x08>;
						phandle = <0x34>;

						mbox-wkup-m3 {
							ti,mbox-send-noirq;
							ti,mbox-tx = <0x00 0x00 0x00>;
							ti,mbox-rx = <0x00 0x00 0x03>;
							phandle = <0x35>;
						};
					};
				};

				target-module@ca000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0xca000 0x04 0xca010 0x04 0xca014 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x307>;
					ti,sysc-sidle = <0x00 0x01 0x02>;
					ti,syss-mask = <0x01>;
					clocks = <0x39 0xd4 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xca000 0x1000>;

					spinlock@0 {
						compatible = "ti,omap4-hwspinlock";
						reg = <0x00 0x1000>;
						#hwlock-cells = <0x01>;
						phandle = <0xbc>;
					};
				};

				target-module@cc000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xcc000 0x1000>;
				};
			};

			segment@100000 {
				compatible = "simple-pm-bus";
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				ranges = <0x8c000 0x18c000 0x1000 0x8d000 0x18d000 0x1000 0x8e000 0x18e000 0x1000 0x8f000 0x18f000 0x1000 0x9c000 0x19c000 0x1000 0x9d000 0x19d000 0x1000 0xa6000 0x1a6000 0x1000 0xa7000 0x1a7000 0x1000 0xa8000 0x1a8000 0x1000 0xa9000 0x1a9000 0x1000 0xaa000 0x1aa000 0x1000 0xab000 0x1ab000 0x1000 0xac000 0x1ac000 0x1000 0xad000 0x1ad000 0x1000 0xae000 0x1ae000 0x1000 0xaf000 0x1af000 0x1000 0xb0000 0x1b0000 0x10000 0xc0000 0x1c0000 0x1000 0xcc000 0x1cc000 0x2000 0xce000 0x1ce000 0x2000 0xd0000 0x1d0000 0x2000 0xd2000 0x1d2000 0x2000 0xd8000 0x1d8000 0x1000 0xd9000 0x1d9000 0x1000 0xa0000 0x1a0000 0x1000 0xa1000 0x1a1000 0x1000 0xa2000 0x1a2000 0x1000 0xa3000 0x1a3000 0x1000 0xa4000 0x1a4000 0x1000 0xa5000 0x1a5000 0x1000>;

				target-module@8c000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x8c000 0x1000>;
				};

				target-module@8e000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x8e000 0x1000>;
				};

				target-module@9c000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0x9c000 0x08 0x9c010 0x08 0x9c090 0x08>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x307>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					ti,syss-mask = <0x01>;
					clocks = <0x39 0x0c 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x9c000 0x1000>;

					i2c@0 {
						compatible = "ti,omap4-i2c";
						#address-cells = <0x01>;
						#size-cells = <0x00>;
						reg = <0x00 0x1000>;
						interrupts = <0x1e>;
						status = "okay";
						pinctrl-names = "default";
						pinctrl-0 = <0x40>;
						clock-frequency = <0x186a0>;
						phandle = <0xbd>;

						cape_eeprom0@54 {
							compatible = "atmel,24c256";
							reg = <0x54>;
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							phandle = <0xbe>;

							cape_data@0 {
								reg = <0x00 0x100>;
								phandle = <0xbf>;
							};
						};

						cape_eeprom1@55 {
							compatible = "atmel,24c256";
							reg = <0x55>;
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							phandle = <0xc0>;

							cape_data@0 {
								reg = <0x00 0x100>;
								phandle = <0xc1>;
							};
						};

						cape_eeprom2@56 {
							compatible = "atmel,24c256";
							reg = <0x56>;
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							phandle = <0xc2>;

							cape_data@0 {
								reg = <0x00 0x100>;
								phandle = <0xc3>;
							};
						};

						cape_eeprom3@57 {
							compatible = "atmel,24c256";
							reg = <0x57>;
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							phandle = <0xc4>;

							cape_data@0 {
								reg = <0x00 0x100>;
								phandle = <0xc5>;
							};
						};
					};
				};

				target-module@a0000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0xa0000 0x04 0xa0110 0x04 0xa0114 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x303>;
					ti,sysc-sidle = <0x00 0x01 0x02>;
					ti,syss-mask = <0x01>;
					clocks = <0x39 0x18 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xa0000 0x1000>;

					spi@0 {
						compatible = "ti,omap4-mcspi";
						#address-cells = <0x01>;
						#size-cells = <0x00>;
						reg = <0x00 0x400>;
						interrupts = <0x7d>;
						ti,spi-num-cs = <0x02>;
						dmas = <0x24 0x2a 0x00 0x24 0x2b 0x00 0x24 0x2c 0x00 0x24 0x2d 0x00>;
						dma-names = "tx0\0rx0\0tx1\0rx1";
						status = "disabled";
						phandle = <0xc6>;
					};
				};

				target-module@a2000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xa2000 0x1000>;
				};

				target-module@a4000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xa4000 0x1000>;
				};

				target-module@a6000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0xa6050 0x04 0xa6054 0x04 0xa6058 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x07>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x39 0x3c 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xa6000 0x1000>;

					serial@0 {
						compatible = "ti,am3352-uart\0ti,omap3-uart";
						clock-frequency = <0x2dc6c00>;
						reg = <0x00 0x1000>;
						interrupts = <0x2c>;
						status = "disabled";
						phandle = <0xc7>;
					};
				};

				target-module@a8000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0xa8050 0x04 0xa8054 0x04 0xa8058 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x07>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x39 0x40 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xa8000 0x1000>;

					serial@0 {
						compatible = "ti,am3352-uart\0ti,omap3-uart";
						clock-frequency = <0x2dc6c00>;
						reg = <0x00 0x1000>;
						interrupts = <0x2d>;
						status = "disabled";
						phandle = <0xc8>;
					};
				};

				target-module@aa000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0xaa050 0x04 0xaa054 0x04 0xaa058 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x07>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x39 0x00 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xaa000 0x1000>;

					serial@0 {
						compatible = "ti,am3352-uart\0ti,omap3-uart";
						clock-frequency = <0x2dc6c00>;
						reg = <0x00 0x1000>;
						interrupts = <0x2e>;
						status = "disabled";
						phandle = <0xc9>;
					};
				};

				target-module@ac000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0xac000 0x04 0xac010 0x04 0xac114 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x07>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					ti,syss-mask = <0x01>;
					clocks = <0x39 0x78 0x00 0x39 0x78 0x12>;
					clock-names = "fck\0dbclk";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xac000 0x1000>;

					gpio@0 {
						compatible = "ti,omap4-gpio";
						gpio-ranges = <0x23 0x00 0x22 0x12 0x23 0x12 0x4d 0x04 0x23 0x16 0x38 0x0a>;
						gpio-controller;
						#gpio-cells = <0x02>;
						interrupt-controller;
						#interrupt-cells = <0x02>;
						reg = <0x00 0x1000>;
						interrupts = <0x20>;
						gpio-line-names = "P9_15B\0P8_18\0P8_7\0P8_8\0P8_10\0P8_9\0P8_45 [hdmi]\0P8_46 [hdmi]\0P8_43 [hdmi]\0P8_44 [hdmi]\0P8_41 [hdmi]\0P8_42 [hdmi]\0P8_39 [hdmi]\0P8_40 [hdmi]\0P8_37 [hdmi]\0P8_38 [hdmi]\0P8_36 [hdmi]\0P8_34 [hdmi]\0[rmii1_rxd3]\0[rmii1_rxd2]\0[rmii1_rxd1]\0[rmii1_rxd0]\0P8_27 [hdmi]\0P8_29 [hdmi]\0P8_28 [hdmi]\0P8_30 [hdmi]\0[mmc0_dat3]\0[mmc0_dat2]\0[mmc0_dat1]\0[mmc0_dat0]\0[mmc0_clk]\0[mmc0_cmd]";
						phandle = <0xca>;
					};
				};

				target-module@ae000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0xae000 0x04 0xae010 0x04 0xae114 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x07>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					ti,syss-mask = <0x01>;
					clocks = <0x39 0x7c 0x00 0x39 0x7c 0x12>;
					clock-names = "fck\0dbclk";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xae000 0x1000>;
					phandle = <0xcb>;

					gpio@0 {
						compatible = "ti,omap4-gpio";
						gpio-ranges = <0x23 0x00 0x42 0x05 0x23 0x05 0x62 0x02 0x23 0x07 0x4b 0x02 0x23 0x0d 0x8d 0x01 0x23 0x0e 0x64 0x08>;
						gpio-controller;
						#gpio-cells = <0x02>;
						interrupt-controller;
						#interrupt-cells = <0x02>;
						reg = <0x00 0x1000>;
						interrupts = <0x3e>;
						gpio-line-names = "[mii col]\0[mii crs]\0[mii rx err]\0[mii tx en]\0[mii rx dv]\0[i2c0 sda]\0[i2c0 scl]\0[jtag emu0]\0[jtag emu1]\0[mii tx clk]\0[mii rx clk]\0NC\0NC\0[usb vbus en]\0P9_31 [spi1_sclk]\0P9_29 [spi1_d0]\0P9_30 [spi1_d1]\0P9_28 [spi1_cs0]\0P9_42B [ecappwm0]\0P9_27\0P9_41A\0P9_25\0NC\0NC\0NC\0NC\0NC\0NC\0NC\0NC\0NC\0NC";
						phandle = <0xcc>;
					};
				};

				target-module@b0000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xb0000 0x10000>;
				};

				target-module@cc000 {
					compatible = "ti,sysc-omap4\0ti,sysc";
					reg = <0xcc020 0x04>;
					reg-names = "rev";
					clocks = <0x39 0x88 0x00 0x41>;
					clock-names = "fck\0osc";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xcc000 0x2000>;

					can@0 {
						compatible = "ti,am3352-d_can";
						reg = <0x00 0x2000>;
						clocks = <0x41>;
						clock-names = "fck";
						syscon-raminit = <0x06 0x644 0x00>;
						interrupts = <0x34>;
						status = "disabled";
						phandle = <0xcd>;
					};
				};

				target-module@d0000 {
					compatible = "ti,sysc-omap4\0ti,sysc";
					reg = <0xd0020 0x04>;
					reg-names = "rev";
					clocks = <0x39 0x8c 0x00 0x42>;
					clock-names = "fck\0osc";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xd0000 0x2000>;

					can@0 {
						compatible = "ti,am3352-d_can";
						reg = <0x00 0x2000>;
						clocks = <0x42>;
						clock-names = "fck";
						syscon-raminit = <0x06 0x644 0x01>;
						interrupts = <0x37>;
						status = "disabled";
						phandle = <0xce>;
					};
				};

				target-module@d8000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0xd82fc 0x04 0xd8110 0x04 0xd8114 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x307>;
					ti,sysc-sidle = <0x00 0x01 0x02>;
					ti,syss-mask = <0x01>;
					clocks = <0x39 0xbc 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xd8000 0x1000>;

					mmc@0 {
						compatible = "ti,am335-sdhci";
						ti,needs-special-reset;
						dmas = <0x24 0x02 0x00 0x24 0x03 0x00>;
						dma-names = "tx\0rx";
						interrupts = <0x1c>;
						reg = <0x00 0x1000>;
						status = "okay";
						vmmc-supply = <0x3f>;
						pinctrl-names = "default";
						pinctrl-0 = <0x43>;
						bus-width = <0x08>;
						non-removable;
						phandle = <0xcf>;
					};
				};
			};

			segment@200000 {
				compatible = "simple-pm-bus";
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				ranges = <0x00 0x200000 0x10000>;

				target-module@0 {
					compatible = "ti,sysc-omap4-simple\0ti,sysc";
					power-domains = <0x44>;
					clocks = <0x45 0x04 0x00>;
					clock-names = "fck";
					ti,no-idle;
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x00 0x10000>;

					mpu@0 {
						compatible = "ti,omap3-mpu";
						pm-sram = <0x46 0x47>;
					};
				};
			};

			segment@300000 {
				compatible = "simple-pm-bus";
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				ranges = <0x00 0x300000 0x1000 0x1000 0x301000 0x1000 0x2000 0x302000 0x1000 0x3000 0x303000 0x1000 0x4000 0x304000 0x1000 0x5000 0x305000 0x1000 0xe000 0x30e000 0x1000 0xf000 0x30f000 0x1000 0x18000 0x318000 0x4000 0x1c000 0x31c000 0x1000 0x10000 0x310000 0x2000 0x12000 0x312000 0x1000 0x15000 0x315000 0x1000 0x16000 0x316000 0x1000 0x17000 0x317000 0x1000 0x13000 0x313000 0x1000 0x14000 0x314000 0x1000 0x20000 0x320000 0x1000 0x21000 0x321000 0x1000 0x22000 0x322000 0x1000 0x23000 0x323000 0x1000 0x24000 0x324000 0x1000 0x25000 0x325000 0x1000>;

				target-module@0 {
					compatible = "ti,sysc-omap4\0ti,sysc";
					reg = <0x00 0x04 0x04 0x04>;
					reg-names = "rev\0sysc";
					ti,sysc-midle = <0x00 0x01 0x02 0x03>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x39 0x9c 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x00 0x1000>;

					epwmss@0 {
						compatible = "ti,am33xx-pwmss";
						reg = <0x00 0x10>;
						#address-cells = <0x01>;
						#size-cells = <0x01>;
						status = "disabled";
						ranges = <0x00 0x00 0x1000>;
						phandle = <0xd0>;

						pwm@100 {
							compatible = "ti,am3352-ecap";
							#pwm-cells = <0x03>;
							reg = <0x100 0x80>;
							clocks = <0x32>;
							clock-names = "fck";
							status = "disabled";
							phandle = <0xd1>;
						};

						counter@180 {
							compatible = "ti,am3352-eqep";
							reg = <0x180 0x80>;
							clocks = <0x32>;
							clock-names = "sysclkout";
							interrupts = <0x4f>;
							status = "disabled";
							phandle = <0xd2>;
						};

						pwm@200 {
							compatible = "ti,am3352-ehrpwm";
							#pwm-cells = <0x03>;
							reg = <0x200 0x80>;
							clocks = <0x48 0x32>;
							clock-names = "tbclk\0fck";
							status = "disabled";
							phandle = <0xd3>;
						};
					};
				};

				target-module@2000 {
					compatible = "ti,sysc-omap4\0ti,sysc";
					reg = <0x2000 0x04 0x2004 0x04>;
					reg-names = "rev\0sysc";
					ti,sysc-midle = <0x00 0x01 0x02 0x03>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x39 0x94 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x2000 0x1000>;

					epwmss@0 {
						compatible = "ti,am33xx-pwmss";
						reg = <0x00 0x10>;
						#address-cells = <0x01>;
						#size-cells = <0x01>;
						status = "disabled";
						ranges = <0x00 0x00 0x1000>;
						phandle = <0xd4>;

						pwm@100 {
							compatible = "ti,am3352-ecap";
							#pwm-cells = <0x03>;
							reg = <0x100 0x80>;
							clocks = <0x32>;
							clock-names = "fck";
							status = "disabled";
							phandle = <0xd5>;
						};

						counter@180 {
							compatible = "ti,am3352-eqep";
							reg = <0x180 0x80>;
							clocks = <0x32>;
							clock-names = "sysclkout";
							interrupts = <0x58>;
							status = "disabled";
							phandle = <0xd6>;
						};

						pwm@200 {
							compatible = "ti,am3352-ehrpwm";
							#pwm-cells = <0x03>;
							reg = <0x200 0x80>;
							clocks = <0x49 0x32>;
							clock-names = "tbclk\0fck";
							status = "disabled";
							phandle = <0xd7>;
						};
					};
				};

				target-module@4000 {
					compatible = "ti,sysc-omap4\0ti,sysc";
					reg = <0x4000 0x04 0x4004 0x04>;
					reg-names = "rev\0sysc";
					ti,sysc-midle = <0x00 0x01 0x02 0x03>;
					ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
					clocks = <0x39 0xa0 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x4000 0x1000>;

					epwmss@0 {
						compatible = "ti,am33xx-pwmss";
						reg = <0x00 0x10>;
						#address-cells = <0x01>;
						#size-cells = <0x01>;
						status = "disabled";
						ranges = <0x00 0x00 0x1000>;
						phandle = <0xd8>;

						pwm@100 {
							compatible = "ti,am3352-ecap";
							#pwm-cells = <0x03>;
							reg = <0x100 0x80>;
							clocks = <0x32>;
							clock-names = "fck";
							status = "disabled";
							phandle = <0xd9>;
						};

						counter@180 {
							compatible = "ti,am3352-eqep";
							reg = <0x180 0x80>;
							clocks = <0x32>;
							clock-names = "sysclkout";
							interrupts = <0x59>;
							status = "disabled";
							phandle = <0xda>;
						};

						pwm@200 {
							compatible = "ti,am3352-ehrpwm";
							#pwm-cells = <0x03>;
							reg = <0x200 0x80>;
							clocks = <0x4a 0x32>;
							clock-names = "tbclk\0fck";
							status = "disabled";
							phandle = <0xdb>;
						};
					};
				};

				target-module@e000 {
					compatible = "ti,sysc-omap4\0ti,sysc";
					reg = <0xe000 0x04 0xe054 0x04>;
					reg-names = "rev\0sysc";
					ti,sysc-midle = <0x00 0x01 0x02>;
					ti,sysc-sidle = <0x00 0x01 0x02>;
					clocks = <0x4b 0x00 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xe000 0x1000>;

					lcdc@0 {
						compatible = "ti,am33xx-tilcdc";
						reg = <0x00 0x1000>;
						interrupts = <0x24>;
						status = "disabled";
						blue-and-red-wiring = "straight";
						phandle = <0xdc>;

						port {

							endpoint@0 {
								remote-endpoint = <0x4c>;
								phandle = <0x2b>;
							};
						};
					};
				};

				target-module@10000 {
					compatible = "ti,sysc-omap2\0ti,sysc";
					reg = <0x11fe0 0x04 0x11fe4 0x04>;
					reg-names = "rev\0sysc";
					ti,sysc-mask = <0x01>;
					ti,sysc-sidle = <0x00 0x01>;
					clocks = <0x39 0x58 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x10000 0x2000>;

					rng@0 {
						compatible = "ti,omap4-rng";
						reg = <0x00 0x2000>;
						interrupts = <0x6f>;
						phandle = <0xdd>;
					};
				};

				target-module@13000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x13000 0x1000>;
				};

				target-module@15000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x15000 0x1000 0x1000 0x16000 0x1000>;
				};

				target-module@18000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x18000 0x4000>;
				};

				target-module@20000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x20000 0x1000>;
				};

				target-module@22000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x22000 0x1000>;
				};

				target-module@24000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x24000 0x1000>;
				};
			};
		};

		interconnect@47c00000 {
			compatible = "ti,am33xx-l4-fw\0simple-bus";
			reg = <0x47c00000 0x800 0x47c00800 0x800 0x47c01000 0x400>;
			reg-names = "ap\0la\0ia0";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x47c00000 0x1000000>;
			phandle = <0xde>;

			segment@0 {
				compatible = "simple-bus";
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				ranges = <0x00 0x00 0x800 0x800 0x800 0x800 0x1000 0x1000 0x400 0xc000 0xc000 0x1000 0xd000 0xd000 0x1000 0xe000 0xe000 0x1000 0xf000 0xf000 0x1000 0x10000 0x10000 0x1000 0x11000 0x11000 0x1000 0x1a000 0x1a000 0x1000 0x1b000 0x1b000 0x1000 0x24000 0x24000 0x1000 0x25000 0x25000 0x1000 0x26000 0x26000 0x1000 0x27000 0x27000 0x1000 0x30000 0x30000 0x1000 0x31000 0x31000 0x1000 0x38000 0x38000 0x1000 0x39000 0x39000 0x1000 0x3a000 0x3a000 0x1000 0x3b000 0x3b000 0x1000 0x3e000 0x3e000 0x1000 0x3f000 0x3f000 0x1000 0x3c000 0x3c000 0x1000 0x40000 0x40000 0x1000 0x46000 0x46000 0x1000 0x47000 0x47000 0x1000 0x44000 0x44000 0x1000 0x45000 0x45000 0x1000 0x28000 0x28000 0x1000 0x29000 0x29000 0x1000 0x32000 0x32000 0x1000 0x33000 0x33000 0x1000 0x3d000 0x3d000 0x1000 0x41000 0x41000 0x1000 0x42000 0x42000 0x1000 0x43000 0x43000 0x1000 0x14000 0x14000 0x1000 0x15000 0x15000 0x1000>;

				target-module@c000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xc000 0x1000>;
				};

				target-module@e000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0xe000 0x1000>;
				};

				target-module@10000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x10000 0x1000>;
				};

				target-module@14000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x14000 0x1000>;
				};

				target-module@1a000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x1a000 0x1000>;
				};

				target-module@24000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x24000 0x1000>;
				};

				target-module@26000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x26000 0x1000>;
				};

				target-module@28000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x28000 0x1000>;
				};

				target-module@30000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x30000 0x1000>;
				};

				target-module@32000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x32000 0x1000>;
				};

				target-module@38000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x38000 0x1000>;
				};

				target-module@3a000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x3a000 0x1000>;
				};

				target-module@3c000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x3c000 0x1000>;
				};

				target-module@3e000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x3e000 0x1000>;
				};

				target-module@40000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x40000 0x1000>;
				};

				target-module@42000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x42000 0x1000>;
				};

				target-module@44000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x44000 0x1000>;
				};

				target-module@46000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x46000 0x1000>;
				};
			};
		};

		interconnect@4a000000 {
			compatible = "ti,am33xx-l4-fast\0simple-pm-bus";
			power-domains = <0x09>;
			clocks = <0x4d 0x00 0x00>;
			clock-names = "fck";
			reg = <0x4a000000 0x800 0x4a000800 0x800 0x4a001000 0x400>;
			reg-names = "ap\0la\0ia0";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x4a000000 0x1000000>;
			phandle = <0xdf>;

			segment@0 {
				compatible = "simple-pm-bus";
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				ranges = <0x00 0x00 0x800 0x800 0x800 0x800 0x1000 0x1000 0x400 0x100000 0x100000 0x8000 0x108000 0x108000 0x1000 0x180000 0x180000 0x20000 0x1a0000 0x1a0000 0x1000 0x200000 0x200000 0x80000 0x280000 0x280000 0x1000 0x300000 0x300000 0x80000 0x380000 0x380000 0x1000>;

				target-module@100000 {
					compatible = "ti,sysc-omap4-simple\0ti,sysc";
					reg = <0x101200 0x04 0x101208 0x04 0x101204 0x04>;
					reg-names = "rev\0sysc\0syss";
					ti,sysc-mask = <0x00>;
					ti,sysc-midle = <0x00 0x01>;
					ti,sysc-sidle = <0x00 0x01>;
					ti,syss-mask = <0x01>;
					clocks = <0x4e 0x14 0x00>;
					clock-names = "fck";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x100000 0x8000>;

					ethernet@0 {
						compatible = "ti,am335x-cpsw\0ti,cpsw";
						clocks = <0x4f 0x50>;
						clock-names = "fck\0cpts";
						cpdma_channels = <0x08>;
						ale_entries = <0x400>;
						bd_ram_size = <0x2000>;
						mac_control = <0x20>;
						slaves = <0x02>;
						active_slave = <0x00>;
						cpts_clock_mult = <0x80000000>;
						cpts_clock_shift = <0x1d>;
						reg = <0x00 0x800 0x1200 0x100>;
						#address-cells = <0x01>;
						#size-cells = <0x01>;
						interrupts = <0x28 0x29 0x2a 0x2b>;
						ranges = <0x00 0x00 0x8000>;
						syscon = <0x06>;
						status = "disabled";
						phandle = <0xe0>;

						mdio@1000 {
							compatible = "ti,cpsw-mdio\0ti,davinci_mdio";
							clocks = <0x4e 0x14 0x00>;
							clock-names = "fck";
							#address-cells = <0x01>;
							#size-cells = <0x00>;
							bus_freq = <0xf4240>;
							reg = <0x1000 0x100>;
							status = "disabled";
							phandle = <0xe1>;
						};

						slave@200 {
							mac-address = [00 00 00 00 00 00];
							phys = <0x51 0x01 0x01>;
							phandle = <0xe2>;
						};

						slave@300 {
							mac-address = [00 00 00 00 00 00];
							phys = <0x51 0x02 0x01>;
							phandle = <0xe3>;
						};
					};

					switch@0 {
						compatible = "ti,am335x-cpsw-switch\0ti,cpsw-switch";
						reg = <0x00 0x4000>;
						ranges = <0x00 0x00 0x4000>;
						clocks = <0x4f>;
						clock-names = "fck";
						#address-cells = <0x01>;
						#size-cells = <0x01>;
						syscon = <0x06>;
						status = "okay";
						interrupts = <0x28 0x29 0x2a 0x2b>;
						interrupt-names = "rx_thresh\0rx\0tx\0misc";
						pinctrl-names = "default\0sleep";
						pinctrl-0 = <0x52>;
						pinctrl-1 = <0x53>;
						phandle = <0xe4>;

						ethernet-ports {
							#address-cells = <0x01>;
							#size-cells = <0x00>;

							port@1 {
								reg = <0x01>;
								label = "port1";
								mac-address = [00 00 00 00 00 00];
								phys = <0x51 0x01 0x01>;
								phy-handle = <0x54>;
								phy-mode = "mii";
								ti,dual-emac-pvid = <0x01>;
								phandle = <0xe5>;
							};

							port@2 {
								reg = <0x02>;
								label = "port2";
								mac-address = [00 00 00 00 00 00];
								phys = <0x51 0x02 0x01>;
								status = "disabled";
								phandle = <0xe6>;
							};
						};

						mdio@1000 {
							compatible = "ti,cpsw-mdio\0ti,davinci_mdio";
							clocks = <0x4f>;
							clock-names = "fck";
							#address-cells = <0x01>;
							#size-cells = <0x00>;
							bus_freq = <0xf4240>;
							reg = <0x1000 0x100>;
							pinctrl-names = "default\0sleep";
							pinctrl-0 = <0x55>;
							pinctrl-1 = <0x56>;
							phandle = <0xe7>;

							ethernet-phy@0 {
								reg = <0x00>;
								phandle = <0x54>;
							};
						};

						cpts {
							clocks = <0x50>;
							clock-names = "cpts";
						};
					};
				};

				target-module@180000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x180000 0x20000>;
				};

				target-module@200000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x200000 0x80000>;
				};

				target-module@300000 {
					compatible = "ti,sysc-pruss\0ti,sysc";
					reg = <0x326000 0x04 0x326004 0x04>;
					reg-names = "rev\0sysc";
					ti,sysc-mask = <0x30>;
					ti,sysc-midle = <0x00 0x01 0x02>;
					ti,sysc-sidle = <0x00 0x01 0x02>;
					clocks = <0x57 0x00 0x00>;
					clock-names = "fck";
					resets = <0x09 0x01>;
					reset-names = "rstctrl";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x300000 0x80000>;
					status = "okay";
					phandle = <0xe8>;

					pruss@0 {
						compatible = "ti,am3356-pruss";
						reg = <0x00 0x80000>;
						#address-cells = <0x01>;
						#size-cells = <0x01>;
						ranges;
						pinctrl-names = "default";
						pinctrl-0 = <0x58>;
						phandle = <0xe9>;

						memories@0 {
							reg = <0x00 0x2000 0x2000 0x2000 0x10000 0x3000>;
							reg-names = "dram0\0dram1\0shrdram2";
							phandle = <0xea>;
						};

						cfg@26000 {
							compatible = "ti,pruss-cfg\0syscon";
							reg = <0x26000 0x2000>;
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							ranges = <0x00 0x26000 0x2000>;
							phandle = <0xeb>;

							clocks {
								#address-cells = <0x01>;
								#size-cells = <0x00>;

								iepclk-mux@30 {
									reg = <0x30>;
									#clock-cells = <0x00>;
									clocks = <0x17 0x59>;
									phandle = <0xec>;
								};
							};
						};

						serial@28000 {
							compatible = "ti,pruss-uart";
							reg = <0x28000 0x38>;
							clocks = <0x14>;
							interrupt-parent = <0x5a>;
							status = "disabled";
							phandle = <0xed>;
						};

						mii-rt@32000 {
							compatible = "ti,pruss-mii\0syscon";
							reg = <0x32000 0x58>;
							phandle = <0xee>;
						};

						interrupt-controller@20000 {
							compatible = "ti,pruss-intc";
							reg = <0x20000 0x2000>;
							interrupts = <0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b>;
							interrupt-names = "host_intr0\0host_intr1\0host_intr2\0host_intr3\0host_intr4\0host_intr5\0host_intr6\0host_intr7";
							interrupt-controller;
							#interrupt-cells = <0x03>;
							phandle = <0x5a>;
						};

						pru@34000 {
							compatible = "ti,am3356-pru";
							reg = <0x34000 0x2000 0x22000 0x400 0x22400 0x100>;
							reg-names = "iram\0control\0debug";
							firmware-name = "am335x-pru0-fw";
							phandle = <0xef>;
						};

						pru@38000 {
							compatible = "ti,am3356-pru";
							reg = <0x38000 0x2000 0x24000 0x400 0x24400 0x100>;
							reg-names = "iram\0control\0debug";
							firmware-name = "am335x-pru1-fw";
							phandle = <0xf0>;
						};

						mdio@32400 {
							compatible = "ti,davinci_mdio";
							reg = <0x32400 0x90>;
							clocks = <0x16>;
							clock-names = "fck";
							bus_freq = <0xf4240>;
							#address-cells = <0x01>;
							#size-cells = <0x00>;
							status = "disabled";
							phandle = <0xf1>;
						};
					};
				};
			};
		};

		interconnect@4b140000 {
			compatible = "ti,am33xx-l4-mpuss\0simple-bus";
			reg = <0x4b144400 0x100 0x4b144800 0x400>;
			reg-names = "la\0ap";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x4b140000 0x8000>;
			phandle = <0xf2>;

			segment@0 {
				compatible = "simple-bus";
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				ranges = <0x4800 0x4800 0x400 0x1000 0x1000 0x1000 0x2000 0x2000 0x1000 0x4000 0x4000 0x400 0x5000 0x5000 0x400 0x00 0x00 0x1000 0x3000 0x3000 0x1000 0x800 0x800 0x800>;

				target-module@0 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x00 0x1000 0x1000 0x1000 0x1000 0x2000 0x2000 0x1000>;
				};

				target-module@3000 {
					compatible = "ti,sysc";
					status = "disabled";
					#address-cells = <0x01>;
					#size-cells = <0x01>;
					ranges = <0x00 0x3000 0x1000>;
				};
			};
		};

		interrupt-controller@48200000 {
			compatible = "ti,am33xx-intc";
			interrupt-controller;
			#interrupt-cells = <0x01>;
			reg = <0x48200000 0x1000>;
			phandle = <0x01>;
		};

		target-module@49000000 {
			compatible = "ti,sysc-omap4\0ti,sysc";
			reg = <0x49000000 0x04>;
			reg-names = "rev";
			clocks = <0x07 0x98 0x00>;
			clock-names = "fck";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x49000000 0x10000>;

			dma@0 {
				compatible = "ti,edma3-tpcc";
				reg = <0x00 0x10000>;
				reg-names = "edma3_cc";
				interrupts = <0x0c 0x0d 0x0e>;
				interrupt-names = "edma3_ccint\0edma3_mperr\0edma3_ccerrint";
				dma-requests = <0x40>;
				#dma-cells = <0x02>;
				ti,tptcs = <0x5b 0x07 0x5c 0x05 0x5d 0x00>;
				ti,edma-memcpy-channels = <0x14 0x15>;
				phandle = <0x24>;
			};
		};

		target-module@49800000 {
			compatible = "ti,sysc-omap4\0ti,sysc";
			reg = <0x49800000 0x04 0x49800010 0x04>;
			reg-names = "rev\0sysc";
			ti,sysc-mask = <0x01>;
			ti,sysc-midle = <0x00>;
			ti,sysc-sidle = <0x00 0x02>;
			clocks = <0x07 0x00 0x00>;
			clock-names = "fck";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x49800000 0x100000>;

			dma@0 {
				compatible = "ti,edma3-tptc";
				reg = <0x00 0x100000>;
				interrupts = <0x70>;
				interrupt-names = "edma3_tcerrint";
				phandle = <0x5b>;
			};
		};

		target-module@49900000 {
			compatible = "ti,sysc-omap4\0ti,sysc";
			reg = <0x49900000 0x04 0x49900010 0x04>;
			reg-names = "rev\0sysc";
			ti,sysc-mask = <0x01>;
			ti,sysc-midle = <0x00>;
			ti,sysc-sidle = <0x00 0x02>;
			clocks = <0x07 0xd8 0x00>;
			clock-names = "fck";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x49900000 0x100000>;

			dma@0 {
				compatible = "ti,edma3-tptc";
				reg = <0x00 0x100000>;
				interrupts = <0x71>;
				interrupt-names = "edma3_tcerrint";
				phandle = <0x5c>;
			};
		};

		target-module@49a00000 {
			compatible = "ti,sysc-omap4\0ti,sysc";
			reg = <0x49a00000 0x04 0x49a00010 0x04>;
			reg-names = "rev\0sysc";
			ti,sysc-mask = <0x01>;
			ti,sysc-midle = <0x00>;
			ti,sysc-sidle = <0x00 0x02>;
			clocks = <0x07 0xdc 0x00>;
			clock-names = "fck";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x49a00000 0x100000>;

			dma@0 {
				compatible = "ti,edma3-tptc";
				reg = <0x00 0x100000>;
				interrupts = <0x72>;
				interrupt-names = "edma3_tcerrint";
				phandle = <0x5d>;
			};
		};

		target-module@47810000 {
			compatible = "ti,sysc-omap2\0ti,sysc";
			reg = <0x478102fc 0x04 0x47810110 0x04 0x47810114 0x04>;
			reg-names = "rev\0sysc\0syss";
			ti,sysc-mask = <0x307>;
			ti,sysc-sidle = <0x00 0x01 0x02>;
			ti,syss-mask = <0x01>;
			clocks = <0x3a 0xdc 0x00>;
			clock-names = "fck";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x47810000 0x1000>;

			mmc@0 {
				compatible = "ti,am335-sdhci";
				ti,needs-special-reset;
				interrupts = <0x1d>;
				reg = <0x00 0x1000>;
				status = "disabled";
				phandle = <0xf3>;
			};
		};

		target-module@47400000 {
			compatible = "ti,sysc-omap4\0ti,sysc";
			reg = <0x47400000 0x04 0x47400010 0x04>;
			reg-names = "rev\0sysc";
			ti,sysc-mask = <0x03>;
			ti,sysc-midle = <0x00 0x01 0x02>;
			ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
			clocks = <0x3a 0x00 0x00>;
			clock-names = "fck";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x47400000 0x8000>;
			phandle = <0xf4>;

			usb-phy@1300 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x1300 0x100>;
				reg-names = "phy";
				ti,ctrl_mod = <0x5e>;
				#phy-cells = <0x00>;
				phandle = <0x5f>;
			};

			usb@1400 {
				compatible = "ti,musb-am33xx";
				reg = <0x1400 0x400 0x1000 0x200>;
				reg-names = "mc\0control";
				interrupts = <0x12>;
				interrupt-names = "mc\0vbus";
				dr_mode = "peripheral";
				mentor,multipoint = <0x01>;
				mentor,num-eps = <0x10>;
				mentor,ram-bits = <0x0c>;
				mentor,power = <0x1f4>;
				phys = <0x5f>;
				dmas = <0x60 0x00 0x00 0x60 0x01 0x00 0x60 0x02 0x00 0x60 0x03 0x00 0x60 0x04 0x00 0x60 0x05 0x00 0x60 0x06 0x00 0x60 0x07 0x00 0x60 0x08 0x00 0x60 0x09 0x00 0x60 0x0a 0x00 0x60 0x0b 0x00 0x60 0x0c 0x00 0x60 0x0d 0x00 0x60 0x0e 0x00 0x60 0x00 0x01 0x60 0x01 0x01 0x60 0x02 0x01 0x60 0x03 0x01 0x60 0x04 0x01 0x60 0x05 0x01 0x60 0x06 0x01 0x60 0x07 0x01 0x60 0x08 0x01 0x60 0x09 0x01 0x60 0x0a 0x01 0x60 0x0b 0x01 0x60 0x0c 0x01 0x60 0x0d 0x01 0x60 0x0e 0x01>;
				dma-names = "rx1\0rx2\0rx3\0rx4\0rx5\0rx6\0rx7\0rx8\0rx9\0rx10\0rx11\0rx12\0rx13\0rx14\0rx15\0tx1\0tx2\0tx3\0tx4\0tx5\0tx6\0tx7\0tx8\0tx9\0tx10\0tx11\0tx12\0tx13\0tx14\0tx15";
				interrupts-extended = <0x01 0x12 0x61 0x00>;
				phandle = <0xf5>;
			};

			usb-phy@1b00 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x1b00 0x100>;
				reg-names = "phy";
				ti,ctrl_mod = <0x5e>;
				#phy-cells = <0x00>;
				phandle = <0x62>;
			};

			usb@1800 {
				compatible = "ti,musb-am33xx";
				reg = <0x1c00 0x400 0x1800 0x200>;
				reg-names = "mc\0control";
				interrupts = <0x13>;
				interrupt-names = "mc";
				dr_mode = "host";
				mentor,multipoint = <0x01>;
				mentor,num-eps = <0x10>;
				mentor,ram-bits = <0x0c>;
				mentor,power = <0x1f4>;
				phys = <0x62>;
				dmas = <0x60 0x0f 0x00 0x60 0x10 0x00 0x60 0x11 0x00 0x60 0x12 0x00 0x60 0x13 0x00 0x60 0x14 0x00 0x60 0x15 0x00 0x60 0x16 0x00 0x60 0x17 0x00 0x60 0x18 0x00 0x60 0x19 0x00 0x60 0x1a 0x00 0x60 0x1b 0x00 0x60 0x1c 0x00 0x60 0x1d 0x00 0x60 0x0f 0x01 0x60 0x10 0x01 0x60 0x11 0x01 0x60 0x12 0x01 0x60 0x13 0x01 0x60 0x14 0x01 0x60 0x15 0x01 0x60 0x16 0x01 0x60 0x17 0x01 0x60 0x18 0x01 0x60 0x19 0x01 0x60 0x1a 0x01 0x60 0x1b 0x01 0x60 0x1c 0x01 0x60 0x1d 0x01>;
				dma-names = "rx1\0rx2\0rx3\0rx4\0rx5\0rx6\0rx7\0rx8\0rx9\0rx10\0rx11\0rx12\0rx13\0rx14\0rx15\0tx1\0tx2\0tx3\0tx4\0tx5\0tx6\0tx7\0tx8\0tx9\0tx10\0tx11\0tx12\0tx13\0tx14\0tx15";
				phandle = <0xf6>;
			};

			dma-controller@2000 {
				compatible = "ti,am3359-cppi41";
				reg = <0x00 0x1000 0x2000 0x1000 0x3000 0x1000 0x4000 0x4000>;
				reg-names = "glue\0controller\0scheduler\0queuemgr";
				interrupts = <0x11>;
				interrupt-names = "glue";
				#dma-cells = <0x02>;
				#dma-channels = <0x1e>;
				dma-channels = <0x1e>;
				#dma-requests = <0x100>;
				dma-requests = <0x100>;
				phandle = <0x60>;
			};
		};

		target-module@40300000 {
			compatible = "ti,sysc-omap4-simple\0ti,sysc";
			clocks = <0x07 0x08 0x00>;
			clock-names = "fck";
			ti,no-idle;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x40300000 0x10000>;

			sram@0 {
				compatible = "mmio-sram";
				reg = <0x00 0x10000>;
				ranges = <0x00 0x00 0x10000>;
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				phandle = <0xf7>;

				pm-code-sram@0 {
					compatible = "ti,sram";
					reg = <0x00 0x1000>;
					protect-exec;
					phandle = <0x46>;
				};

				pm-data-sram@1000 {
					compatible = "ti,sram";
					reg = <0x1000 0x1000>;
					pool;
					phandle = <0x47>;
				};
			};
		};

		target-module@4c000000 {
			compatible = "ti,sysc-omap4-simple\0ti,sysc";
			reg = <0x4c000000 0x04>;
			reg-names = "rev";
			clocks = <0x07 0x04 0x00>;
			clock-names = "fck";
			ti,no-idle;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x4c000000 0x1000000>;

			emif@0 {
				compatible = "ti,emif-am3352";
				reg = <0x00 0x1000000>;
				interrupts = <0x65>;
				sram = <0x46 0x47>;
				phandle = <0xf8>;
			};
		};

		target-module@50000000 {
			compatible = "ti,sysc-omap2\0ti,sysc";
			reg = <0x50000000 0x04 0x50000010 0x04 0x50000014 0x04>;
			reg-names = "rev\0sysc\0syss";
			ti,sysc-sidle = <0x00 0x01 0x02>;
			ti,syss-mask = <0x01>;
			clocks = <0x3a 0x14 0x00>;
			clock-names = "fck";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x50000000 0x50000000 0x1000 0x00 0x00 0x40000000>;

			gpmc@50000000 {
				compatible = "ti,am3352-gpmc";
				reg = <0x50000000 0x2000>;
				interrupts = <0x64>;
				dmas = <0x24 0x34 0x00>;
				dma-names = "rxtx";
				gpmc,num-cs = <0x07>;
				gpmc,num-waitpins = <0x02>;
				#address-cells = <0x02>;
				#size-cells = <0x01>;
				interrupt-controller;
				#interrupt-cells = <0x02>;
				gpio-controller;
				#gpio-cells = <0x02>;
				status = "disabled";
				phandle = <0xf9>;
			};
		};

		target-module@53100000 {
			compatible = "ti,sysc-omap3-sham\0ti,sysc";
			reg = <0x53100100 0x04 0x53100110 0x04 0x53100114 0x04>;
			reg-names = "rev\0sysc\0syss";
			ti,sysc-mask = <0x03>;
			ti,sysc-sidle = <0x00 0x01 0x02>;
			ti,syss-mask = <0x01>;
			clocks = <0x07 0x7c 0x00>;
			clock-names = "fck";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x53100000 0x1000>;
			phandle = <0xfa>;

			sham@0 {
				compatible = "ti,omap4-sham";
				reg = <0x00 0x200>;
				interrupts = <0x6d>;
				dmas = <0x24 0x24 0x00>;
				dma-names = "rx";
				status = "okay";
				phandle = <0xfb>;
			};
		};

		target-module@53500000 {
			compatible = "ti,sysc-omap2\0ti,sysc";
			reg = <0x53500080 0x04 0x53500084 0x04 0x53500088 0x04>;
			reg-names = "rev\0sysc\0syss";
			ti,sysc-mask = <0x03>;
			ti,sysc-sidle = <0x00 0x01 0x02 0x03>;
			ti,syss-mask = <0x01>;
			clocks = <0x07 0x70 0x00>;
			clock-names = "fck";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x53500000 0x1000>;
			phandle = <0xfc>;

			aes@0 {
				compatible = "ti,omap4-aes";
				reg = <0x00 0xa0>;
				interrupts = <0x67>;
				dmas = <0x24 0x06 0x00 0x24 0x05 0x00>;
				dma-names = "tx\0rx";
				status = "okay";
				phandle = <0xfd>;
			};
		};

		target-module@56000000 {
			compatible = "ti,sysc-omap4\0ti,sysc";
			reg = <0x5600fe00 0x04 0x5600fe10 0x04>;
			reg-names = "rev\0sysc";
			ti,sysc-midle = <0x00 0x01 0x02>;
			ti,sysc-sidle = <0x00 0x01 0x02>;
			clocks = <0x63 0x04 0x00>;
			clock-names = "fck";
			power-domains = <0x64>;
			resets = <0x64 0x00>;
			reset-names = "rstctrl";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x56000000 0x1000000>;

			gpu@0 {
				compatible = "ti,am3352-sgx530\0img,sgx530";
				reg = <0x00 0x10000>;
				interrupts = <0x25>;
				phandle = <0xfe>;
			};
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>;
	};

	leds {
		pinctrl-names = "default";
		pinctrl-0 = <0x65>;
		compatible = "gpio-leds";

		led2 {
			label = "beaglebone:green:heartbeat";
			gpios = <0x28 0x15 0x00>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led3 {
			label = "beaglebone:green:mmc0";
			gpios = <0x28 0x16 0x00>;
			linux,default-trigger = "mmc0";
			default-state = "off";
		};

		led4 {
			label = "beaglebone:green:usr2";
			gpios = <0x28 0x17 0x00>;
			linux,default-trigger = "cpu0";
			default-state = "off";
		};

		led5 {
			label = "beaglebone:green:usr3";
			gpios = <0x28 0x18 0x00>;
			linux,default-trigger = "mmc1";
			default-state = "off";
		};
	};

	fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsd_fixed";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		phandle = <0x3f>;
	};

	clk_mcasp0_fixed {
		#clock-cells = <0x00>;
		compatible = "fixed-clock";
		clock-frequency = <0x1770000>;
		phandle = <0x66>;
	};

	clk_mcasp0 {
		#clock-cells = <0x00>;
		compatible = "gpio-gate-clock";
		clocks = <0x66>;
		enable-gpios = <0x28 0x1b 0x00>;
		phandle = <0x69>;
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "TI BeagleBone Black";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <0x67>;
		simple-audio-card,frame-master = <0x67>;
		status = "disabled";

		simple-audio-card,cpu {
			sound-dai = <0x68>;
			clocks = <0x69>;
			phandle = <0x67>;
		};

		simple-audio-card,codec {
			sound-dai = <0x6a>;
		};
	};

	hdmi {
		status = "disabled";
	};

	__symbols__ {
		mpu_gate = "/cpus/idle-states/mpu_gate";
		cpu0_opp_table = "/opp-table";
		ocp = "/ocp";
		l4_wkup = "/ocp/interconnect@44c00000";
		wkup_m3 = "/ocp/interconnect@44c00000/segment@100000/target-module@0/cpu@0";
		prcm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0";
		prcm_clocks = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks";
		clk_32768_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-32768";
		clk_rc32k_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-rc32k";
		virt_19200000_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-19200000";
		virt_24000000_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-24000000";
		virt_25000000_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-25000000";
		virt_26000000_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-26000000";
		tclkin_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-tclkin";
		dpll_core_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@490";
		dpll_core_x2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-x2";
		dpll_core_m4_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4@480";
		dpll_core_m5_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m5@484";
		dpll_core_m6_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m6@4d8";
		dpll_mpu_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@488";
		dpll_mpu_m2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-mpu-m2@4a8";
		dpll_ddr_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@494";
		dpll_ddr_m2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2@4a0";
		dpll_ddr_m2_div2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2-div2";
		dpll_disp_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@498";
		dpll_disp_m2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-disp-m2@4a4";
		dpll_per_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@48c";
		dpll_per_m2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2@4ac";
		dpll_per_m2_div4_wkupdm_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4-wkupdm";
		dpll_per_m2_div4_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4";
		clk_24mhz = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-24mhz";
		clkdiv32k_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clkdiv32k";
		l3_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3-gclk";
		pruss_ocp_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-pruss-ocp-gclk@530";
		mmu_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmu-fck-1@914";
		timer1_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer1-fck@528";
		timer2_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer2-fck@508";
		timer3_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer3-fck@50c";
		timer4_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer4-fck@510";
		timer5_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer5-fck@518";
		timer6_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer6-fck@51c";
		timer7_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer7-fck@504";
		usbotg_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-usbotg-fck-8@47c";
		dpll_core_m4_div2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4-div2";
		ieee5000_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-ieee5000-fck-1@e4";
		wdt1_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-wdt1-fck@538";
		l4_rtc_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4-rtc-gclk";
		l4hs_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4hs-gclk";
		l3s_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3s-gclk";
		l4fw_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4fw-gclk";
		l4ls_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4ls-gclk";
		sysclk_div_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-sysclk-div";
		cpsw_125mhz_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-125mhz-gclk";
		cpsw_cpts_rft_clk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-cpts-rft@520";
		gpio0_dbclk_mux_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-gpio0-dbclk-mux@53c";
		lcd_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-lcd-gclk@534";
		mmc_clk = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmc";
		gfx_fclk_clksel_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fclk-clksel";
		gfx_fck_div_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fck-div";
		sysclkout_pre_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-sysclkout-pre";
		clkout2_div_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2-div";
		clkout2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2";
		prcm_clockdomains = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clockdomains";
		per_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0";
		l4ls_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@38";
		l3s_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@1c";
		l3_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@24";
		l4hs_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@120";
		pruss_ocp_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@e8";
		cpsw_125mhz_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@0";
		lcdc_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@18";
		clk_24mhz_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@14c";
		wkup_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400";
		l4_wkup_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@0";
		l3_aon_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@14";
		l4_wkup_aon_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@b0";
		mpu_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600";
		mpu_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600/clock@0";
		l4_rtc_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800";
		l4_rtc_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800/clock@0";
		gfx_l3_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900";
		gfx_l3_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900/clock@0";
		l4_cefuse_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00";
		l4_cefuse_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00/clock@0";
		prm_per = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@c00";
		prm_wkup = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@d00";
		prm_mpu = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@e00";
		prm_device = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@f00";
		prm_rtc = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1000";
		prm_gfx = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1100";
		prm_cefuse = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1200";
		gpio0_target = "/ocp/interconnect@44c00000/segment@200000/target-module@7000";
		gpio0 = "/ocp/interconnect@44c00000/segment@200000/target-module@7000/gpio@0";
		uart0 = "/ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0";
		i2c0 = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0";
		tps = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24";
		dcdc1_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@0";
		dcdc2_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@1";
		dcdc3_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@2";
		ldo1_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@3";
		ldo2_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@4";
		ldo3_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@5";
		ldo4_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@6";
		baseboard_eeprom = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50";
		baseboard_data = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50/baseboard_data@0";
		tda19988 = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70";
		hdmi_0 = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70/ports/port@0/endpoint@0";
		tscadc = "/ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0";
		am335x_adc = "/ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0/adc";
		scm = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0";
		am33xx_pinmux = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800";
		user_leds_s0 = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/user_leds_s0";
		i2c0_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_i2c0_pins";
		i2c2_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_i2c2_pins";
		uart0_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_uart0_pins";
		clkout2_pin = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_clkout2_pin";
		cpsw_default = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/cpsw_default";
		cpsw_sleep = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/cpsw_sleep";
		davinci_mdio_default = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/davinci_mdio_default";
		davinci_mdio_sleep = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/davinci_mdio_sleep";
		mmc1_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_mmc1_pins";
		emmc_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_emmc_pins";
		nxp_hdmi_bonelt_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/nxp_hdmi_bonelt_pins";
		nxp_hdmi_bonelt_off_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/nxp_hdmi_bonelt_off_pins";
		mcasp0_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/mcasp0_pins";
		pru_cape_bone_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pru_cape_bone_pins";
		scm_conf = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0";
		phy_gmii_sel = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/phy-gmii-sel";
		scm_clocks = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks";
		sys_clkin_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sys-clkin-22@40";
		adc_tsc_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-adc-tsc-fck";
		dcan0_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan0-fck";
		dcan1_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan1-fck";
		mcasp0_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp0-fck";
		mcasp1_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp1-fck";
		smartreflex0_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex0-fck";
		smartreflex1_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex1-fck";
		sha0_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sha0-fck";
		aes0_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-aes0-fck";
		rng_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-rng-fck";
		ehrpwm0_tbclk = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm0-tbclk";
		ehrpwm1_tbclk = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm1-tbclk";
		ehrpwm2_tbclk = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm2-tbclk";
		usb_ctrl_mod = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/control@620";
		wkup_m3_ipc = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/wkup_m3_ipc@1324";
		edma_xbar = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/dma-router@f90";
		scm_clockdomains = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/clockdomains";
		timer1_target = "/ocp/interconnect@44c00000/segment@200000/target-module@31000";
		timer1 = "/ocp/interconnect@44c00000/segment@200000/target-module@31000/timer@0";
		wdt2 = "/ocp/interconnect@44c00000/segment@200000/target-module@35000/wdt@0";
		rtc = "/ocp/interconnect@44c00000/segment@200000/target-module@3e000/rtc@0";
		l4_per = "/ocp/interconnect@48000000";
		uart1 = "/ocp/interconnect@48000000/segment@0/target-module@22000/serial@0";
		uart2 = "/ocp/interconnect@48000000/segment@0/target-module@24000/serial@0";
		i2c1 = "/ocp/interconnect@48000000/segment@0/target-module@2a000/i2c@0";
		spi0 = "/ocp/interconnect@48000000/segment@0/target-module@30000/spi@0";
		mcasp0 = "/ocp/interconnect@48000000/segment@0/target-module@38000/mcasp@0";
		mcasp1 = "/ocp/interconnect@48000000/segment@0/target-module@3c000/mcasp@0";
		timer2_target = "/ocp/interconnect@48000000/segment@0/target-module@40000";
		timer2 = "/ocp/interconnect@48000000/segment@0/target-module@40000/timer@0";
		timer3 = "/ocp/interconnect@48000000/segment@0/target-module@42000/timer@0";
		timer4 = "/ocp/interconnect@48000000/segment@0/target-module@44000/timer@0";
		timer5 = "/ocp/interconnect@48000000/segment@0/target-module@46000/timer@0";
		timer6 = "/ocp/interconnect@48000000/segment@0/target-module@48000/timer@0";
		timer7 = "/ocp/interconnect@48000000/segment@0/target-module@4a000/timer@0";
		gpio1 = "/ocp/interconnect@48000000/segment@0/target-module@4c000/gpio@0";
		mmc1 = "/ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0";
		elm = "/ocp/interconnect@48000000/segment@0/target-module@80000/elm@0";
		mailbox = "/ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0";
		mbox_wkupm3 = "/ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0/mbox-wkup-m3";
		hwspinlock = "/ocp/interconnect@48000000/segment@0/target-module@ca000/spinlock@0";
		i2c2 = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0";
		cape_eeprom0 = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54";
		cape0_data = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54/cape_data@0";
		cape_eeprom1 = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55";
		cape1_data = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55/cape_data@0";
		cape_eeprom2 = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56";
		cape2_data = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56/cape_data@0";
		cape_eeprom3 = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57";
		cape3_data = "/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57/cape_data@0";
		spi1 = "/ocp/interconnect@48000000/segment@100000/target-module@a0000/spi@0";
		uart3 = "/ocp/interconnect@48000000/segment@100000/target-module@a6000/serial@0";
		uart4 = "/ocp/interconnect@48000000/segment@100000/target-module@a8000/serial@0";
		uart5 = "/ocp/interconnect@48000000/segment@100000/target-module@aa000/serial@0";
		gpio2 = "/ocp/interconnect@48000000/segment@100000/target-module@ac000/gpio@0";
		gpio3_target = "/ocp/interconnect@48000000/segment@100000/target-module@ae000";
		gpio3 = "/ocp/interconnect@48000000/segment@100000/target-module@ae000/gpio@0";
		dcan0 = "/ocp/interconnect@48000000/segment@100000/target-module@cc000/can@0";
		dcan1 = "/ocp/interconnect@48000000/segment@100000/target-module@d0000/can@0";
		mmc2 = "/ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0";
		epwmss0 = "/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0";
		ecap0 = "/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/pwm@100";
		eqep0 = "/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/counter@180";
		ehrpwm0 = "/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/pwm@200";
		epwmss1 = "/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0";
		ecap1 = "/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/pwm@100";
		eqep1 = "/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/counter@180";
		ehrpwm1 = "/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/pwm@200";
		epwmss2 = "/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0";
		ecap2 = "/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/pwm@100";
		eqep2 = "/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/counter@180";
		ehrpwm2 = "/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/pwm@200";
		lcdc = "/ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0";
		lcdc_0 = "/ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0/port/endpoint@0";
		rng = "/ocp/interconnect@48000000/segment@300000/target-module@10000/rng@0";
		l4_fw = "/ocp/interconnect@47c00000";
		l4_fast = "/ocp/interconnect@4a000000";
		mac = "/ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0";
		davinci_mdio = "/ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/mdio@1000";
		cpsw_emac0 = "/ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/slave@200";
		cpsw_emac1 = "/ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/slave@300";
		mac_sw = "/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0";
		cpsw_port1 = "/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@1";
		cpsw_port2 = "/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@2";
		davinci_mdio_sw = "/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000";
		ethphy0 = "/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000/ethernet-phy@0";
		pruss_tm = "/ocp/interconnect@4a000000/segment@0/target-module@300000";
		pruss = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0";
		pruss_mem = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/memories@0";
		pruss_cfg = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000";
		pruss_iepclk_mux = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000/clocks/iepclk-mux@30";
		pruss_uart = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/serial@28000";
		pruss_mii_rt = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mii-rt@32000";
		pruss_intc = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/interrupt-controller@20000";
		pru0 = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@34000";
		pru1 = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@38000";
		pruss_mdio = "/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mdio@32400";
		l4_mpuss = "/ocp/interconnect@4b140000";
		intc = "/ocp/interrupt-controller@48200000";
		edma = "/ocp/target-module@49000000/dma@0";
		edma_tptc0 = "/ocp/target-module@49800000/dma@0";
		edma_tptc1 = "/ocp/target-module@49900000/dma@0";
		edma_tptc2 = "/ocp/target-module@49a00000/dma@0";
		mmc3 = "/ocp/target-module@47810000/mmc@0";
		usb = "/ocp/target-module@47400000";
		usb0_phy = "/ocp/target-module@47400000/usb-phy@1300";
		usb0 = "/ocp/target-module@47400000/usb@1400";
		usb1_phy = "/ocp/target-module@47400000/usb-phy@1b00";
		usb1 = "/ocp/target-module@47400000/usb@1800";
		cppi41dma = "/ocp/target-module@47400000/dma-controller@2000";
		ocmcram = "/ocp/target-module@40300000/sram@0";
		pm_sram_code = "/ocp/target-module@40300000/sram@0/pm-code-sram@0";
		pm_sram_data = "/ocp/target-module@40300000/sram@0/pm-data-sram@1000";
		emif = "/ocp/target-module@4c000000/emif@0";
		gpmc = "/ocp/target-module@50000000/gpmc@50000000";
		sham_target = "/ocp/target-module@53100000";
		sham = "/ocp/target-module@53100000/sham@0";
		aes_target = "/ocp/target-module@53500000";
		aes = "/ocp/target-module@53500000/aes@0";
		gpu = "/ocp/target-module@56000000/gpu@0";
		vmmcsd_fixed = "/fixedregulator0";
		clk_mcasp0_fixed = "/clk_mcasp0_fixed";
		clk_mcasp0 = "/clk_mcasp0";
		dailink0_master = "/sound/simple-audio-card,cpu";
	};
};

Hello Ilya,

You can attach a file to the e2e thread like this: Insert > Image/video/file > click the button that says "upload" in grey font. This will open a window to select the file.

If it is not too much effort, can I get you to attach the file to the e2e thread? google drive is blocked on work computers, so I'd need to review the code on my personal computer for google drive.

Regards,

Nick

Hi Nick,

Ah I see, I missed the gray upload text is also a button. Upload fails if selecting the individual files so zip of the files is attached instead. 

Thank you!

device_tree_am335x-boneblack.zip

Hello Ilya,

Hmm. Off the top of my head I do not see anything obviously wrong with your devicetree files. It looks like the pruss devicetree node retains the same name between SDK 8.2 and SDK 9.1, so I would not expect that to cause any issues.

To confirm, you do NOT see lights on the beaglebone black PRU cape start blinking at a rate of once a second after you start running the PRU firmware?

I have not tried the steps from the older PRU Hands-On labs on SDK 9.1, but I would still expect them to work. And what you are trying to do is pretty much exactly what we document there: https://software-dl.ti.com/processor-sdk-linux/esd/AM335X/08_02_00_24/exports/docs/common/PRU-ICSS/PRU-Hands-on-Labs.html

Also, for future readers: The PRU cape resources are now hiding inside the AM335x Linux SDK docs here:
https://software-dl.ti.com/processor-sdk-linux/esd/AM335X/08_02_00_24/exports/docs/common/PRU-ICSS/PRU-Cape-Hardware-User-Guide.html

Regards,

Nick

If you can connect CCS to the PRU core during runtime as we discussed above, that could at least give you the ability to watch the code run in real time.

The next step in debugging signals coming out would be to double-check the actual register value of the pinmux register to make sure that the devicetree software settings are actually getting reflected in hardware.

Regards,

Nick

Hi Nick,

Using CCS to debug I hit this issue below:

Ilya Sandler said:

I moved PRU_gpioToggle.out to the target and attempted to load the PRU binary using the steps below and just did Run > Load > Load Symbols in CCS. This results in CCS debug session jumping into _c_int00_noinit_noargs() in boot.c. I also tried adding the while loop shown in the example you linked, but the result is the same.

Thanks,

Blinking lights

1) Could I get you to confirm that you do NOT see any blinking lights on the PRU cape after you start running the PRU firmware? (this is assuming you are still toggling every PRU GPO output with __R30 ^= gpio = 0xFFFFFFFF;)

CCS connection

2) On the CCS connect, did you try stepping through the code? Did it go somewhere expected after that? What about if you tried to reset the PRU core?

Devicetree / pinmuxing validation

First check the kernel debugfs to verify if the padconfig registers are set correctly. If not, check sysfs devicetree to see if the pinmux is correct in kernel dtb that was applied at boot time.

Here I am validating the I2C0 settings on my evm:

For my AM335x I2C0 example, I know the control module starts at 0x44E1_0000, and the pinmux offsets are 0x988 & 0x98C:
linux-sdk$ grep -r AM335X_PIN_I2C0_SDA
...
include/dt-bindings/pinctrl/am33xx.h:#define AM335X_PIN_I2C0_SDA                      0x988
linux-sdk$ grep -r '#define AM335X_PIN_I2C0_SCL'
include/dt-bindings/pinctrl/am33xx.h:#define AM335X_PIN_I2C0_SCL                        0x98c

And I can verify the pinmux setting on the EVM here:
# cd /sys/kernel/debug/pinctrl/
root@am335x-evm:/sys/kernel/debug/pinctrl# ls
44e10800.pinmux-pinctrl-single  44e3e000.rtc  pinctrl-devices  pinctrl-handles  pinctrl-maps
root@am335x-evm:/sys/kernel/debug/pinctrl# cd 44e10800.pinmux-pinctrl-single/
root@am335x-evm:/sys/kernel/debug/pinctrl/44e10800.pinmux-pinctrl-single# ls
gpio-ranges  pingroups  pinmux-functions  pinmux-pins  pinmux-select  pins
root@am335x-evm:/sys/kernel/debug/pinctrl/44e10800.pinmux-pinctrl-single# cat pins
registered pins: 142
...
pin 98 (PIN98) 5:gpio-64-95 44e10988 00000030 pinctrl-single
pin 99 (PIN99) 6:gpio-64-95 44e1098c 00000030 pinctrl-single

It looks like the PRU pinmux settings are given relative to a 0x800 offset. So for example, 0x1a4 register offset in your devicetree would translate to 0x9a4 address above.

Let's compare that against the raw register values in the devicetree file settings that are getting applied at boot time:

// the devicetree settings that are actually applied are here:
root@am335x-evm:~# cd /sys/firmware/devicetree/base/

// let's figure out where the pinmux devicetree node is
root@am335x-evm:/sys/firmware/devicetree/base# cd __symbols__/
root@am335x-evm:/sys/firmware/devicetree/base/__symbols__# cat i2c0_pins
/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_i2c0_pins

root@am335x-evm:/sys/firmware/devicetree/base/__symbols__# cd ..
root@am335x-evm:/sys/firmware/devicetree/base# cd ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_i2c0_pins
// I'll shorten my path to just "pinmux_i2c0_pins" for ease of reading 
pinmux_i2c0_pins# ls
name  phandle  pinctrl-single,pins
pinmux_i2c0_pins# hexdump -C pinctrl-single,pins
00000000  00 00 01 88 00 00 00 30  00 00 00 00 00 00 01 8c  |.......0........|
00000010  00 00 00 30 00 00 00 00                           |...0....|
00000018  

Based on the register value earlier, it seems like the AM335x dtb hexdump is of the format

[32 bits for address offset from 0x800] [32 bits for pinmux value] [32 bits of 0s]

Regards,

Nick

Hi Nick,

1) I do not have a physical PRU CAP, I have been validating using an oscilloscope. I see GPO pins toggling if starting the PRU via CCS with GEL scripts. Same .out file started from linux does nothing.  

Ilya Sandler said:

I am able to load, debug and verify the GPO toggling on P9_29 using the CCS method described in the SDK

Ilya Sandler said:

I went ahead and removed CCS entirely from the setup and still do not observe P9_29 toggling if starting PRU_gpioToggle.out from the target.

2) Stepping into and over does not do anything or print any errors in the CCS console. Pressing restart in CCS returns this error in the console:

PRU_0: Trouble Setting Breakpoint with the Action "Finish Auto Run" at 0x1c: (Error -1066 @ 0x1C) Unable to set/clear requested breakpoint. Verify that the breakpoint address is in valid memory. (Emulation package 12.8.0.00189)

I have also tried compiling using "make pru-icss" and loading that into the PRU as well as using this .out for loading symbols for CCS debug session.

3) I will try out the steps for the device tree validation and report back.

Thank you,

Hello Ilya,

CCS debug

Hmm. Off the top of my head I am not sure what the CCS outputs might be telling us. If you want to dig into figuring out the CCS debug, feel free to create a second thread and we can send that to the CCS team while we continue discussing other stuff on this thread.

One thing to note on the CCS debug: I would use the EXACT same PRU project in CCS as on the EVM, just in case. e.g., build the PRU program in CCS, and copy the .out file over to the Linux filesystem. I am not entirely sure how the symbols mapping works, but I have seen issues where people built a binary with a makefile separately from CCS, copied the makefile binary into the Linux filesystem, and then built the project a second time in CCS and tried to connect symbols.

Pinmux verification 

Looking forward to seeing the results!

Regards,

Nick

Hi Nick,

1. Regarding the issues with updating the device tree based on instructions in the SDK user guide. I did a simple test, I deleted all the .dtb files found on rootfs partition of the SD card and the boot logs are identical. Can you please clarify again which device tree file needs to be replaced? In the 09.01.00.001 of the SDK, the prebuilt images create .dtb files that are in /boot partition and also in /rootfs/boot/. It is clear that the steps listed by the latest SDK guide are incorrect because the new device tree changes are NOT getting applied. Bin Liu confirmed that the correct location is actually the /boot partition is this thread: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1438652/processor-sdk-am335x-stock-sdk-settings-for-am335x_evm_defconfig-not-booting-on-beaglebone-black
2. Below are the steps I followed based on “3.5.2.7.5.4. Modify Device Tree Files to Account for PRU Cape,” but instead I placed the new .dtb into the /boot partition. It can be observed that pinmux fails to apply the changes at 12.7 seconds of the boot log shown below:
   • Create SD card image using prebuild image tisdk-base-image-am335x-evm.tar.xz
   • Removed all device trees from /boot partition
     • sudo rm /media/engr/boot/*.dtb
   • Removed all device trees from /rootfs partition
     • sudo rm /media/engr/rootfs/boot/dtb/*.dtb
   • Copy the included example am335x-boneblack-prucape.dtsi
     • cp example-applications/pru-icss-6.2.0/pru_cape/am335x-boneblack-prucape.dtsi board-support/ti-linux-kernel-6.1.46+gitAUTOINC+ccf548983b-gccf548983b/arch/arm/boot/dts
   • Add #include "am335x-boneblack-prucape.dtsi" to bottom of am335x-boneblack.dts
   • Generate new .dtb
     • make linux-dtbs
   • Copy the .dtb to the SD card
     • sudo cp board-support/ti-linux-kernel-6.1.46+gitAUTOINC+ccf548983b-gccf548983b/arch/arm/boot/dts/am335x-boneblack.dtb /media/engr/boot
   • Build PRU_gpioToggle project
     • make pru-icss
   • Copy project file to SD card
     • sudo cp example-applications/pru-icss-6.2.0/examples/am335x/PRU_gpioToggle/gen/PRU_gpioToggle.out /media/engr/rootfs/lib/firmware/
   • Boot SD card

     • [    0.000000] Booting Linux on physical CPU 0x0
       [    0.000000] Linux version 6.1.46-rt13-gccf548983b (oe-user@oe-host) (arm-oe-linux-gnueabi-gcc (GCC) 11.4.0, GNU ld (GNU Binutils) 2.38.20220708) #1 PREEMPT_RT Thu Oct 19 10:23:11 UTC 2023
       [    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
       [    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
       [    0.000000] OF: fdt: Machine model: TI AM335x BeagleBone Black
       [    0.000000] earlycon: omap8250 at MMIO 0x44e09000 (options '')
       [    0.000000] printk: bootconsole [omap8250] enabled
       [    0.000000] Memory policy: Data cache writeback
       [    0.000000] efi: UEFI not found.
       [    0.000000] cma: Reserved 64 MiB at 0x9b800000
       [    0.000000] Zone ranges:
       [    0.000000]   Normal   [mem 0x0000000080000000-0x000000009fdfffff]
       [    0.000000]   HighMem  empty
       [    0.000000] Movable zone start for each node
       [    0.000000] Early memory node ranges
       [    0.000000]   node   0: [mem 0x0000000080000000-0x000000009fdfffff]
       [    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x000000009fdfffff]
       [    0.000000] CPU: All CPU(s) started in SVC mode.
       [    0.000000] AM335X ES2.1 (sgx neon)
       [    0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
       [    0.000000] pcpu-alloc: [0] 0 
       [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 129540
       [    0.000000] Kernel command line: root=PARTUUID=5a6f421f-02 rootwait rw earlycon console=ttyO0,115200n8,115200
       [    0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
       [    0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes, linear)
       [    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
       [    0.000000] Memory: 433552K/522240K available (11264K kernel code, 1469K rwdata, 3224K rodata, 1024K init, 297K bss, 23152K reserved, 65536K cma-reserved, 0K highmem)
       [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
       [    0.000000] trace event string verifier disabled
       [    0.000000] rcu: Preemptible hierarchical RCU implementation.
       [    0.000000] rcu:     RCU event tracing is enabled.
       [    0.000000] rcu:     RCU priority boosting: priority 1 delay 500 ms.
       [    0.000000] rcu:     RCU_SOFTIRQ processing moved to rcuc kthreads.
       [    0.000000]  No expedited grace period (rcu_normal_after_boot).
       [    0.000000]  Trampoline variant of Tasks RCU enabled.
       [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
       [    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
       [    0.000000] IRQ: Found an INTC at 0x(ptrval) (revision 5.0) with 128 interrupts
       [    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
       [    0.000000] TI gptimer clocksource: always-on /ocp/interconnect@44c00000/segment@200000/target-module@31000
       [    0.000002] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
       [    0.000025] clocksource: dmtimer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
       [    0.000451] TI gptimer clockevent: 24000000 Hz at /ocp/interconnect@48000000/segment@0/target-module@40000
       [    0.002201] Console: colour dummy device 80x30
       
       [   10.858609] l4-rtc-clkctrl:0000:0: failed to enable
       [   10.860271] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec
       [   10.905860] am335x-phy-driver 47401300.usb-phy: supply vcc not found, using dummy regulator
       [   10.906201] am335x-phy-driver 47401300.usb-phy: dummy supplies not allowed for exclusive requests
       [   10.919401] am335x-phy-driver 47401b00.usb-phy: supply vcc not found, using dummy regulator
       [   10.919725] am335x-phy-driver 47401b00.usb-phy: dummy supplies not allowed for exclusive requests
       [   10.920703] omap_rtc 44e3e000.rtc: registered as rtc0
       [   10.921402] omap_rtc 44e3e000.rtc: setting system clock to 2000-01-01T00:00:00 UTC (946684800)
       [   10.945895] systemd-journald[111]: Time jumped backwards, rotating.
       [   11.274581] musb-hdrc musb-hdrc.1: MUSB HDRC host driver
       [   11.274662] musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 1
       [   11.275791] hub 1-0:1.0: USB hub found
       [   11.275851] hub 1-0:1.0: 1 port detected
       [   12.700780] pinctrl-single 44e10800.pinmux: pin PIN1 already requested by 481d8000.mmc; cannot claim for 4a300000.pruss
       [   12.700809] pinctrl-single 44e10800.pinmux: pin-1 (4a300000.pruss) status -22
       [   12.700820] pinctrl-single 44e10800.pinmux: could not request pin 1 (PIN1) from group pru_cape_bone_pins  on device pinctrl-single
       [   12.700833] pruss 4a300000.pruss: Error applying setting, reverse things back
       [   23.500801] cfg80211: Loading compiled-in X.509 certificates for regulatory database
       [   23.673563] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
       [   23.673919] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
       [   23.673946] cfg80211: failed to load regulatory.db
       [   23.816454] cpsw-switch 4a100000.switch: starting ndev. mode: dual_mac
       [   23.945491] SMSC LAN8710/LAN8720 4a101000.mdio:00: attached PHY driver (mii_bus:phy_addr=4a101000.mdio:00, irq=POLL)
       [   27.125163] cpsw-switch 4a100000.switch eth0: Link is Up - 100Mbps/Full - flow control off
       [   27.125236] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
       [   60.842218] systemd-journald[111]: Oldest entry in /run/log/journal/a8075a2aeecc4e8d84edf8ba5bb6204f/system.journal is older than the configured file retention duration (1month), suggesting rotation.
       [   60.842270] systemd-journald[111]: /run/log/journal/a8075a2aeecc4e8d84edf8ba5bb6204f/system.journal: Journal header limits reached or header out-of-date, rotating.
       

3. Since it is quite evident that these guides have not been tested and checked in years I went ahead and downgraded to version 07.03.00.005 of the SDK. Version 08.02.00.24 also has similar issues as 09.01.00.001. In version 07.03.00.005, the correct location for the active device tree does match the guide steps and is located in /rootfs/boot/. I followed the same steps and finally the basic example of toggling the GPO pins functions correctly.
   • Now that I validated that the PRU example device tree overlay gets accepted in this version of the SDK, I went ahead and created my own .dtsi shown below.

     • &pruss {
       	pinctrl-names = "default";
       	pinctrl-0 = <&pru_cape_bone_pins>;
       };
       
       &am33xx_pinmux {
             pru_cape_bone_pins: pru_cape_bone_pins {
       		pinctrl-single,pins = <
                         AM33XX_PADCONF(0x890, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P8_07 gpio2_2 */
                         AM33XX_PADCONF(0x894, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P8_08 gpio2_3 */
                         AM33XX_PADCONF(0x89c, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P8_09 gpio2_5 */
                         AM33XX_PADCONF(0x898, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P8_10 gpio2_4 */
                         AM33XX_PADCONF(0x834, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P8_11 gpio1_13 */
                         AM33XX_PADCONF(0x830, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P8_12 gpio1_12 */
                         AM33XX_PADCONF(0x824, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P8_13 gpio0_23 */
                         AM33XX_PADCONF(0x828, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P8_14 gpio0_26 */
                         AM33XX_PADCONF(0x83c, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P8_15 gpio1_15 */
                         AM33XX_PADCONF(0x838, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P8_16 gpio1_14 */
                         AM33XX_PADCONF(0x82c, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P8_17 gpio0_27 */
                         AM33XX_PADCONF(0x88c, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P8_18 gpio2_1 */
                         AM33XX_PADCONF(0x820, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P8_19 gpio0_22 */
                         AM33XX_PADCONF(0x87c, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P8_26 gpio1_29 */
       
                         AM33XX_PADCONF(0x840, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P9_15 gpio1_16 */
                         AM33XX_PADCONF(0x844, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P9_23 gpio1_17 */
                         AM33XX_PADCONF(0x9a4, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P9_27 gpio3_19 */
                         AM33XX_PADCONF(0x99c, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P9_28 gpio3_17 */
                         AM33XX_PADCONF(0x994, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P9_29 gpio3_15 */
                         AM33XX_PADCONF(0x998, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P9_30 gpio3_16 */
                         AM33XX_PADCONF(0x990, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* P9_31 gpio3_14 */
       		>;
       	};
       };
       
       /* Disable all HDMI related nodes due to pin mux conflicts with PRU Cape */
       &tda19988 {
       	status = "disabled";
       };
       
       &lcdc {
       	status = "disabled";
       };
       
       /{
       	hdmi {
       		status = "disabled";
       	};
       };
       
       &mcasp0 {
       	status = "disabled";
       };
       
       /{
       	sound {
       		status = "disabled";
       	};
       };

   • With this dtsi applied I can see that at least the PULL UP option is applied to all the required pins using an oscilloscope. Unfortunately, my original problem is still not solved since the PRU example at the top of the thread is not able to toggle the pin when the pins are allegedly set to Mode 7.
   • Below is the hexdump related to the .dtsi

     • root@am335x-evm:/sys/firmware/devicetree/base/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pru_cape_bone_pins# hexdump -C pinctrl-single,pins 
       00000000  00 00 00 90 00 00 00 17  00 00 00 94 00 00 00 17  |................|
       00000010  00 00 00 9c 00 00 00 17  00 00 00 98 00 00 00 17  |................|
       00000020  00 00 00 34 00 00 00 17  00 00 00 30 00 00 00 17  |...4.......0....|
       00000030  00 00 00 24 00 00 00 17  00 00 00 28 00 00 00 17  |...$.......(....|
       00000040  00 00 00 3c 00 00 00 17  00 00 00 38 00 00 00 17  |...<.......8....|
       00000050  00 00 00 2c 00 00 00 17  00 00 00 8c 00 00 00 17  |...,............|
       00000060  00 00 00 20 00 00 00 17  00 00 00 7c 00 00 00 17  |... .......|....|
       00000070  00 00 00 40 00 00 00 17  00 00 00 44 00 00 00 17  |...@.......D....|
       00000080  00 00 01 a4 00 00 00 17  00 00 01 9c 00 00 00 17  |................|
       00000090  00 00 01 94 00 00 00 17  00 00 01 98 00 00 00 17  |................|
       000000a0  00 00 01 90 00 00 00 17                           |........|

I would like to emphasize that my original goal was to debug the PRU via CCS. At this point I just need to simply add a device tree overlay that sets X pins to mode 7 and have the PRU control them through the OCP. Can someone please help with getting this working?

Thank you,

Hello,

Apologies, late night and I will not have time to read the full response today.

I forgot you are using beaglebone black. Did you make sure that you are loading the filesystem off of the SD card, not the onboard EMMC? You can either hold down the button to avoid EMMC boot, or you can just clear the EMMC (that's what I did because I got tired of holding down the button). Details here: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/937973/beaglebk-powering-up-issues/3467335#3467335

Regards,

Nick

Hi Nick,

Yes, the EMMC was erased before any testing was done.

Thank you,

Hello Ilya,

Apologies for the delayed responses here. I hope you were able to make progress in the meantime.

Those pinmux settings are not correct if you want to use the PRU GPI / PRU GPO signals (different from the GPIO module signals). There aren't any PRU GPI or PRU GPO signals on muxmode 7.

You can refer to the specific muxmodes used here:
https://git.ti.com/cgit/pru-software-support-package/pru-software-support-package/tree/pru_cape/am335x-boneblack-prucape.dtsi

Regards,

Nick