Hello Shathira Lakdilu

Thank you for the query.

I do not know the custom board architecture. if you share the schematics, i can provide focused guidance.

Can you confirm the SK you used.

Refer below FAQ as a starting point 

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1358039/faq-board-bring-up-tips-for-sitara-devices-am64x-am243x-am62x-am62ax-am62px

Refer below documents 

Recommended References for review and design of custom board
AM62X
Hardware Design Considerations
www.ti.com/.../sprad05b.pdf
Schematic Design and Review Checklist
www.ti.com/.../sprad21c.pdf
DDR Board Design and Layout Guidelines
www.ti.com/.../sprad06.pdf
Frequently Asked Questions FAQs
e2e.ti.com/.../faq-custom-board-hardware-design---master-complete-list-of-faqs-for-all-sitara-processor-am62x-am64x-am243x-am335x-families
e2e.ti.com/.../faq-am625-am623-am625sip-am625-q1-am620-q1-custom-board-hardware-design---faqs-related-to-processor-collaterals-functioning-peripherals-interface-and-starter-kit
e2e.ti.com/.../faq-am625-am623-custom-board-hardware-design---design-and-review-notes-for-reuse-of-sk-am62b-schematics
e2e.ti.com/.../faq-am625-am623-custom-board-hardware-design---design-and-review-notes-for-reuse-of-sk-am62b-p1-schematics
e2e.ti.com/.../faq-am625-q1-am620-q1-custom-board-hardware-design---design-and-review-notes-for-reuse-of-sk-am62-lp-schematics
e2e.ti.com/.../faq-am625sip---custom-board-hardware-design---design-and-review-notes-for-reuse-of-sk-am62-sip-schematics
e2e.ti.com/.../faq-am62x-am64x-custom-board-hardware-design-how-to-handle-used-unused-pins-peripherals-e-g-gpios-serdes-usb-csi-mmc-emmc-sd-card-csi-oldi-dsi

Downloadable design files on TI.com list for SK
SK-AM62B-P1 Design Package Content Overview (Rev. A)
www.ti.com/.../sprt777
SK-AM62-LP Design Package Content Overview
www.ti.com/.../sprt778
SK-AM62B Design Package Folder and Files List
www.ti.com/.../sprt784
SK-AM62-SIP Design Package Folder and Files List
www.ti.com/.../sprt785

AM625SIP
https://www.ti.com/lit/ds/symlink/am625sip.pdf

Regards,

Sreenivasa

Hi Sreenivasa,

Unfortunately, I can't share the schematics online. If you could send me your e mail, I can share. 

This is the SK I used. It goes like AM62x SKEVM PROC114E3. I have set the boot mode to sd card boot mode. and removed the resistors as in the SK. when I view the terminal of SOC_UART0_TX_3V3 through putty it prints something like this

Hello Shathira Lakdilu

Thank you for the inputs.

Please refer below FAQ.

I have schematics attached with design notes.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1357533/faq-am625-am623-custom-board-hardware-design---design-and-review-notes-for-reuse-of-sk-am62b-schematics

Please review the sections you have used.

Do you use crystal or oscillator.

I case you used discrete power architecture, refer to the MCU_PORz related delay.

We have a way to send the schematics privately if you prefer to share.

You could use private chat.

Regards,

Sreenivasa

Hi. thank you for the reply. I have attached the schematics in the private message. can i know what do you mean by MCU_PORz delay. it stays high after powering on.
Thank you.

Hello Shathira Lakdilu

Thank you for the inputs.

Can you confirm if the schematics shared is partial or full for the custom board.

Regards,

Sreenivasa

It's the full schematic. But I have found some issues and modified it in the hardware wise. I have also removed some resistors by referring the starter kit. I have removed 

R202, R203, R238, R239, R240, R241, R208, R243, R244, R211, R246, R247, R248, R249, R250, R251 resistors to sed the bootmode on SD_BOOT_MODE. But the VSEL_SD is pulled up. so its always high. but in the SK it goes low after few seconds on power up. So the Vout of LDO in SD card goes to 1.8V from 3.3V. but in my custom design it stays 3.3V. and VSEL_SD won't go low.
Thank you.

Hello Shathira Lakdilu

Thank you.

Please do not power the board.

I will mark the schematics with what i can quickly see.

You can compare the changes and, make any possible updates and try testing.

Regards,

Sreenivasa

Hello Shathira Lakdilu

I have marked 20+ updates and shared the schematics.

Please review and make the updates before testing.

Also review the D-Notes and DNIs in the schematics that i have attached in the FAQ that i referenced above.

Regards,

Sreenivasa

Hi Sreenivasa,
I am currently referring the D notes. and thank you for the Updates. I'll review it and send you an update ASAP.
Regards, 
Shathira

Hello Shathira Lakdilu

Thank you.

Along with the D-Notes please review the R-Notes and make updates as required.

Regards,

Sreenivasa

Hi Sreenivasa,

I have removed the EMMC in the custom Board because of a soldering issue. I hope it doesn.t have an issue when booting ?
Regards,
Shathira

Hello Shathira Lakdilu

Dont see any concern. Make sure the eMMC is not configured as primary or secondary boot.

Regards,

Sreenivasa

Hi Sreenivasa,

In MCU Power on Reset logic, some of the inputs of the AND gate was not connected . So instead of the PULLUP resistor, I have removed the PULLDOWN resistor. So MCU_PORz keeps high in the powerup. Is it an issue?

Regards,
Shathira

Hello Shathira Lakdilu

Thank you.

I assume you followed the Pro114 and looks like this is not the case.

Pulling MCU_PORz is not an allowed or recommended option.

The MCU_PORz is expected to be held low during power supply ramp and go high with a delay equal to the oscillator settling time.

You may need to glue wire the circuit.

I also do not see a pullup for VDD_0V85_PG.

Refer the SK schematics.

This needs to be fixed.

Sreenivasa

Hi Sreenivasa,

Thank you for the reply. I will apply the Modifications to the hardware and see where it will go.

Regards,
Shathira

Hello Shathira Lakdilu

Thank you.

I assume you measured the power sequence and slew rate of the supply rails.

Please review the data sheet and make the required measurements.

Regards,

Sreenivasa

Hi Sreenivasa,

Here's what we did. we removed the AND gate IC in MCU Power on Reset and connected VDD_0V85_PG to MCU_PORz. then we removed PULLUP and PULLDOWN resistors in the output side of the AND gate. Then we PULLEDUP, VDD_0V85_PG to VCC_1V8. But still no console output. VSEL_SD remains in 3.3V. How to proceed from here?

Regards,
Shathira

Hello Shathira Lakdilu

Thank you.

VSEL SD will switch from 3.3V to 1.8V only after initial boot.

Can you verify f all the supplies and ang the clock is available.

You need to remove the crystal plus associated circuit and ensure the oscillator input is connected.

Can you probe the MCU_PORz signal. Can you probe clock plus MCU_PORz

The clock is required to be stable before the MCU_PORz is released.

Regards,

Sreenivasa

Hi Sreenivasa,

Thank you for the clarification. I removed R358 and R355 so the external oscillator will not be used.

Then i connected SOC_CLKIN and MCU_PORz to the logic analyzer. this is the output. I observed The clock is generating correctly but MCU_PORz keep toggling. Channel 5 is MCU_PORz. These are zoomed in photos of the same signal. how should I proceed?

Also when I probe the CLOCK to an Oscilloscope it is a sine wave. Is it correct?

Regards,
Shathira

Hello Shathira

Thank you.

MCU_PORz is input.

You will have to check the cause for toggling.

Is any input open or is any input toggling in case you are using the ANDing logic?

Regards,

Sreenivasa

Hello Shathira

Shathira Lakdilu said:

Also when I probe the CLOCK to an Oscilloscope it is a sine wave. Is it correct?

You need to share the expanded waveform.

Where are you measuring.

I suspect you are applying the oscillator output 

Regards,

Sreenivasa

Hi Sreenivasa,

Here I'm not using AND logic. VDD_0V85_PG is directly connected to MCU_PORz with A pullup to 1.8V.

Regards,
Shathira

Hello Shathira

Thank you.

Why would the PG toggle ?

Is the 0.85V output Ok.

Pls disconnect the PG input to MCU_PORz and measure the waveform.

This should be low during power-up and go high when 0.85V is Ok.

Connecting this may not work since a 9.5 ms delay needs to be provided for MCU_PORz to go high after all the supplies ramp and are stable.

Regards,

Sreenivasa

Hi Sreenivasa,

I think the issue is i viewed the signals through logic analyzer. when i view them in oscilloscope, MCU_PORz is in high after the power on.

Regards,
Shathira

Hello Shathira

Thank you.

Thank you.

is the clock configured for external oscillator?

Are you able to probe CLKOUT_OSC, HFOSC0_CLKOUT_32K, PORz_OUT and RESETSTATz outputs.

Please follow below FAQ

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1358039/faq-board-bring-up-tips-for-sitara-devices-am64x-am243x-am62x-am62ax-am62px

Regards,

Sreenivasa

Hi Sreenivasa,

Yes the clock is configured through this 

and the clock output is accurate.

Regards,
Shathira

Hi Sreenivasa,

Can I know is there any errors in the warm reset logic. the selected resistors were removed in the PCB.

Regards,
Shathira

Hi Sreenivasa,

Here's an update. I changed the secondary boot mode from no boot to UART. then the console is printing CCC. Then it can conclude that Secondary boot mode is working. But what I need is SD card Boot mode. Any guidance from here to get SD card bootmode up and running?

Regards,

Shathira 

Hello Shathira

Thank you.

Please verify if the SD card power supply load switch is ON and the 3.3V is supplies to the SD card.

Regards,

Sreenivasa

Hi Sreenivasa,

YES, load switch is ON and the 3.3V is supplying to the SD card.

While VSEL_SD is High, MMC1_CLK is in a high state. No clock pulses.

Regards,

Shathira

Hello Shathira

Thank you.

Please verify the bootmode.

You can use a pullup or pulldown to configure. Divider is not a requirement.

From the schematics, i cant make out the boot configuration.

Regards,

Sreenivasa

Hi Sreenivasa,

We have removed the selected resisters making sd card the Primary boot and UART the backup boot

Regards,

Shathira

Hello Shathira

Thank you.

Please share the Bootmode15..00 configuration.

Please verify the setting with the TRM or the EK user guide.

With the changes, did you make some progress.

Regards,

Sreenivasa

Hi Sreenivasa,

Here's the bootmode configuration,
BOOTMODE0 -1

BOOTMODE1 -1

BOOTMODE2 -0

BOOTMODE3 -0

BOOTMODE4 -0

BOOTMODE5 -0

BOOTMODE6 -1

BOOTMODE7 -0

BOOTMODE8 -0

BOOTMODE9 - 1

BOOTMODE10 -1

BOOTMODE11 -1

BOOTMODE12 -0

BOOTMODE13- 0

BOOTMODE14 -0

BOOTMODE15-0

I verified with the evm user guid and according to that this should set the ptimary boot mode as sd card and backup bootmode as UART. In the console it's printing "CCC" . according to that It's skipping SD card bootmode and jumping to backup.

Regards,

Shathira

Hello Shathira

Thank you.

I am not sure if there is some issues with the SD card or the image or hardware.

Please start a thread for software team to support with title as below as we review the hardware.

SK-AM62: Custom board design SD card boot software support

Regards,

Sreenivasa

Hi Sreenivasa,

Thank you for the support. will start a thread and let's see whether they can help us.

Regards,

Shathira

Hello Shathira

Thank you.

I assume the SD card has been prepared using the below procedure

https://dev.ti.com/tirex/content/tirex-product-tree/am62x-devtools/docs/am62x_skevm_quick_start_guide.html

Regards,

Sreenivasa

Hi Sreenivasa,

YES, and its booting in the SKEVM okay.

Regards,

Shathira

Hello Shathira

Thank you.

May be a hardware of power sequence issue.

You need to setup a 2 input ANDing logic with the0.85V PG as one input and the other input pulled up initially but resettable after power-up using a push button.

After the board powers first time, you may want to perform a push button reset to SOC.

Regards,

Sreenivasa

Hi Sreenivasa,

Here's what I don't understand. If there is a power sequence issue, why is it booting on UART mode. SOC recognizes the sd card is installed through SDCD pin. I don't understand why the VSEL_SD is not going low?

Regards,

Shathira

Hello Shathira

Thank you.

I do not have the hardware, and You are in the best position to debug. I can only provide guidance. 

The power sequence including the delay between supply ramp and MCU_PORz needs to be maintained as per the data sheet.

I assume you removed the pullup for the clock R90 and reduce R333 to 10K

The SD card interface starts with 3.3V and switches to 1.8V to support UHS-I speed.

Did you try on another board to verify if this is not a board specific issue.

Regards,

Sreenivasa

Hi Sreenivasa,

YES, I removed the pullup for the clock R90 and reduce R333 to 10K. I noticed MCU_PORz maintain at 3.3V after 2ms the MCU_OSC0_XI clock starts. Now I'm going to set a 2 input ANDing logic as you mentioned.

Regards,

Shathira

Hello Shathira

Thank you.

Regards,

Sreenivasa

Hi Sreenivasa,

I have probed 3V3_SYS (Orange) and MCU_PORz (BLUE). I observed MCU_PORz has a delay about 12ms. So I think It conclude the powerup sequence is as the data sheet. I have not set the ANDing logic and I don't think it is necessary as the MCU_PORz is acting as it should be. 

Regards,

Shathira

Hello Shathira

Thank you.

Please refer the below section for the recommended slew rate.

7.8.2 Fail-Safe Reset (FS RESET) Electrical Characteristics

If you believe there is not issues with the supply sequencing and all the recommended pulls have been p[opulated , it is likely an assembly issue.

Did you check on multiple boards and do you see the same issue ?

Do you see any initial activity of the MMC1 clock.

Regards,

Sreenivasa

Hi Sreenivasa,

There is no activity at all in MMC1 clock. I still have not check on multiple boards because we have only two boards with us. If there are no any improvements, I will move on to the next board.

I will refer Fail-Safe Reset (FS RESET) Electrical Characteristics now.

Regards,

Shathira

Hello Shathira

Thank you.

Please measure the boot configuration near to the SOC after the series resistors 

The SDCD input to SOC should be low.

Regards,

Sreenivasa

Hi Sreenivasa,

I measured the boot configuration near to the SOC after the series resistors and they are accurate.

Yes, SDCD is high without the SD card and when the SD card is inserted it becomes low.

Acceding to this,

When SDCD is 0 it should send CMD commands. But I dont see any changes mmc1 clock. 

Regards,

Shathira

Hello Shathira

Thank you.

Can you please measure VDDSHV5 on the SOC side after the ferrite.

Regards,

Sreenivasa

Hi Sreenivasa,

I measured the voltage in both side of the ferrite and its 3.288V.  In the capacitor it's also 3.288V.

Regards,

Shathira