Tool/software:
Hello,
We are currently developing a board with Linux embedded in using AM6442, and this board uses the PCIe function on AM6442. The PCIe on this board is designed to use an external reference clock as the common clock.
However, when we actually ported the Linux of ProcessorSDK 08.06.00.42 to this board and ran it, and looked at the output of lspci, the common clock was not enabled.
When we checked the driver source code, it looked like the common clock (CommClk) would be enabled if SlotClk is changed to SlotClk+ that exists lspci output.
How can we change SlotClk to SlotClk+?
Also, please tell us how to check the external reference clock setting accurately.
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■output of "lspci -vv" (LnkCtl -> CommClk and LnkSta -> SlotClk are “-”).
00:00.0 PCI bridge: Texas Instruments Device b010 (prog-if 00 [Normal decode])
...
Capabilities: [c0] Express (v2) Root Port (Slot+), MSI 00
...
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s (ok), Width x1 (ok)
TrErr- Train- SlotClk- DLActive- BWMgmt+ ABWMgmt-
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We set the PCIe external reference clock using the following E2E post as a reference.
Are there any other settings we need to do?
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modification point #1 of k3-am64-main.dtsi
serdes_wiz0: wiz@f000000
serdes0: serdes@f000000 {
//assigned-clock-parents = <&k3_clks 162 1>, <&k3_clks 162 1>, <&k3_clks 162 1>; // comment out
assigned-clock-parents = <&serdes_refclk>, <&serdes_refclk>, <&serdes_refclk>; // add
}
}
modification point #2 of k3-am64-main.dtsi
serdes_refclk: serdes-refclk {
//clock-frequency = <0>; // comment out
clock-frequency = <100000000>; // add
};
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Best regards,
Masanobu(Mark) TSUCHIYA
