Other Parts Discussed in Thread: AM625
Tool/software:
Hi experts
Our plan is for the am625SIP to be the master device to provide clock control TAS5760 to play sound through the speakers. We now offer a clock source of 12.288Mhz on the AM625SIP MCASP0_AFSX (D20) pin (the same clock source is also used by the TAS5760). Now we have a problem, when debugging McASP the clock of MCASP1_AFSX is always 88.2Khz, we want 48Khz, how do I configure the device tree to meet the output of 48Khz?
https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/2570.k3_2D00_am625_2D00_sk.dts
