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Original question:

J721EXCPXEVM: Using edgeai-tidl-tools to convert onnx(edgeai-yolov5) into bin does not work

J721EXCPXEVM: vision_apps uses the yolov5 AI model for inference.

george lin
Prodigy 130 points
Part Number: J721EXCPXEVM
Other Parts Discussed in Thread: TDA4VM

Tool/software:

Dear TI Experts,

I issue come from "J721EXCPXEVM: Using edgeai-tidl-tools to convert onnx(edgeai-yolov5) into bin does not work".
My question is simple. I think the TDA4VM platform should be supported.
I want "vision_apps" to use yolov5 AI model for inference.

My code base is "ti-processor-sdk-rtos-j721e-evm-08_06_00_12".
The vision app I tested is "vision_apps/apps/dl_demos/app_tidl_od".
The version of edgeai-tidl-tools that converts onnx to bin is "edgeai-tidl-tools-08_06_00_05".
The tested onnx are "yolov5s6_640_ti_lite_37p4_56p0.onnx" and "yolov5s6_640_ti_lite_metaarch.prototxt". Retrieved from "">github.com/.../edgeai-yolov5-gplv3".
According to Nikhil (TI Expert)'s suggestion, I have modified preProcObj->node = tivxDLPreProcNode(...).

It has been too long since vision apps changed to use the yolov5 AI model that cannot be displayed.
Can TI experts please provide examples of vision apps using the yolov5 AI model?
Let me prove to my manager that the vision app on TDA4VM can use the yolov5 AI model.
Just a simple Sample is enough.

Best regard,
George Lin

  • 0
    Prodigy 130 points

    Hello TI Experts,
    Has this issue been assigned a new owner?
    best regard,
    George Lin

  • 0 in reply to george lin
    Prodigy 130 points

    Hello TI Experts,


    The problem of being unable to use YOLOV5 on vision_apps has occurred for a long time.
    So help assign an owner.
    This will speed up the process of the problem.


    Best regard,
    George Lin

  • 0 in reply to george lin
    TI__Expert 3411 points

    Hi George; sorry this takes so long. We will find some experts on YOLOV5 model to answer your questions.

    Meanwhile, can you try the newer version software as well?

    Any specific reason for you to stay at 08_06_00_12?

    Thanks and regards

    Wen Li

  • 0 in reply to Wen Li
    Prodigy 130 points

    Hi Wen Li,


    I used "edgeai-tidl-tools-09_02_07_00" to convert ONNX to BIN.
    But it has one WARNING.
    "WARNING: [TIDL_E_DATAFLOW_INFO_NULL] Network compiler returned with error or didn't executed, this model can only be used on PC/Host emulation mode, it is not expected to work on target/EVM."
    Therefore, "edgeai_09_02_00_05" cannot be executed correctly using the BIN generated by "edgeai-tidl-tools-09_02_07_00".
    p.s. Before integrating BIN testing in vision_apps, I will use edgeai to test first.
    I have also used "edgeai-tidl-tools-10_00_03_00" test.
    Neither "edgeai-tidl-tools-10_00_03_00" nor "edgeai-tidl-tools-08_06_00_05" has the above WARNING.
    But "ti-processor-sdk-rtos-j721e-evm-10_00_00_05-prebuilt.tar.gz" cannot correctly boot my TDA4VM EVB.
    So I can only use "ti-processor-sdk-rtos-j721e-evm-08_06_00_12" for development.


    Best regard,
    George Lin

  • 0 in reply to george lin
    Prodigy 130 points

    run_python_examples-2024-11-26-0504.log 
    X64 Architecture

Processing config file #0 : /home/root/model-artifacts/yolov5s6_640_ti_lite_37p4_56p0/tempDir/subgraph_0_tidl_io_.qunat_stats_config.txt 
 Freeing memory for user provided Net
 ----------------------- TIDL Process with REF_ONLY FLOW ------------------------

#    0 . .. T   10873.37  .... ..... ... .... .....
#    1 . .. T   10665.12  .... ..... ... .... .....
Processing config file #0 : /home/root/model-artifacts/yolov5s6_640_ti_lite_37p4_56p0/tempDir/subgraph_0_tidl_io_.qunat_stats_config.txt 
 Freeing memory for user provided Net
 ----------------------- TIDL Process with REF_ONLY FLOW ------------------------

#    0 . .. T    4595.32  .... ..... ... .... .....
#    1 . .. T    4703.60  .... ..... ... .... .....
Processing config file #0 : /home/root/model-artifacts/yolov5s6_640_ti_lite_37p4_56p0/tempDir/subgraph_0_tidl_io_.qunat_stats_config.txt 
 Freeing memory for user provided Net
 ----------------------- TIDL Process with REF_ONLY FLOW ------------------------

#    0 . .. T    4783.31  .... ..... ... .... .....
#    1 . .. T    4716.85  .... ..... ... .... .....
Processing config file #0 : /home/root/model-artifacts/yolov5s6_640_ti_lite_37p4_56p0/tempDir/subgraph_0_tidl_io_.qunat_stats_config.txt 
 Freeing memory for user provided Net
 ----------------------- TIDL Process with REF_ONLY FLOW ------------------------

#    0 . .. T    4736.30  .... ..... ... .... .....
#    1 . .. T    4649.74  .... ..... ... .... .....
Processing config file #0 : /home/root/model-artifacts/yolov5s6_640_ti_lite_37p4_56p0/tempDir/subgraph_0_tidl_io_.qunat_stats_config.txt 
 Freeing memory for user provided Net
 ----------------------- TIDL Process with REF_ONLY FLOW ------------------------

#    0 . .. T    4676.27  .... ..... ... .... .....
#    1 . .. T    4818.58  .... ..... ... .... .....
Processing config file #0 : /home/root/model-artifacts/yolov5s6_640_ti_lite_37p4_56p0/tempDir/subgraph_0_tidl_io_.qunat_stats_config.txt 
 Freeing memory for user provided Net
 ----------------------- TIDL Process with REF_ONLY FLOW ------------------------

#    0 . .. T    4807.46  .... ..... ... .... .....
#    1 . .. T    4726.68  .... ..... ... .... .....
------------------ Network Compiler Traces -----------------------------
Segmentation fault (core dumped)
yolo_v3 is meta arch name 
yolo_v3
Number of OD backbone nodes = 192 
Size of odBackboneNodeIds = 192 

Preliminary subgraphs created = 1 
Final number of subgraphs created are : 1, - Offloaded Nodes - 320, Total Nodes - 320 
 Graph Domain TO version : 11TIDL Meta PipeLine (Proto) File  : ../../../jacinto-ai-modelforest/models/vision/detection/coco/ultralytics-yolov5/yolov5s6_640_ti_lite_metaarch.prototxt  
yolo_v3
yolo_v3
Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal

 ************** Frame index 1 : Running float import ************* 
INFORMATION: [TIDL_ResizeLayer] Resize_107 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize.
INFORMATION: [TIDL_ResizeLayer] Resize_123 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize.
INFORMATION: [TIDL_ResizeLayer] Resize_139 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize.
****************************************************
**          3 WARNINGS          0 ERRORS          **
****************************************************
The soft limit is 2048
The hard limit is 2048
MEM: Init ... !!!
MEM: Init ... Done !!!
 0.0s:  VX_ZONE_INIT:Enabled
 0.26s:  VX_ZONE_ERROR:Enabled
 0.27s:  VX_ZONE_WARNING:Enabled
 0.17992s:  VX_ZONE_INIT:[tivxInit:185] Initialization Done !!!

**********  Frame Index 1 : Running float inference **********
 Graph Domain TO version : 11
**********  Frame Index 2 : Running fixed point mode for calibration **********
Empty prototxt path, running calibration

~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~

 
 
 *****************   Calibration iteration number 0 started ************************ 
 
 
 
Empty prototxt path, running calibration

~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~

 
 
 *****************   Calibration iteration number 0 completed ************************ 
 
 
 

 
 
 *****************   Calibration iteration number 1 started ************************ 
 
 
 
Empty prototxt path, running calibration

~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~

 
 
 *****************   Calibration iteration number 1 completed ************************ 
 
 
 

 
 
 *****************   Calibration iteration number 2 started ************************ 
 
 
 
Empty prototxt path, running calibration

~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~

 
 
 *****************   Calibration iteration number 2 completed ************************ 
 
 
 

 
 
 *****************   Calibration iteration number 3 started ************************ 
 
 
 
Empty prototxt path, running calibration

~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~

 
 
 *****************   Calibration iteration number 3 completed ************************ 
 
 
 

 
 
 *****************   Calibration iteration number 4 started ************************ 
 
 
 
Empty prototxt path, running calibration

~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~

 
 
 *****************   Calibration iteration number 4 completed ************************ 
 
 
 
Empty prototxt path, running calibration
Could not open /home/root/model-artifacts/yolov5s6_640_ti_lite_37p4_56p0/tempDir/subgraph_0_tidl_net/perfSimInfo.bin
INFORMATION: [TIDL_ResizeLayer] Resize_107 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resizeAvailable execution providers :  ['TIDLExecutionProvider', 'TIDLCompilationProvider', 'CPUExecutionProvider']

Running 1 Models - ['yolov5s6_640_ti_lite_37p4_56p0']


Running_Model :  yolov5s6_640_ti_lite_37p4_56p0  


Running shape inference on model ../../../jacinto-ai-modelforest/models/vision/detection/coco/ultralytics-yolov5/yolov5s6_640_ti_lite_37p4_56p0.onnx 


 
Completed_Model :     1, Name : yolov5s6_640_ti_lite_37p4_56p0                    , Total time :   49934.16, Offload Time :   11083.93 , DDR RW MBs : 0, Output File : py_out_yolov5s6_640_ti_lite_37p4_56p0_ADE_val_00001801.jpg 
 
 
.
INFORMATION: [TIDL_ResizeLayer] Resize_123 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize.
INFORMATION: [TIDL_ResizeLayer] Resize_139 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize.
WARNING: [TIDL_E_DATAFLOW_INFO_NULL] Network compiler returned with error or didn't executed, this model can only be used on PC/Host emulation mode, it is not expected to work on target/EVM.
****************************************************
**          4 WARNINGS          0 ERRORS          **
****************************************************
MEM: Deinit ... !!!
MEM: Alloc's: 25 alloc's of 337396900 bytes 
MEM: Free's : 25 free's  of 337396900 bytes 
MEM: Open's : 0 allocs  of 0 bytes 
MEM: Deinit ... Done !!!
run python3 onnxrt_ep.py
Available execution providers :  ['TIDLExecutionProvider', 'TIDLCompilationProvider', 'CPUExecutionProvider']

Running 1 Models - ['yolov5s6_640_ti_lite_37p4_56p0']


Running_Model :  yolov5s6_640_ti_lite_37p4_56p0  


Saving image to  ../../../output_images/

 
Completed_Model :     1, Name : yolov5s6_640_ti_lite_37p4_56p0                    , Total time :    5025.24, Offload Time :    5025.16 , DDR RW MBs : 0, Output File : py_out_yolov5s6_640_ti_lite_37p4_56p0_ADE_val_00001801.jpg 
 
 
libtidl_onnxrt_EP loaded 0x5bbe59e78850 
Final number of subgraphs created are : 1, - Offloaded Nodes - 320, Total Nodes - 320 
The soft limit is 2048
The hard limit is 2048
MEM: Init ... !!!
MEM: Init ... Done !!!
 0.0s:  VX_ZONE_INIT:Enabled
 0.7s:  VX_ZONE_ERROR:Enabled
 0.10s:  VX_ZONE_WARNING:Enabled
 0.2978s:  VX_ZONE_INIT:[tivxInit:185] Initialization Done !!!
MEM: Deinit ... !!!
MEM: Alloc's: 25 alloc's of 173927197 bytes 
MEM: Free's : 25 free's  of 173927197 bytes 
MEM: Open's : 0 allocs  of 0 bytes 
MEM: Deinit ... Done !!!

    Hi Wen Li,

    "run_python_examples-2024-11-26-0504.log" is full log of "source ./scripts/run_python_examples.sh" in "edgeai-tidl-tools-09_02_07_00".

    Best regard,

    George Lin