AM68A: configure tidss pixel clock for sd video (27MHz)

Frank Bergmann

Part Number: AM68A

Tool/software:

Hi experts,

we have a custom design in which we connect a video encoder (ADV7393) to the parallel video output (VOUT0_x). In order to get this working we modified the drm bridge driver ti-tfp410.c. The modified driver will be recognized and used. The issue is that the probed clock frequencies does not match the frequency we need to get the sd output working. Our question is: How can we achieve the 27MHz pixel output frequency from the tidss?

SDK: 10.00.00.08

Thanks in advance,

Frank.

2 months ago

+1 Takuma Fujiwara 2 months ago

TI__Mastermind 37772 points

Hi Frank,

ti-tfp410.c is a bridge driver for HDMI where pixel clocks are obtained from display through EDID and it is a bridge instead of a panel, so that does not have any mechanism to set pixel clock manually.

You would need some sort of panel to connect to the bridge, then in the panel driver some hardcoded values can be set, similar to how it is done for panel-edp.c used for an eDP port on our EVMs for the AM6x family: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/drivers/gpu/drm/panel/panel-edp.c?h=ti-linux-6.6.y#n1732

Regards,

Takuma

0 Frank Bergmann 2 months ago in reply to Takuma Fujiwara

Prodigy 30 points

Hi Takuma,

Thanks for the clarification!

It seems to me now that writing/modifying a panel driver would be the better option.

Regards,

Frank

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AM68A: configure tidss pixel clock for sd video (27MHz)