DRA821U: DRA821U CPSW5G Ethernet native mode support for GESI board

Hi,

Rich Chen said:

Customer would like to use RGMii to support 4 Gigabit Ethernet instead of QSGMii and try to verify the feature on DRA821U EVM. 

DRA821 EVM doesn't output CPSW signals to GESI connector. So, we can't validate RGMII on DRA821.

Best Regards,
Sudheer

Sudheer, 

That's a limitation for customer evaluation now since customer learn QSGMii will have throughput limitation on full loading. 

On J7200 SOM, only RGMII2 is wired out to GESI. 

Had RGMii2 been verified to work and with setting for testing and customer will need to extend the other 3 RGMii on their own board? 

BR, Rich

Hi,

Rich Chen said:

On J7200 SOM, only RGMII2 is wired out to GESI. 

Yes, RGMII2 is mapped to GESI.
We have validated from RTOS SDK, not from Linux SDK.

Rich Chen said:

That's a limitation for customer evaluation now since customer learn QSGMii will have throughput limitation on full loading. 

It can also support 1Gbps per port as similar to RGMII.
Can you check whether CPU load is Higher? If so, you can suggest them to configure interrupt pacing with some higher number so, that the no.of interrupts fired to core will be less.

Best Regards,
Sudheer

Sudheer, 

Below is the e2e post about the throughput limitation. 

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1442817/dra821u-cpsw5g-performance-of-native-ethernet-in-detailed/5532959#5532959

You mentioned that there is no limitation in speed support, software processing and handling is the bottle neck to achieve H/W supported speed/throughput.

So I assume QSGMII interface should be able to support enough bandwidth for 4 channel Gbit transfer based on 5Gb SERDES bandwidth.

On customer test, CPU load is only 75%, how to get the full throughput on iPerf test while 4 channel running simultaneously?    

BR, Rich

Hi,

Rich Chen said:

So I assume QSGMII interface should be able to support enough bandwidth for 4 channel Gbit transfer based on 5Gb SERDES bandwidth.

Yes. QSGMII 5GB SERDES can support max of 4Gbps from 4 QSGMII Ports.

Rich Chen said:

On customer test, CPU load is only 75%, how to get the full throughput on iPerf test while 4 channel running simultaneously?    

I have posted reply on below E2E, customer can try with interrupt pacing options.
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1442817/dra821u-cpsw5g-performance-of-native-ethernet-in-detailed/5532959#5532959

As S/W (Linux General N/W stack and application) processing and Handling of data is bottle neck, even if you change the H/W interface to RGMII also same result your will observe, as same s/w has to process the iperf3 data.

Best Regards,
Sudheer

Sudheer, 

It is really important feedback. 

This clear my concern and we thought this is a hardware limitation and tried to change to RGMiix4. 

We will work toward to software processing and handling portion for better performance. 

BR, Rich

Hi,

Rich Chen said:

We will work toward to software processing and handling portion for better performance. 

Sure, Please check Interrupt pacing option suggested in actual performance thread.

Best Regards,

Sudheer