Tool/software:
Hello...
I need to enable GPIO interrupt to occur on falling edge of GPIO0_73 (U12) in R5F0_0 core.
The SoC is running Linux on A53, nortos in R5F.
Tiboot3.bin (rm-cfg.c) looks like:
/* Main GPIO Interrupt Router */
{
.start_resource = 0,
.num_resource = 8,
.type = RESASG_UTYPE (AM64X_DEV_MAIN_GPIOMUX_INTROUTER0,
RESASG_SUBTYPE_IR_OUTPUT),
.host_id = HOST_ID_A53_2,
},
{
.start_resource = 8,
.num_resource = 2,
.type = RESASG_UTYPE (AM64X_DEV_MAIN_GPIOMUX_INTROUTER0,
RESASG_SUBTYPE_IR_OUTPUT),
.host_id = HOST_ID_MAIN_0_R5_1,
},
{
.start_resource = 8,
.num_resource = 2,
.type = RESASG_UTYPE (AM64X_DEV_MAIN_GPIOMUX_INTROUTER0,
RESASG_SUBTYPE_IR_OUTPUT),
.host_id = HOST_ID_MAIN_0_R5_0,
},
{
.start_resource = 16,
.num_resource = 1,
.type = RESASG_UTYPE (AM64X_DEV_MAIN_GPIOMUX_INTROUTER0,
RESASG_SUBTYPE_IR_OUTPUT),
.host_id = HOST_ID_ALL,
},
Linux DT looks like:
main_gpio0: gpio@600000 {
compatible = "ti,am64-gpio", "ti,keystone-gpio";
reg = <0x0 0x00600000 0x0 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&main_gpio_intr>;
interrupts = <190>, <191>, <192>,
<193>, <194>, <195>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <87>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 77 0>;
clock-names = "gpio";
};
Then on main:
int32_t retVal;
struct tisci_msg_rm_irq_set_req rmIrqReq;
struct tisci_msg_rm_irq_set_resp rmIrqResp;
rmIrqReq.valid_params = 0U;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
rmIrqReq.global_event = 0U;
rmIrqReq.src_id = TISCI_DEV_GPIO0;
rmIrqReq.src_index = IRQ0_OUT_N_PIN;
rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE0;
rmIrqReq.dst_host_irq = CSLR_R5FSS0_CORE0_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_8;
rmIrqReq.ia_id = 0U;
rmIrqReq.vint = 0U;
rmIrqReq.vint_status_bit_index = 0U;
rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
retVal = Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, SystemP_WAIT_FOREVER);
if (0 != retVal)
{
DebugP_log("[Error] Sciclient event config failed!!!\r\n");
DebugP_assert(FALSE);
}
GPIO_bankIntrEnable(gGpioBaseAddr, GPIO_GET_BANK_INDEX(IRQ0_OUT_N_PIN));
/* Register pin interrupt */
HwiP_Params_init(&hwiPrms);
hwiPrms.intNum = CSLR_R5FSS0_CORE0_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_8;
hwiPrms.callback = &int_callback;
hwiPrms.args = (void*)IRQ0_OUT_N_PIN;
/* GPIO interrupt is a pulse type interrupt */
hwiPrms.isPulse = TRUE;
retVal = HwiP_construct(&hwGpioHwiObject, &hwiPrms);
DebugP_assert(retVal == SystemP_SUCCESS);
It doesn't show any error, but int_callback doesn't get called.
Any help is appreciated.
