AM6421: Does the connectino of VDDS_MMC0 and 1.8v for analog cause some noises to the analog IP ?

The VDDS_MMC0 power rail sources digital output buffers which will result in large transient currents as the outputs transition multiple digital signals from low to high at the same time. The large current transients can introduce noise on its power source, but the noise can be minimized with appropriate decoupling capacitors and low inductance PCB connections. Therefore, power supply noise is function of the specific system implementation.

Combining digital loads and analog loads on a shared power source may be possible with the appropriate system implementation, but creating separate power sources for the digital loads and analog loads will reduce the risk associated with the digital loads creating noise on the analog power rails.

The system designer needs to use appropriate decoupling capacitors and PCB layout to minimize noise on a shared power source. 

Regards,
Paul